nestedsvm: reduce TLB flushes

PATCH New Christoph Egger 1 participant 1 message May 18, 2011

Share & tools

Christoph Egger

author

2011-05-18 15:26 UTC #0 lore raw

PATCH 1/1 nestedsvm: reduce TLB flushes

Reduce TLB flushes:
1. When we update the cr3 during VMRUN/VMEXIT emulation we toggle between n1asid and n2asid forth and back => no TLB flush needed
2. Only flush n1asid or n2asid depending on vcpu guest mode and not both unconditionally.

Signed-off-by Christoph Egger <[email protected]>

Signature · 6 lines

---to satisfy European Law for business letters:
Advanced Micro Devices GmbH
Einsteinring 24, 85689 Dornach b. Muenchen
Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632

xen/arch/x86/hvm/svm/svm.c +13 -1

diff -r 0e45a2e91f17 xen/arch/x86/hvm/svm/svm.c
@@ -450,7 +452,19 @@ static void svm_update_guest_cr(struct v
         break;
     case 3:
         vmcb_set_cr3(vmcb, v->arch.hvm_vcpu.hw_cr[3]);
-        hvm_asid_flush_vcpu(v);
+        if ( !nestedhvm_enabled(v->domain) ) {
+            hvm_asid_flush_vcpu(v);
+            break;
+        }
+        if ( nestedhvm_vmswitch_in_progress(v) )
+            /* During VMRUN/VMEXIT emulation we toggle between
+             * n1asid and n2asid. */
+            break;
+
+        if ( nestedhvm_vcpu_in_guestmode(v) )
+            hvm_asid_flush_vcpu_asid(&vcpu_nestedhvm(v).nv_n2asid);
+        else
+            hvm_asid_flush_vcpu_asid(&v->arch.hvm_vcpu.n1asid);
         break;
     case 4:
         value = HVM_CR4_HOST_MASK;

_______________________________________________
Xen-devel mailing list
[email protected]
http://lists.xensource.com/xen-devel