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mx51evk: Fix number of DDR banks

PATCH New Fabio Estevam 2 participants 2 messages May 19, 2011 – May 20, 2011

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PATCH 1/1 mx51evk: Fix number of DDR banks

MX51EVK board has 2 banks of 256MB DDR memories instead of a single one with 512MB.

---
 board/freescale/mx51evk/mx51evk.c |   18 +++++++++++++++---
 include/configs/mx51evk.h         |    7 +++++--
 2 files changed, 20 insertions(+), 5 deletions(-)
board/freescale/mx51evk/mx51evk.c +15 -3
index e2d3d74..ef7c6e4 100644
@@ -52,11 +52,23 @@ u32 get_board_rev(void)
 
 int dram_init(void)
 {
-	/* dram_init must store complete ramsize in gd->ram_size */
-	gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE,
-				PHYS_SDRAM_1_SIZE);
+	u32 size1, size2;
+
+	size1 = get_ram_size((volatile void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
+	size2 = get_ram_size((volatile void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+
+	gd->ram_size = size1 + size2;
+
 	return 0;
 }
+void dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+}
 
 static void setup_iomux_uart(void)
 {
include/configs/mx51evk.h +5 -2
index 207b20c..2dc3dff 100644
@@ -198,9 +198,12 @@
 /*-----------------------------------------------------------------------
  * Physical Memory Map
  */
-#define CONFIG_NR_DRAM_BANKS	1
+#define CONFIG_NR_DRAM_BANKS	2
 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
-#define PHYS_SDRAM_1_SIZE	(512 * 1024 * 1024)
+#define PHYS_SDRAM_1_SIZE	(256 * 1024 * 1024)
+#define PHYS_SDRAM_2		CSD1_BASE_ADDR
+#define PHYS_SDRAM_2_SIZE	(256 * 1024 * 1024)
+#define PHYS_SDRAM_SIZE        (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
 
 #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
Signature · 1 line
1.6.0.4
#1 lore raw

PATCH 1/1 mx51evk: Fix number of DDR banks

Quoted 4 lines · Fabio Estevam

MX51EVK board has 2 banks of 256MB DDR memories instead of a single one with 512MB.

---

Hi Fabio,

Quoted 12 lines
 board/freescale/mx51evk/mx51evk.c |   18 +++++++++++++++---
 include/configs/mx51evk.h         |    7 +++++--
 2 files changed, 20 insertions(+), 5 deletions(-)
board/freescale/mx51evk/mx51evk.c +0 -0
index e2d3d74..ef7c6e4 100644
@@ -52,11 +52,23 @@ u32 get_board_rev(void)
 
 int dram_init(void)
 {

board/freescale/mx51evk/mx51evk.c u32 get_board_rev(void) · line 61

Quoted 10 lines
board/freescale/mx51evk/mx51evk.c +7 -3
-	/* dram_init must store complete ramsize in gd->ram_size */
-	gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE,
-				PHYS_SDRAM_1_SIZE);
+	u32 size1, size2;
+
+	size1 = get_ram_size((volatile void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
+	size2 = get_ram_size((volatile void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
+
+	gd->ram_size = size1 + size2;
+

Do we really need this patch ? I am trying to understand. I think we need always to set up two (or more) banks if there is a hole between the two banks. For example, if it would be possible to install a memory with a smaller size. This is the case of the MX53loco, because the range between CSD0 and CSD1 is 1GB.

This is not the case of the mx51evk, if I am correct. CSD0 and CSD1 address each 256MB, and memory from the software point of view is contiguous.

Best regards,
Stefano Babic

Signature · 5 lines
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