Overview

Signed-off-by Michael Schwingen <[email protected]>

---
Changes for V2:

Changes for V3:
- change patch description
- drop wepep250 (should already be deleted)
Changes for V4:
- add changelog

 MAINTAINERS |   44 ++++++++++++++++++++++----------------------
 1 files changed, 22 insertions(+), 22 deletions(-)

MAINTAINERS +19 -19

index 1d7e1f4..4b17b63 100644
@@ -560,8 +560,8 @@ Stefano Babic <[email protected]>
 	ea20		davinci
 	mx35pdk		i.MX35
 	mx51evk		i.MX51
-	polaris		xscale
-	trizepsiv	xscale
+	polaris		xscale/pxa
+	trizepsiv	xscale/pxa
  	vision2		i.MX51
 
 Jason Liu <[email protected]>

@@ -593,7 +593,7 @@ Andreas Bie
 
 Cliff Brake <[email protected]>
 
-	pxa255_idp	xscale
+	pxa255_idp	xscale/pxa
 
 Rick Bronson <[email protected]>
 

@@ -699,7 +699,7 @@ Sergey Kubushyn <[email protected]>
 
 Prakash Kumar <[email protected]>
 
-	cerf250		xscale
+	cerf250		xscale/pxa
 
 Vipin Kumar <[email protected]>
 

@@ -777,9 +777,9 @@ John Rigby <[email protected]>
 
 Stefan Roese <[email protected]>
 
-	ixdpg425	xscale
-	pdnb3		xscale
-	scpu		xscale
+	ixdpg425	xscale/ixp
+	pdnb3		xscale/ixp
+	scpu		xscale/ixp
 
 Alessandro Rubini <[email protected]>
 Nomadik Linux Team <[email protected]>

@@ -802,15 +802,15 @@ Heiko Schocher <[email protected]>
 
 Robert Schwebel <[email protected]>
 
-	csb226		xscale
-	innokom		xscale
+	csb226		xscale/pxa
+	innokom		xscale/pxa
 
 Michael Schwingen <[email protected]>
 
-	actux1		xscale
-	actux2		xscale
-	actux3		xscale
-	actux4		xscale
+	actux1		xscale/ixp
+	actux2		xscale/ixp
+	actux3		xscale/ixp
+	actux4		xscale/ixp
 
 Andrea Scian <[email protected]>
 

@@ -834,12 +834,12 @@ Greg Ungerer <[email protected]>
 
 Marek Vasut <[email protected]>
 
-	balloon3	xscale
-	colibri_pxa270	xscale
-	palmld		xscale
-	palmtc		xscale
-	vpac270		xscale
-	zipitz2		xscale
+	balloon3	xscale/pxa
+	colibri_pxa270	xscale/pxa
+	palmld		xscale/pxa
+	palmtc		xscale/pxa
+	vpac270		xscale/pxa
+	zipitz2		xscale/pxa
  	efikamx		i.MX51
 
 Hugo Villeneuve <[email protected]>

MAINTAINERS +1 -0

+	lubbock		xscale/pxa	Kyle Harris <[email protected]> / dead address
 
 	imx31_phycore_eet i.MX31  Guennadi Liakhovetski <[email protected]> /

resigned mx31ads i.MX31 Guennadi Liakhovetski <[email protected]>
/ resigned

Signed-off-by Michael Schwingen <[email protected]>

---
Changes for V2:

Changes for V3:
- reformat to wrap long lines
Changes for V4:
- add changelog

 arch/arm/cpu/ixp/npe/npe.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

arch/arm/cpu/ixp/npe/npe.c +0 -0

index 857bcad..6d92c53 100644

Quoted 11 lines · Michael Schwingen

Signed-off-by Michael Schwingen <[email protected]>

---
Changes for V2:

Changes for V3:
- reformat to wrap long lines
Changes for V4:
- add changelog

 arch/arm/cpu/ixp/npe/npe.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

Acked-by Marek Vasut <[email protected]>

Signed-off-by Michael Schwingen <[email protected]>

---
Changes for V2:

Changes for V3:
- coding style fixes
Changes for V4:
- add changelog

 drivers/serial/serial_ixp.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)

drivers/serial/serial_ixp.c +3 -1

index dd26af4..a9acd47 100644
@@ -30,6 +30,7 @@
 
 #include <common.h>
 #include <asm/arch/ixp425.h>
+#include <watchdog.h>
 
 /*
  *               14.7456 MHz

@@ -85,7 +86,8 @@ int serial_init (void)
 void serial_putc (const char c)
 {
 	/* wait for room in the tx FIFO on UART */
-	while ((LSR(CONFIG_SYS_IXP425_CONSOLE) & LSR_TEMT) == 0);
+	while ((LSR(CONFIG_SYS_IXP425_CONSOLE) & LSR_TEMT) == 0)
+		WATCHDOG_RESET();	/* Reset HW Watchdog, if needed */
 
 	THR(CONFIG_SYS_IXP425_CONSOLE) = c;
 

- jump to real flash location after reset before turning off flash mirror
- fix timer system to use HZ == 1000, remove broken interrupt-based code

Signed-off-by Michael Schwingen <[email protected]>

---
Changes for V2:
- fix patch description
Changes for V3:
- use I/O accessors
- move timestamp variable from BSS to global data
- coding style fixes
Changes for V4:
- add changelog

 arch/arm/cpu/ixp/cpu.c                 |    5 --
 arch/arm/cpu/ixp/start.S               |   59 ++--------------
 arch/arm/cpu/ixp/timer.c               |  124
+++++++++++++++----------------- arch/arm/include/asm/arch-ixp/ixp425.h | 
  5 +-
 arch/arm/include/asm/global_data.h     |    3 +
 5 files changed, 68 insertions(+), 128 deletions(-)

arch/arm/cpu/ixp/cpu.c +0 -5

index ce275e5..942845d 100644
@@ -36,8 +36,6 @@
 #include <asm/arch/ixp425.h>
 #include <asm/system.h>
 
-ulong loops_per_jiffy;
-
 static void cache_flush(void);
 
 #if defined(CONFIG_DISPLAY_CPUINFO)

@@ -51,17 +49,14 @@ int print_cpuinfo (void)
 	puts("CPU:   Intel IXP425 at ");
 	switch ((id & 0x000003f0) >> 4) {
 	case 0x1c:
-		loops_per_jiffy = 887467;
 		speed = 533;
 		break;
 
 	case 0x1d:
-		loops_per_jiffy = 666016;
 		speed = 400;
 		break;
 
 	case 0x1f:
-		loops_per_jiffy = 442901;
 		speed = 266;
 		break;
 	}

arch/arm/cpu/ixp/start.S +5 -54

index 561c1f4..faa9a8f 100644
@@ -65,7 +65,8 @@
 	.endm
 
 .globl _start
-_start: b	reset
+_start:
+	ldr	pc, _reset
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
 	ldr	pc, _prefetch_abort

@@ -74,6 +75,7 @@ _start: b	reset
 	ldr	pc, _irq
 	ldr	pc, _fiq
 
+_reset:                 .word reset
 _undefined_instruction: .word undefined_instruction
 _software_interrupt:	.word software_interrupt
 _prefetch_abort:	.word prefetch_abort

@@ -167,12 +169,6 @@ reset:
 	str     r1, [r2]
 
 	/* make sure flash is visible at 0 */
-#if 0
-	ldr	r2, =IXP425_EXP_CFG0
-	ldr     r1, [r2]
-	orr     r1, r1, #0x80000000
-	str     r1, [r2]
-#endif
 	mov	r1, #CONFIG_SYS_SDR_CONFIG
 	ldr     r2, =IXP425_SDR_CONFIG
 	str     r1, [r2]

@@ -216,19 +212,6 @@ reset:
 	str	r1, [r4]
 	DELAY_FOR 0x4000, r0
 
-	/* copy */
-	mov     r0, #0
-	mov     r4, r0
-	add     r2, r0, #CONFIG_SYS_MONITOR_LEN
-	mov     r1, #0x10000000
-	mov     r5, r1
-
-    30:
-	ldr     r3, [r0], #4
-	str     r3, [r1], #4
-	cmp     r0, r2
-	bne     30b
-
 	/* invalidate I & D caches & BTB */
 	mcr	p15, 0, r0, c7, c7, 0
 	CPWAIT	r0

@@ -241,19 +224,12 @@ reset:
 	mcr	p15, 0, r0, c7, c10, 4
 	CPWAIT	r0
 
-	/* move flash to 0x50000000 */
+	/* remove flash mirror at 0x00000000 */
 	ldr	r2, =IXP425_EXP_CFG0
 	ldr     r1, [r2]
 	bic     r1, r1, #0x80000000
 	str     r1, [r2]
 
-	nop
-	nop
-	nop
-	nop
-	nop
-	nop
-
 	/* invalidate I & Data TLB */
 	mcr	p15, 0, r0, c8, c7, 0
 	CPWAIT r0

@@ -269,7 +245,7 @@ reset:
 	orr	r0,r0,#0x13
 	msr	cpsr,r0
 
-/* Set stackpointer in internal RAM to call board_init_f */
+/* Set initial stackpointer in SDRAM to call board_init_f */
 call_board_init_f:
 	ldr	sp, =(CONFIG_SYS_INIT_SP_ADDR)
 	bic	sp, sp, #7 /* 8-byte alignment for ABI compliance */

@@ -580,28 +556,3 @@ reset_endless:
 
 	b	reset_endless
 
-#ifdef CONFIG_USE_IRQ
-
-.LC0:		.word	loops_per_jiffy
-
-/*
- * 0 <= r0 <= 2000
- */
-.globl __udelay
-__udelay:
-	mov	r2,     #0x6800
-	orr	r2, r2, #0x00db
-	mul	r0, r2, r0
-	ldr	r2, .LC0
-	ldr	r2, [r2]		@ max = 0x0fffffff
-	mov	r0, r0, lsr #11		@ max = 0x00003fff
-	mov	r2, r2, lsr #11		@ max = 0x0003ffff
-	mul	r0, r2, r0		@ max = 2^32-1
-	movs	r0, r0, lsr #6
-
-delay_loop:
-	subs	r0, r0, #1
-	bne	delay_loop
-	mov	pc, lr
-
-#endif /* CONFIG_USE_IRQ */

arch/arm/cpu/ixp/timer.c +3 -0

index edf341f..7a44a08 100644
@@ -1,4 +1,7 @@
 /*
+ * (C) Copyright 2010
+ * Michael Schwingen, michael at schwingen.org
+ *
  * (C) Copyright 2006
  * Stefan Roese, DENX Software Engineering, sr at denx.de.
  *

@@ -31,105 +34,94 @@
 

arch/arm/cpu/ixp/timer.c +14 -17

 / CONFIG_SYS_HZ)	/* For divider */ +DECLARE_GLOBAL_DATA_PTR;
 
 /*
- * When interrupts are enabled, use timer 2 for time/delay generation...
+ * The IXP42x time-stamp timer runs at 2*OSC_IN (66.666MHz when using a
+ * 33.333MHz crystal).
  */
-
-static volatile ulong timestamp;
-
-static void timer_isr(void *data)
+static inline unsigned long long tick_to_time(unsigned long long tick)
 {
-	unsigned int *pTime = (unsigned int *)data;
-
-	(*pTime)++;
-
-	/*
-	 * Reset IRQ source
-	 */
-	*IXP425_OSST = IXP425_OSST_TIMER_2_PEND;
+	tick *= CONFIG_SYS_HZ;
+	do_div(tick, CONFIG_IXP425_TIMER_CLK);
+	return tick;
 }
 
-ulong get_timer (ulong base)
+static inline unsigned long long time_to_tick(unsigned long long time)
 {
-	return timestamp - base;
+	time *= CONFIG_IXP425_TIMER_CLK;
+	do_div(time, CONFIG_SYS_HZ);
+	return time;
 }
 
-void reset_timer (void)
+static inline unsigned long long us_to_tick(unsigned long long us)
 {
-	timestamp = 0;
+	us = us * CONFIG_IXP425_TIMER_CLK + 999999;
+	do_div(us, 1000000);
+	return us;
 }

arch/arm/cpu/ixp/timer.c +36 -38

+
+	if (readl(IXP425_OSST) & IXP425_OSST_TIMER_TS_PEND) {
+		/* rollover of timestamp timer register */
+		gd->timestamp += (0xFFFFFFFF - gd->lastinc) + now + 1;
+		writel(IXP425_OSST_TIMER_TS_PEND, IXP425_OSST);
+	} else {
+		/* move stamp forward with absolut diff ticks */
+		gd->timestamp += (now - gd->lastinc);
+	}
+	gd->lastinc = now;
+	return gd->timestamp;
+}
 
-	/* enable timer irq */
-	*IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ);
 
-	return 0;
-}
-#else
-ulong get_timer (ulong base)
+void reset_timer_masked(void)
 {
-       return get_timer_masked () - base;
+	/* capture current timestamp counter */
+	gd->lastinc = readl(IXP425_OSTS_B);
+	/* start "advancing" time stamp from 0 */
+	gd->timestamp = 0;
 }
 
-void ixp425_udelay(unsigned long usec)
+void reset_timer(void)
 {
-	/*
-	 * This function has a max usec, but since it is called from udelay
-	 * we should not have to worry... be happy
-	 */
-	unsigned long usecs = CONFIG_SYS_HZ/1000000L & ~IXP425_OST_RELOAD_MASK;
-
-	*IXP425_OSST = IXP425_OSST_TIMER_1_PEND;
-	usecs |= IXP425_OST_ONE_SHOT | IXP425_OST_ENABLE;
-	*IXP425_OSRT1 = usecs;
-	while (!(*IXP425_OSST & IXP425_OSST_TIMER_1_PEND));
+	reset_timer_masked();
 }
 
-void __udelay (unsigned long usec)
+ulong get_timer_masked(void)
 {
-	while (usec--) ixp425_udelay(1);
+	return tick_to_time(get_ticks());
 }
 
-static ulong reload_constant = 0xfffffff0;
-
-void reset_timer_masked (void)
+ulong get_timer(ulong base)
 {
-	ulong reload = reload_constant | IXP425_OST_ONE_SHOT | IXP425_OST_ENABLE;
+	return get_timer_masked() - base;
+}
 
-	*IXP425_OSST = IXP425_OSST_TIMER_1_PEND;
-	*IXP425_OSRT1 = reload;
+void set_timer(ulong t)
+{
+	gd->timestamp = time_to_tick(t);
 }
 
-ulong get_timer_masked (void)
+/* delay x useconds AND preserve advance timestamp value */
+void __udelay(unsigned long usec)
 {
-	/*
-	 * Note that it is possible for this to wrap!
-	 * In this case we return max.
-	 */
-	ulong current = *IXP425_OST1;
-	if (*IXP425_OSST & IXP425_OSST_TIMER_1_PEND)
-	{
-		return reload_constant;
-	}
-	return (reload_constant - current);
+	unsigned long long tmp;
+
+	tmp = get_ticks() + us_to_tick(usec);
+
+	while (get_ticks() < tmp)
+		;
 }
 
 int timer_init(void)
 {
+	writel(IXP425_OSST_TIMER_TS_PEND, IXP425_OSST);
 	return 0;
 }
-#endif

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-ixp/ixp425.h index 2114437..5132607 100644

arch/arm/include/asm/arch-ixp/ixp425.h +0 -0

@@ -391,9 +391,8 @@
 #define IXP425_TIMER_REG(x) (IXP425_TIMER_BASE_PHYS+(x))

(quoted diff) +0 -0

b/arch/arm/include/asm/global_data.h index 2a84d27..c1a59f2 100644

arch/arm/include/asm/global_data.h +3 -0

@@ -64,6 +64,9 @@ typedef	struct	global_data {
 	unsigned long long	timer_reset_value;
 	unsigned long	lastinc;
 #endif
+#ifdef CONFIG_IXP425
+	unsigned long	timestamp;
+#endif
 	unsigned long	relocaddr;	/* Start address of U-Boot in RAM */
 	phys_size_t	ram_size;	/* RAM size */
 	unsigned long	mon_len;	/* monitor len */

arch/arm/cpu/ixp/timer.c line 69

Quoted 10 lines

arch/arm/cpu/ixp/timer.c +2 -6

-int timer_init (void)
+unsigned long long get_ticks(void)
 {
-	/* install interrupt handler for timer */
-	irq_install_handler(IXP425_TIMER_2_IRQ, timer_isr, (void *)&timestamp);
-
-	/* setup the Timer counter value */
-	*IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE;
+	ulong now = *IXP425_OSTS_B;

Aren't you missing an IO accessor here ?

Quoted 8 lines

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-ixp/ixp425.h index 2114437..5132607 100644

arch/arm/include/asm/arch-ixp/ixp425.h +0 -0

@@ -391,9 +391,8 @@
 #define IXP425_TIMER_REG(x) (IXP425_TIMER_BASE_PHYS+(x))
 #endif
 

arch/arm/include/asm/arch-ixp/ixp425.h line 398

Quoted 8 lines

arch/arm/include/asm/arch-ixp/ixp425.h +2 -3

-#if 0 /* test-only: also defined in npe/include/... */
-#define IXP425_OSTS	IXP425_TIMER_REG(IXP425_OSTS_OFFSET)
-#endif
+/* _B to avoid collision: also defined in npe/include/... */
+#define IXP425_OSTS_B	IXP425_TIMER_REG(IXP425_OSTS_OFFSET)
 #define IXP425_OST1	IXP425_TIMER_REG(IXP425_OST1_OFFSET)
 #define IXP425_OSRT1	IXP425_TIMER_REG(IXP425_OSRT1_OFFSET)
 #define IXP425_OST2	IXP425_TIMER_REG(IXP425_OST2_OFFSET)

This will eventually enjoy being converted to struct ixp_timer_regset { ... } goo. If you already did it in some further patch, sorry, I didn't get there yet ;-)

Am 05/21/2011 01:58 AM, schrieb Marek Vasut:

Quoted 5 lines

Quoted 5 lines

arch/arm/cpu/ixp/timer.c +1 -1

-int timer_init (void)
+unsigned long long get_ticks(void)
 
 {

Quoted 8 lines

arch/arm/cpu/ixp/timer.c line 69

Quoted 6 lines

(quoted diff) +0 -2

-	/* install interrupt handler for timer */
-	irq_install_handler(IXP425_TIMER_2_IRQ, timer_isr, (void

*)&timestamp); -

arch/arm/cpu/ixp/timer.c +1 -2

-	/* setup the Timer counter value */
-	*IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE;
+	ulong now = *IXP425_OSTS_B;

Aren't you missing an IO accessor here ?

Oops - you are correct.

Quoted 15 lines

Quoted 15 lines

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-ixp/ixp425.h index 2114437..5132607 100644

arch/arm/include/asm/arch-ixp/ixp425.h +2 -3

@@ -391,9 +391,8 @@
 
 #define IXP425_TIMER_REG(x) (IXP425_TIMER_BASE_PHYS+(x))
 #endif
 
-#if 0 /* test-only: also defined in npe/include/... */
-#define IXP425_OSTS	IXP425_TIMER_REG(IXP425_OSTS_OFFSET)
-#endif
+/* _B to avoid collision: also defined in npe/include/... */
+#define IXP425_OSTS_B	IXP425_TIMER_REG(IXP425_OSTS_OFFSET)
 

Quoted 7 lines

Quoted 3 lines

arch/arm/include/asm/arch-ixp/ixp425.h +0 -0

 #define IXP425_OST1	IXP425_TIMER_REG(IXP425_OST1_OFFSET)

#define IXP425_OSRT1 IXP425_TIMER_REG(IXP425_OSRT1_OFFSET)
#define IXP425_OST2 IXP425_TIMER_REG(IXP425_OST2_OFFSET)

This will eventually enjoy being converted to struct ixp_timer_regset { ... } goo. If you already did it in some further patch, sorry, I didn't get there yet ;-)

That would probably require a major rework of all the Intel access/NPE library code - this is not something I want to touch now. Most of these defines are used inside the Intel code, so cleaning up only outside of that area would not improve the code much.

cu
Michael

Signed-off-by Michael Schwingen <[email protected]>

---
Changes for V2:

Changes for V3:

Changes for V4:
- add changelog

 arch/arm/cpu/ixp/npe/Makefile |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

arch/arm/cpu/ixp/npe/Makefile +0 -0

index c756a1d..14ab3c7 100644

Signed-off-by Michael Schwingen <[email protected]>

---
Changes for V3:
- new in V3, replaces config.mk files in earlier patches
Changes for V4:
- add changelog

 arch/arm/config.mk |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

arch/arm/config.mk +0 -0

index a6a4742..a7c4d27 100644
@@ -63,7 +63,13 @@ ifeq (,$(findstring

arch/arm/lib/eabi_compat.o,$(PLATFORM_LIBS))) PLATFORM_LIBS += $(OBJTREE)/arch/arm/lib/eabi_compat.o
endif
endif

Signed-off-by Michael Schwingen <[email protected]>

---
Changes for V2:
- move -ffunction-sections/--gc-sections to board config.mk
- add wildcard to bss segment in linker script
Changes for V3:
- use I/O accessors
- coding style fixes
- add PCI clock/reset initialization
- use get_ram_size in dram_init
- add PCI support
- remove config.mk
- remove unused definitions from config.h
- add CONFIG_BOARD_SIZE_LIMIT
Changes for V4:
- add changelog
- merge __bss_end change in u-boot.lds from master

 board/actux1/actux1.c    |  111
++++++++++++++++++++++++---------------------- board/actux1/config.mk   | 
  6 ---
 board/actux1/u-boot.lds  |   41 ++++++++++++-----
 boards.cfg               |    5 ++-
 include/configs/actux1.h |   63 +++++++++++++++-----------
 5 files changed, 127 insertions(+), 99 deletions(-)
 delete mode 100644 board/actux1/config.mk

board/actux1/actux1.c +4 -0

index e73aff8..8fb8065 100644
@@ -37,49 +37,57 @@
 #include <asm/arch/ixp425.h>
 #include <asm/io.h>
 #include <miiphy.h>
+#ifdef CONFIG_PCI
+#include <pci.h>
+#include <asm/arch/ixp425pci.h>
+#endif
 
 #include "actux1_hw.h"
 
 DECLARE_GLOBAL_DATA_PTR;

board/actux1/actux1.c +46 -52

+	return 0;
+}
+
+int board_init(void)
 {
 	gd->bd->bi_arch_number = MACH_TYPE_ACTUX1;
 
 	/* adress of boot parameters */
 	gd->bd->bi_boot_params = 0x00000100;
 
-	GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST);
-	GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST);
+	GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
+	GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
 
-	/* Setup GPIO's for PCI INTA */
-	GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_PCI1_INTA);
-	GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_PCI1_INTA);
+	/* Setup GPIOs for PCI INTA */
+	GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI1_INTA);
+	GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI1_INTA);
 
-	/* Setup GPIO's for 33MHz clock output */
-	GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK);
-	GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK);
-	*IXP425_GPIO_GPCLKR = 0x011001FF;
+	/* Setup GPIOs for 33MHz clock output */
+	GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
+	GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
+	writel(0x011001FF, IXP425_GPIO_GPCLKR);
 
-	/* CS5: Debug port */
-	*IXP425_EXP_CS5 = 0x9d520003;
-	/* CS6: HwRel */
-	*IXP425_EXP_CS6 = 0x81860001;
-	/* CS7: LEDs */
-	*IXP425_EXP_CS7 = 0x80900003;
-
-	udelay (533);
-	GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
+	udelay(533);
+	GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
 
-	ACTUX1_LED1 (2);
-	ACTUX1_LED2 (2);
-	ACTUX1_LED3 (0);
-	ACTUX1_LED4 (0);
-	ACTUX1_LED5 (0);
-	ACTUX1_LED6 (0);
-	ACTUX1_LED7 (0);
+	ACTUX1_LED1(2);
+	ACTUX1_LED2(2);
+	ACTUX1_LED3(0);
+	ACTUX1_LED4(0);
+	ACTUX1_LED5(0);
+	ACTUX1_LED6(0);
+	ACTUX1_LED7(0);
 
-	ACTUX1_HS (ACTUX1_HS_DCD);
+	ACTUX1_HS(ACTUX1_HS_DCD);
 
 	return 0;
 }

@@ -87,20 +95,20 @@ int board_init (void)
 /*
  * Check Board Identity
  */
-int checkboard (void)
+int checkboard(void)
 {
-	char *s = getenv ("serial#");
+	char *s = getenv("serial#");
 
-	puts ("Board: AcTux-1 rev.");
-	putc (ACTUX1_BOARDREL + 'A' - 1);
+	puts("Board: AcTux-1 rev.");
+	putc(ACTUX1_BOARDREL + 'A' - 1);
 
 	if (s != NULL) {
-		puts (", serial# ");
-		puts (s);
+		puts(", serial# ");
+		puts(s);
 	}
-	putc ('\n');
+	putc('\n');
 
-	return (0);
+	return 0;
 }
 
 /*************************************************************************

@@ -109,39 +117,36 @@ int checkboard (void)
  * 1 = Rev. A
  * 2 = Rev. B
 
 *************************************************************************/
-u32 get_board_rev (void)
+u32 get_board_rev(void)
 {
 	return ACTUX1_BOARDREL;
 }
 
-int dram_init (void)
+int dram_init(void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-	return (0);
+	gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
+	return 0;
 }
 
-#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
-extern struct pci_controller hose;
-extern void pci_ixp_init (struct pci_controller *hose);
 
-void pci_init_board (void)
+#ifdef CONFIG_PCI
+struct pci_controller hose;
+
+void pci_init_board(void)
 {
-	extern void pci_ixp_init (struct pci_controller *hose);
-	pci_ixp_init (&hose);
+	pci_ixp_init(&hose);
 }
 #endif
 
-void reset_phy (void)
+void reset_phy(void)
 {
 	u16 id1, id2;
 
 	/* initialize the PHY */
-	miiphy_reset ("NPE0", CONFIG_PHY_ADDR);
+	miiphy_reset("NPE0", CONFIG_PHY_ADDR);
 
-	miiphy_read ("NPE0", CONFIG_PHY_ADDR, MII_PHYSID1, &id1);
-	miiphy_read ("NPE0", CONFIG_PHY_ADDR, MII_PHYSID2, &id2);
+	miiphy_read("NPE0", CONFIG_PHY_ADDR, MII_PHYSID1, &id1);
+	miiphy_read("NPE0", CONFIG_PHY_ADDR, MII_PHYSID2, &id2);
 
 	id2 &= 0xFFF0;		/* mask out revision bits */

@@ -152,9 +157,9 @@ void reset_phy (void)
 		 * LED2 (unused) = LINK,
 		 * LED3(red) = Coll
 		 */
-		miiphy_write ("NPE0", CONFIG_PHY_ADDR, 20, 0xD432);
+		miiphy_write("NPE0", CONFIG_PHY_ADDR, 20, 0xD432);
 	} else if (id1 == 0x143 && id2 == 0xbc30) {
 		/* BCM5241: default values are OK */
 	} else
-		printf ("unknown ethernet PHY ID: %x %x\n", id1, id2);
+		printf("unknown ethernet PHY ID: %x %x\n", id1, id2);
 }

board/actux1/config.mk deleted +0 -0

deleted file mode 100644
index 88634f7..0000000

board/actux1/u-boot.lds +29 -12

index 8be2b20..9dbaa6f 100644
@@ -30,15 +30,15 @@ SECTIONS
 
 	. = ALIGN (4);
 	.text : {
-		arch/arm/cpu/ixp/start.o(.text)
-		lib/string.o(.text)
-		lib/vsprintf.o(.text)
-		arch/arm/lib/board.o(.text)
-		common/dlmalloc.o(.text)
-		arch/arm/cpu/ixp/cpu.o(.text)
+		arch/arm/cpu/ixp/start.o(.text*)
+		net/libnet.o(.text*)
+		board/actux1/libactux1.o(.text*)
+		arch/arm/cpu/ixp/libixp.o(.text*)
+		drivers/serial/libserial.o(.text*)
+
 		. = env_offset;
 		common/env_embedded.o(.ppcenv)
-		* (.text)
+		*(.text*)
 	}
 
 	. = ALIGN (4);

@@ -47,7 +47,7 @@ SECTIONS
 	}
 	. = ALIGN (4);
 	.data : {
-		*(.data)
+		*(.data*)
 	}
 	. = ALIGN (4);
 	.got : {

@@ -61,10 +61,27 @@ SECTIONS
 	__u_boot_cmd_end =.;
 
 	. = ALIGN (4);
-	__bss_start =.;
-	.bss (NOLOAD): {
-		*(.bss)
-		. = ALIGN(4);
+	.rel.dyn : {
+		__rel_dyn_start = .;
+		*(.rel*)
+		__rel_dyn_end = .;
+	}
+
+	.dynsym : {
+		__dynsym_start = .;
+		*(.dynsym)
+	}
+
+	.bss __rel_dyn_start (OVERLAY) : {
+		__bss_start = .;
+		*(.bss*)
+		 . = ALIGN(4);
+		_end = .;
 	}
 	__bss_end__ =.;
+	/DISCARD/ : { *(.dynstr*) }
+	/DISCARD/ : { *(.dynamic*) }
+	/DISCARD/ : { *(.plt*) }
+	/DISCARD/ : { *(.interp*) }
+	/DISCARD/ : { *(.gnu*) }
 }

boards.cfg +0 -0

index d25f3f2..b8b17d7 100644
@@ -130,7 +130,10 @@ smdkc100                     arm         armv7      

smdkc100 samsung s5pc210_universal arm armv7
universal_c210 samsung s5pc2xx harmony
arm armv7 harmony nvidia tegra2
seaboard arm armv7 seaboard
nvidia tegra2 -actux1 arm ixp
+actux1_4_16 arm ixp actux1 -
- actux1:FLASH2X2 +actux1_8_16 arm
ixp actux1 - -
actux1:FLASH1X8 +actux1_4_32 arm ixp
actux1 - - actux1:FLASH2X2,RAM_32MB

boards.cfg +1 -1

+actux1_8_32                  arm         ixp         actux1             
-              -           actux1:FLASH1X8,RAM_32MB actux2                
      arm         ixp
 actux3                       arm         ixp
 actux4                       arm         ixp

include/configs/actux1.h +35 -27

index 8886eff..160c10a 100644
@@ -26,13 +26,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-/* 1: modified board with 32MB DRAM */
-#define CONFIG_ACTUX1_32MB		0
-/* 1: 2*2MB FLASH (standard) */
-#define CONFIG_ACTUX1_FLASH2X2		1
-/* 1: 1*8MB FLASH (upgraded boards) */
-#define CONFIG_ACTUX1_FLASH1X8		0
-
 #define CONFIG_IXP425			1
 #define CONFIG_ACTUX1			1
 

@@ -44,17 +37,16 @@
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_BOOTDELAY		3
 #define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0
 */ +#define CONFIG_BOARD_EARLY_INIT_F	1
+#define CONFIG_SYS_LDSCRIPT	"board/actux1/u-boot.lds"
 
 /***************************************************************
  * U-boot generic defines start here.
  ***************************************************************/
-#undef CONFIG_USE_IRQ
-
 /*
  * Size of malloc() pool
  */
 #define CONFIG_SYS_MALLOC_LEN			(CONFIG_ENV_SIZE + 128*1024)
-/* size in bytes reserved for initial data */
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE

@@ -63,8 +55,13 @@
 #include <config_cmd_default.h>
 
 #define CONFIG_CMD_ELF
-#undef CONFIG_CMD_PCI
-#undef CONFIG_PCI
+#ifdef CONFIG_PCI
+#define CONFIG_CMD_PCI
+#define CONFIG_PCI_PNP
+#define CONFIG_IXP_PCI
+#define CONFIG_PCI_SCAN_SHOW
+#define CONFIG_CMD_PCI_ENUM
+#endif
 
 #define CONFIG_BOOTCOMMAND		"run boot_flash"
 /* enable passing of ATAGs */

@@ -94,8 +91,9 @@
 #define CONFIG_SYS_MEMTEST_START		0x00400000
 #define CONFIG_SYS_MEMTEST_END			0x00800000
 
-/* spec says 66.666 MHz, but it appears to be 33 */
-#define CONFIG_SYS_HZ				3333333
+/* timer clock - 2* OSC_IN system clock */
+#define CONFIG_IXP425_TIMER_CLK                 66666666
+#define CONFIG_SYS_HZ				1000
 
 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR			0x00010000

@@ -110,10 +108,6 @@
  * The stack sizes are set up in start.S using the settings below
  */
 #define CONFIG_STACKSIZE		(128*1024)	/* regular stack */
-#ifdef CONFIG_USE_IRQ
-# define CONFIG_STACKSIZE_IRQ		(4*1024)	/* IRQ stack */
-# define CONFIG_STACKSIZE_FIQ		(4*1024)	/* FIQ stack */
-#endif
 
 /* Expansion bus settings */
 #define CONFIG_SYS_EXP_CS0			0xbd113842

@@ -121,9 +115,9 @@
 /* SDRAM settings */
 #define CONFIG_NR_DRAM_BANKS		1
 #define PHYS_SDRAM_1			0x00000000
-#define CONFIG_SYS_DRAM_BASE			0x00000000
+#define CONFIG_SYS_SDRAM_BASE			0x00000000
 
-#if CONFIG_ACTUX1_32MB
+#ifdef CONFIG_RAM_32MB
 # define CONFIG_SYS_SDR_CONFIG			0x18
 # define PHYS_SDRAM_1_SIZE		0x02000000
 # define CONFIG_SYS_SDRAM_REFRESH_CNT		0x81a

@@ -137,8 +131,11 @@
 # define CONFIG_SYS_DRAM_SIZE			0x01000000
 #endif
 
+
+
 /* FLASH organization */
-#if CONFIG_ACTUX1_FLASH2X2
+#define CONFIG_SYS_TEXT_BASE		0x50000000
+#ifdef CONFIG_FLASH2X2
 # define CONFIG_SYS_MAX_FLASH_BANKS		2
 /* max number of sectors on one chip */
 # define CONFIG_SYS_MAX_FLASH_SECT		40

@@ -146,7 +143,7 @@
 # define PHYS_FLASH_2			0x50200000
 # define CONFIG_SYS_FLASH_BANKS_LIST		{ PHYS_FLASH_1, PHYS_FLASH_2 }
 #endif
-#if CONFIG_ACTUX1_FLASH1X8
+#ifdef CONFIG_FLASH1X8
 # define CONFIG_SYS_MAX_FLASH_BANKS		1
 /* max number of sectors on one chip */
 # define CONFIG_SYS_MAX_FLASH_SECT		140

@@ -157,6 +154,7 @@
 #define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
 #define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
 #define CONFIG_SYS_MONITOR_LEN			(256 << 10)
+#define CONFIG_BOARD_SIZE_LIMIT			262144
 
 /* Use common CFI driver */
 #define CONFIG_SYS_FLASH_CFI

@@ -173,12 +171,16 @@
 #define CONFIG_NET_MULTI		1
 /* NPE0 PHY address */
 #define	CONFIG_PHY_ADDR			0
+/* NPE1 PHY address (HW Release E only) */
+#define	CONFIG_PHY1_ADDR		1
 /* MII PHY management */
 #define CONFIG_MII			1
 /* Number of ethernet rx buffers & descriptors */
 #define CONFIG_SYS_RX_ETH_BUFFER		16
 #define CONFIG_RESET_PHY_R		1
 
+#define CONFIG_HAS_ETH1			1
+
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_NET
 #define CONFIG_CMD_MII

@@ -203,17 +205,19 @@
 #define CONFIG_ENV_ADDR			(PHYS_FLASH_1 + 0x4000)
 #define CONFIG_SYS_USE_PPCENV			1
 
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CONFIG_EXTRA_ENV_SETTINGS					\
 	"npe_ucode=50040000\0"						\
 	"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
 	"kerneladdr=50050000\0"						\
+	"kernelfile=actux1/uImage\0"					\
+	"rootfile=actux1/rootfs\0"					\
 	"rootaddr=50170000\0"						\
 	"loadaddr=10000\0"						\
 	"updateboot_ser=mw.b 10000 ff 40000;"				\
 	" loady ${loadaddr};"						\
 	" run eraseboot writeboot\0"					\
 	"updateboot_net=mw.b 10000 ff 40000;"				\
-	" tftp ${loadaddr} u-boot.bin;"					\
+	" tftp ${loadaddr} actux1/u-boot.bin;"				\
 	" run eraseboot writeboot\0"					\
 	"eraseboot=protect off 50000000 50003fff;"			\
 	" protect off 50006000 5003ffff;"				\

@@ -221,8 +225,9 @@
 	" erase 50006000 5003ffff\0"					\
 	"writeboot=cp.b 10000 50000000 4000;"				\
 	" cp.b 16000 50006000 3a000\0"					\
-	"eraseenv=protect off 50004000 50005fff;"			\
-	" erase 50004000 50005fff\0"					\
+	"updateucode=loady;"						\
+	" era ${npe_ucode} +${filesize};"				\
+	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"			\
 	"updateroot=tftp ${loadaddr} ${rootfile};"			\
 	" era ${rootaddr} +${filesize};"				\
 	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0"			\

@@ -233,7 +238,7 @@
 	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
 	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
 	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
-	"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
+	"addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
 	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"	\
 	"boot_flash=run flashargs addtty addeth;"			\
 	" bootm ${kerneladdr}\0"					\

@@ -241,4 +246,8 @@
 	" tftpboot ${loadaddr} ${kernelfile};"				\
 	" bootm\0"
 
+/* additions for new relocation code, must be added to all boards */
+#define CONFIG_SYS_INIT_SP_ADDR						\
+	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+
 #endif /* __CONFIG_H */

Quoted 51 lines · Michael Schwingen

Signed-off-by Michael Schwingen <[email protected]>

---

Changes for V2:
- move -ffunction-sections/--gc-sections to board config.mk
- add wildcard to bss segment in linker script

Changes for V3:
- use I/O accessors
- coding style fixes
- add PCI clock/reset initialization
- use get_ram_size in dram_init
- add PCI support
- remove config.mk
- remove unused definitions from config.h
- add CONFIG_BOARD_SIZE_LIMIT

Changes for V4:
- add changelog
- merge __bss_end change in u-boot.lds from master

 board/actux1/actux1.c    |  111

++++++++++++++++++++++++---------------------- board/actux1/config.mk |

6 ---

 board/actux1/u-boot.lds  |   41 ++++++++++++-----
 boards.cfg               |    5 ++-
 include/configs/actux1.h |   63 +++++++++++++++-----------
 5 files changed, 127 insertions(+), 99 deletions(-)
 delete mode 100644 board/actux1/config.mk

board/actux1/actux1.c +4 -0

index e73aff8..8fb8065 100644
@@ -37,49 +37,57 @@
 
 #include <asm/arch/ixp425.h>
 #include <asm/io.h>
 #include <miiphy.h>
 
+#ifdef CONFIG_PCI
+#include <pci.h>
+#include <asm/arch/ixp425pci.h>
+#endif
 
 #include "actux1_hw.h"
 
 DECLARE_GLOBAL_DATA_PTR;

board/actux1/actux1.c line 58

Quoted 10 lines

board/actux1/actux1.c +8 -1

 
-int board_init (void)
+int board_early_init_f(void)
+{
+	/* CS5: Debug port */
+	writel(0x9d520003, IXP425_EXP_CS5);
+	/* CS6: HwRel */
+	writel(0x81860001, IXP425_EXP_CS6);
+	/* CS7: LEDs */
+	writel(0x80900003, IXP425_EXP_CS7);

Any idea what this magic means ?

Quoted 200 lines

board/actux1/actux1.c +29 -32

+	return 0;
+}
+
+int board_init(void)
 
 {
 
 	gd->bd->bi_arch_number = MACH_TYPE_ACTUX1;
 
 	/* adress of boot parameters */
 	gd->bd->bi_boot_params = 0x00000100;
 
-	GPIO_OUTPUT_CLEAR (CONFIG_SYS_GPIO_IORST);
-	GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_IORST);
+	GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
+	GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
 
-	/* Setup GPIO's for PCI INTA */
-	GPIO_OUTPUT_DISABLE (CONFIG_SYS_GPIO_PCI1_INTA);
-	GPIO_INT_ACT_LOW_SET (CONFIG_SYS_GPIO_PCI1_INTA);
+	/* Setup GPIOs for PCI INTA */
+	GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI1_INTA);
+	GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI1_INTA);
 
-	/* Setup GPIO's for 33MHz clock output */
-	GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_PCI_CLK);
-	GPIO_OUTPUT_ENABLE (CONFIG_SYS_GPIO_EXTBUS_CLK);
-	*IXP425_GPIO_GPCLKR = 0x011001FF;
+	/* Setup GPIOs for 33MHz clock output */
+	GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
+	GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
+	writel(0x011001FF, IXP425_GPIO_GPCLKR);
 
-	/* CS5: Debug port */
-	*IXP425_EXP_CS5 = 0x9d520003;
-	/* CS6: HwRel */
-	*IXP425_EXP_CS6 = 0x81860001;
-	/* CS7: LEDs */
-	*IXP425_EXP_CS7 = 0x80900003;
-
-	udelay (533);
-	GPIO_OUTPUT_SET (CONFIG_SYS_GPIO_IORST);
+	udelay(533);
+	GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
 
-	ACTUX1_LED1 (2);
-	ACTUX1_LED2 (2);
-	ACTUX1_LED3 (0);
-	ACTUX1_LED4 (0);
-	ACTUX1_LED5 (0);
-	ACTUX1_LED6 (0);
-	ACTUX1_LED7 (0);
+	ACTUX1_LED1(2);
+	ACTUX1_LED2(2);
+	ACTUX1_LED3(0);
+	ACTUX1_LED4(0);
+	ACTUX1_LED5(0);
+	ACTUX1_LED6(0);
+	ACTUX1_LED7(0);
 
-	ACTUX1_HS (ACTUX1_HS_DCD);
+	ACTUX1_HS(ACTUX1_HS_DCD);
 
 	return 0;
 
 }

@@ -87,20 +95,20 @@ int board_init (void)
 
 /*
 
  * Check Board Identity
  */
 
-int checkboard (void)
+int checkboard(void)
 
 {
 
-	char *s = getenv ("serial#");
+	char *s = getenv("serial#");
 
-	puts ("Board: AcTux-1 rev.");
-	putc (ACTUX1_BOARDREL + 'A' - 1);
+	puts("Board: AcTux-1 rev.");
+	putc(ACTUX1_BOARDREL + 'A' - 1);
 
 	if (s != NULL) {
 
-		puts (", serial# ");
-		puts (s);
+		puts(", serial# ");
+		puts(s);
 

board/actux1/actux1.c +16 -18

 	}
 
-	putc ('\n');
+	putc('\n');
 
-	return (0);
+	return 0;
 
 }
 
 /***********************************************************************
 **

@@ -109,39 +117,36 @@ int checkboard (void)
 
  * 1 = Rev. A
  * 2 = Rev. B
 
 *************************************************************************
 / -u32 get_board_rev (void)
+u32 get_board_rev(void)
 
 {
 
 	return ACTUX1_BOARDREL;
 
 }
 
-int dram_init (void)
+int dram_init(void)
 
 {
 
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-	return (0);
+	gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
+	return 0;
 
 }
 
-#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
-extern struct pci_controller hose;
-extern void pci_ixp_init (struct pci_controller *hose);
 
-void pci_init_board (void)
+#ifdef CONFIG_PCI
+struct pci_controller hose;
+
+void pci_init_board(void)
 
 {
 
-	extern void pci_ixp_init (struct pci_controller *hose);
-	pci_ixp_init (&hose);
+	pci_ixp_init(&hose);
 
 }
 #endif
 
-void reset_phy (void)
+void reset_phy(void)
 
 {
 
 	u16 id1, id2;
 
 	/* initialize the PHY */
 
-	miiphy_reset ("NPE0", CONFIG_PHY_ADDR);
+	miiphy_reset("NPE0", CONFIG_PHY_ADDR);
 
-	miiphy_read ("NPE0", CONFIG_PHY_ADDR, MII_PHYSID1, &id1);
-	miiphy_read ("NPE0", CONFIG_PHY_ADDR, MII_PHYSID2, &id2);
+	miiphy_read("NPE0", CONFIG_PHY_ADDR, MII_PHYSID1, &id1);
+	miiphy_read("NPE0", CONFIG_PHY_ADDR, MII_PHYSID2, &id2);
 
 	id2 &= 0xFFF0;		/* mask out revision bits */

@@ -152,9 +157,9 @@ void reset_phy (void)
 
 		 * LED2 (unused) = LINK,
 		 * LED3(red) = Coll
 		 */
 
-		miiphy_write ("NPE0", CONFIG_PHY_ADDR, 20, 0xD432);
+		miiphy_write("NPE0", CONFIG_PHY_ADDR, 20, 0xD432);
 
 	} else if (id1 == 0x143 && id2 == 0xbc30) {
 

board/actux1/actux1.c +1 -1

 		/* BCM5241: default values are OK */
 
 	} else
 
-		printf ("unknown ethernet PHY ID: %x %x\n", id1, id2);
+		printf("unknown ethernet PHY ID: %x %x\n", id1, id2);
 
 }

board/actux1/config.mk deleted +0 -0

deleted file mode 100644
index 88634f7..0000000

board/actux1/config.mk line 6

Quoted 6 lines

board/actux1/config.mk deleted +0 -6

@@ -1,6 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x00e00000
-
-# include NPE ethernet driver
-BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o
-
-LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds

Do you need uboot.lds at all ?

Quoted 356 lines

board/actux1/u-boot.lds +7 -7

index 8be2b20..9dbaa6f 100644
@@ -30,15 +30,15 @@ SECTIONS
 
 	. = ALIGN (4);
 	.text : {
 
-		arch/arm/cpu/ixp/start.o(.text)
-		lib/string.o(.text)
-		lib/vsprintf.o(.text)
-		arch/arm/lib/board.o(.text)
-		common/dlmalloc.o(.text)
-		arch/arm/cpu/ixp/cpu.o(.text)
+		arch/arm/cpu/ixp/start.o(.text*)
+		net/libnet.o(.text*)
+		board/actux1/libactux1.o(.text*)
+		arch/arm/cpu/ixp/libixp.o(.text*)
+		drivers/serial/libserial.o(.text*)
+
 
 		. = env_offset;
 		common/env_embedded.o(.ppcenv)
 
-		* (.text)
+		*(.text*)

board/actux1/u-boot.lds +1 -1

 	}
 
 	. = ALIGN (4);

@@ -47,7 +47,7 @@ SECTIONS
 
 	}
 	. = ALIGN (4);
 	.data : {
 
-		*(.data)
+		*(.data*)
 

board/actux1/u-boot.lds +21 -4

 	}
 	. = ALIGN (4);
 	.got : {

@@ -61,10 +61,27 @@ SECTIONS
 
 	__u_boot_cmd_end =.;
 
 	. = ALIGN (4);
 
-	__bss_start =.;
-	.bss (NOLOAD): {
-		*(.bss)
-		. = ALIGN(4);
+	.rel.dyn : {
+		__rel_dyn_start = .;
+		*(.rel*)
+		__rel_dyn_end = .;
+	}
+
+	.dynsym : {
+		__dynsym_start = .;
+		*(.dynsym)
+	}
+
+	.bss __rel_dyn_start (OVERLAY) : {
+		__bss_start = .;
+		*(.bss*)
+		 . = ALIGN(4);
+		_end = .;
 
 	}
 	__bss_end__ =.;
 
+	/DISCARD/ : { *(.dynstr*) }
+	/DISCARD/ : { *(.dynamic*) }
+	/DISCARD/ : { *(.plt*) }
+	/DISCARD/ : { *(.interp*) }
+	/DISCARD/ : { *(.gnu*) }
 
 }

boards.cfg +0 -0

index d25f3f2..b8b17d7 100644
@@ -130,7 +130,10 @@ smdkc100                     arm         armv7

smdkc100 samsung s5pc210_universal arm
armv7

universal_c210 samsung s5pc2xx harmony

arm armv7 harmony nvidia tegra2

seaboard arm armv7 seaboard
nvidia tegra2 -actux1 arm ixp

boards.cfg +1 -1

+actux1_4_16                  arm         ixp         actux1             
-
 
             -           actux1:FLASH2X2 +actux1_8_16                 
             arm
 
        ixp         actux1              -              -

actux1:FLASH1X8 +actux1_4_32 arm ixp
actux1 - - actux1:FLASH2X2,RAM_32MB

boards.cfg +1 -1

+actux1_8_32                  arm         ixp         actux1
-              -           actux1:FLASH1X8,RAM_32MB actux2
 
      arm         ixp
 
 actux3                       arm         ixp
 actux4                       arm         ixp

include/configs/actux1.h +0 -7

index 8886eff..160c10a 100644
@@ -26,13 +26,6 @@
 
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-/* 1: modified board with 32MB DRAM */
-#define CONFIG_ACTUX1_32MB		0
-/* 1: 2*2MB FLASH (standard) */
-#define CONFIG_ACTUX1_FLASH2X2		1
-/* 1: 1*8MB FLASH (upgraded boards) */
-#define CONFIG_ACTUX1_FLASH1X8		0
-
 
 #define CONFIG_IXP425			1

#define CONFIG_ACTUX1 1

include/configs/actux1.h +1 -2

@@ -44,17 +37,16 @@
 
 #define CONFIG_BAUDRATE			115200
 #define CONFIG_BOOTDELAY		3
 #define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on
 bootdelay==0
 
 */ +#define CONFIG_BOARD_EARLY_INIT_F	1
+#define CONFIG_SYS_LDSCRIPT	"board/actux1/u-boot.lds"
 
 /***************************************************************
 
  * U-boot generic defines start here.
  ***************************************************************/
 
-#undef CONFIG_USE_IRQ
-
 
 /*

* Size of malloc() pool
*/

#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)

include/configs/actux1.h +7 -3

-/* size in bytes reserved for initial data */
 
 /* allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE

@@ -63,8 +55,13 @@
 
 #include <config_cmd_default.h>
 
 #define CONFIG_CMD_ELF
 
-#undef CONFIG_CMD_PCI
-#undef CONFIG_PCI
+#ifdef CONFIG_PCI
+#define CONFIG_CMD_PCI
+#define CONFIG_PCI_PNP
+#define CONFIG_IXP_PCI
+#define CONFIG_PCI_SCAN_SHOW
+#define CONFIG_CMD_PCI_ENUM
+#endif
 

#define CONFIG_BOOTCOMMAND "run boot_flash"
/* enable passing of ATAGs */

include/configs/actux1.h +3 -2

@@ -94,8 +91,9 @@
 
 #define CONFIG_SYS_MEMTEST_START		0x00400000
 #define CONFIG_SYS_MEMTEST_END			0x00800000
 
-/* spec says 66.666 MHz, but it appears to be 33 */
-#define CONFIG_SYS_HZ				3333333
+/* timer clock - 2* OSC_IN system clock */
+#define CONFIG_IXP425_TIMER_CLK                 66666666
+#define CONFIG_SYS_HZ				1000
 
 /* default load address */

#define CONFIG_SYS_LOAD_ADDR 0x00010000

include/configs/actux1.h +0 -4

@@ -110,10 +108,6 @@
 
  * The stack sizes are set up in start.S using the settings below
  */
 
 #define CONFIG_STACKSIZE		(128*1024)	/* regular stack */
 
-#ifdef CONFIG_USE_IRQ
-# define CONFIG_STACKSIZE_IRQ		(4*1024)	/* IRQ stack */
-# define CONFIG_STACKSIZE_FIQ		(4*1024)	/* FIQ stack */
-#endif

/* Expansion bus settings */
#define CONFIG_SYS_EXP_CS0 0xbd113842

include/configs/actux1.h +2 -2

@@ -121,9 +115,9 @@
 
 /* SDRAM settings */
 #define CONFIG_NR_DRAM_BANKS		1
 #define PHYS_SDRAM_1			0x00000000
 
-#define CONFIG_SYS_DRAM_BASE			0x00000000
+#define CONFIG_SYS_SDRAM_BASE			0x00000000
 
-#if CONFIG_ACTUX1_32MB
+#ifdef CONFIG_RAM_32MB
 

 # define CONFIG_SYS_SDR_CONFIG			0x18
 # define PHYS_SDRAM_1_SIZE		0x02000000
 # define CONFIG_SYS_SDRAM_REFRESH_CNT		0x81a

include/configs/actux1.h +4 -1

@@ -137,8 +131,11 @@
 
 # define CONFIG_SYS_DRAM_SIZE			0x01000000
 #endif
 
+
+
 
 /* FLASH organization */
 
-#if CONFIG_ACTUX1_FLASH2X2
+#define CONFIG_SYS_TEXT_BASE		0x50000000
+#ifdef CONFIG_FLASH2X2

 # define CONFIG_SYS_MAX_FLASH_BANKS		2
 /* max number of sectors on one chip */
 # define CONFIG_SYS_MAX_FLASH_SECT		40

include/configs/actux1.h +1 -1

@@ -146,7 +143,7 @@
 
 # define PHYS_FLASH_2			0x50200000
 # define CONFIG_SYS_FLASH_BANKS_LIST		{ PHYS_FLASH_1, PHYS_FLASH_2 }
 #endif
 
-#if CONFIG_ACTUX1_FLASH1X8
+#ifdef CONFIG_FLASH1X8
 

 # define CONFIG_SYS_MAX_FLASH_BANKS		1
 /* max number of sectors on one chip */
 # define CONFIG_SYS_MAX_FLASH_SECT		140

include/configs/actux1.h +1 -0

@@ -157,6 +154,7 @@
 
 #define CONFIG_SYS_FLASH_BASE			PHYS_FLASH_1
 #define CONFIG_SYS_MONITOR_BASE		PHYS_FLASH_1
 #define CONFIG_SYS_MONITOR_LEN			(256 << 10)
 
+#define CONFIG_BOARD_SIZE_LIMIT			262144
 

/* Use common CFI driver */
#define CONFIG_SYS_FLASH_CFI

include/configs/actux1.h +4 -0

@@ -173,12 +171,16 @@
 
 #define CONFIG_NET_MULTI		1
 /* NPE0 PHY address */
 #define	CONFIG_PHY_ADDR			0
 
+/* NPE1 PHY address (HW Release E only) */
+#define	CONFIG_PHY1_ADDR		1
 
 /* MII PHY management */
 #define CONFIG_MII			1
 /* Number of ethernet rx buffers & descriptors */
 #define CONFIG_SYS_RX_ETH_BUFFER		16
 #define CONFIG_RESET_PHY_R		1
 
+#define CONFIG_HAS_ETH1			1
+

#define CONFIG_CMD_DHCP
#define CONFIG_CMD_NET
#define CONFIG_CMD_MII

include/configs/actux1.h +7 -4

@@ -203,17 +205,19 @@
 
 #define CONFIG_ENV_ADDR			(PHYS_FLASH_1 + 0x4000)
 #define CONFIG_SYS_USE_PPCENV			1
 
-#define CONFIG_EXTRA_ENV_SETTINGS \
+#define CONFIG_EXTRA_ENV_SETTINGS					\
 
 	"npe_ucode=50040000\0"						\
 	"mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
 	"kerneladdr=50050000\0"						\
 
+	"kernelfile=actux1/uImage\0"					\
+	"rootfile=actux1/rootfs\0"					\
 
 	"rootaddr=50170000\0"						\
 	"loadaddr=10000\0"						\
 	"updateboot_ser=mw.b 10000 ff 40000;"				\
 	" loady ${loadaddr};"						\
 	" run eraseboot writeboot\0"					\
 	"updateboot_net=mw.b 10000 ff 40000;"				\
 
-	" tftp ${loadaddr} u-boot.bin;"					\
+	" tftp ${loadaddr} actux1/u-boot.bin;"				\
 
 	" run eraseboot writeboot\0"					\
 	"eraseboot=protect off 50000000 50003fff;"			\
 	" protect off 50006000 5003ffff;"				\

@@ -221,8 +225,9 @@
 
 	" erase 50006000 5003ffff\0"					\
 	"writeboot=cp.b 10000 50000000 4000;"				\
 	" cp.b 16000 50006000 3a000\0"					\
 
-	"eraseenv=protect off 50004000 50005fff;"			\
-	" erase 50004000 50005fff\0"					\
+	"updateucode=loady;"						\
+	" era ${npe_ucode} +${filesize};"				\
+	" cp.b ${loadaddr} ${npe_ucode} ${filesize}\0"			\
 

include/configs/actux1.h +1 -1

 	"updateroot=tftp ${loadaddr} ${rootfile};"			\
 	" era ${rootaddr} +${filesize};"				\
 	" cp.b ${loadaddr} ${rootaddr} ${filesize}\0"			\

@@ -233,7 +238,7 @@
 
 	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
 	"netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3"	\
 	" rootfstype=squashfs,jffs2 init=/etc/preinit\0"		\
 
-	"addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
+	"addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
 

include/configs/actux1.h +0 -0

 	"addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0"	\
 	"boot_flash=run flashargs addtty addeth;"			\
 	" bootm ${kerneladdr}\0"					\

@@ -241,4 +246,8 @@
 
 	" tftpboot ${loadaddr} ${kernelfile};"				\
 	" bootm\0"
 

Quoted 6 lines

include/configs/actux1.h +4 -0

+/* additions for new relocation code, must be added to all boards */
+#define CONFIG_SYS_INIT_SP_ADDR						\
+	(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
+

#endif /* __CONFIG_H */

Quoted 34 lines · Michael Schwingen

Quoted 33 lines

Signed-off-by Michael Schwingen <[email protected]>

---

Changes for V2:
- move -ffunction-sections/--gc-sections to board config.mk
- add wildcard to bss segment in linker script

Changes for V3:
- use I/O accessors
- coding style fixes
- add PCI clock/reset initialization
- use get_ram_size in dram_init
- add PCI support
- remove config.mk
- remove unused definitions from config.h
- add CONFIG_BOARD_SIZE_LIMIT

Changes for V4:
- add changelog
- merge __bss_end change in u-boot.lds from master

 board/actux1/actux1.c    |  111

++++++++++++++++++++++++---------------------- board/actux1/config.mk |

6 ---

 board/actux1/u-boot.lds  |   41 ++++++++++++-----
 boards.cfg               |    5 ++-
 include/configs/actux1.h |   63 +++++++++++++++-----------
 5 files changed, 127 insertions(+), 99 deletions(-)
 delete mode 100644 board/actux1/config.mk

Quoted 3 lines

board/actux1/actux1.c

Quoted 2 lines

board/actux1/actux1.c +0 -0

index e73aff8..8fb8065 100644

btw this one doesn't apply for me. Can you please update according to u-boot- pxa.git ? Thanks !

I applied 0001,2,3,4,5,7 so far.

board/actux1/actux1.c line 56

Quoted 10 lines

board/actux1/actux1.c +8 -1

-int board_init (void)
+int board_early_init_f(void)
+{
+	/* CS5: Debug port */
+	writel(0x9d520003, IXP425_EXP_CS5);
+	/* CS6: HwRel */
+	writel(0x81860001, IXP425_EXP_CS6);
+	/* CS7: LEDs */
+	writel(0x80900003, IXP425_EXP_CS7);

Any idea what this magic means ?

Quoted 5 lines

board/actux1/config.mk deleted +0 -0

deleted file mode 100644
index 88634f7..0000000

board/actux1/config.mk line 6

Quoted 7 lines

board/actux1/config.mk deleted +0 -6

@@ -1,6 +0,0 @@
-CONFIG_SYS_TEXT_BASE = 0x00e00000
-
-# include NPE ethernet driver
-BOARDLIBS = arch/arm/cpu/ixp/npe/libnpe.o
-
-LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds

Do you need uboot.lds at all ?