OMAP3: Change some USB related MUX settings to values used by the kernel.

PATCH New Alexander Holler 4 participants 10 messages Apr 1, 2011 – May 28, 2011

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Arm (32-bit) Arm/actions semi architecture

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Alexander Holler

author

2011-04-01 22:37 UTC #0 lore raw

PATCH 1/3 OMAP3: Change some USB related MUX settings to values used by the kernel.

Signed-off-by Alexander Holler <[email protected]>

---
 board/ti/beagle/beagle.h |   27 ++++++++++++++-------------
 1 files changed, 14 insertions(+), 13 deletions(-)

board/ti/beagle/beagle.h +14 ~~-13~~

index b22b653..abb69e7 100644
@@ -273,18 +273,18 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MCSPI1_CS1),		(IDIS | PTD | EN  | M0)) /*McSPI1_CS1*/\
 	MUX_VAL(CP(MCSPI1_CS2),		(IDIS | PTD | DIS | M4)) /*GPIO_176*/\
  /* USB EHCI (port 2) */\
-	MUX_VAL(CP(MCSPI1_CS3),		(IEN  | PTU | DIS | M3)) /*HSUSB2_DATA2*/\
-	MUX_VAL(CP(MCSPI2_CLK),		(IEN  | PTU | DIS | M3)) /*HSUSB2_DATA7*/\
-	MUX_VAL(CP(MCSPI2_SIMO),	(IEN  | PTU | DIS | M3)) /*HSUSB2_DATA4*/\
-	MUX_VAL(CP(MCSPI2_SOMI),	(IEN  | PTU | DIS | M3)) /*HSUSB2_DATA5*/\
-	MUX_VAL(CP(MCSPI2_CS0),		(IEN  | PTU | DIS | M3)) /*HSUSB2_DATA6*/\
-	MUX_VAL(CP(MCSPI2_CS1),		(IEN  | PTU | DIS | M3)) /*HSUSB2_DATA3*/\
-	MUX_VAL(CP(ETK_D10_ES2),	(IDIS | PTU | DIS | M3)) /*HSUSB2_CLK*/\
-	MUX_VAL(CP(ETK_D11_ES2),	(IDIS | PTU | DIS | M3)) /*HSUSB2_STP*/\
-	MUX_VAL(CP(ETK_D12_ES2),	(IEN  | PTU | DIS | M3)) /*HSUSB2_DIR*/\
-	MUX_VAL(CP(ETK_D13_ES2),	(IEN  | PTU | DIS | M3)) /*HSUSB2_NXT*/\
-	MUX_VAL(CP(ETK_D14_ES2),	(IEN  | PTU | DIS | M3)) /*HSUSB2_DATA0*/\
-	MUX_VAL(CP(ETK_D15_ES2),	(IEN  | PTU | DIS | M3)) /*HSUSB2_DATA1*/\
+	MUX_VAL(CP(MCSPI1_CS3),		(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA2*/\
+	MUX_VAL(CP(MCSPI2_CLK),		(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA7*/\
+	MUX_VAL(CP(MCSPI2_SIMO),	(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA4*/\
+	MUX_VAL(CP(MCSPI2_SOMI),	(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA5*/\
+	MUX_VAL(CP(MCSPI2_CS0),		(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA6*/\
+	MUX_VAL(CP(MCSPI2_CS1),		(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA3*/\
+	MUX_VAL(CP(ETK_D10_ES2),	(IDIS | PTD | DIS | M3)) /*HSUSB2_CLK*/\
+	MUX_VAL(CP(ETK_D11_ES2),	(IDIS | PTD | DIS | M3)) /*HSUSB2_STP*/\
+	MUX_VAL(CP(ETK_D12_ES2),	(IEN  | PTD | EN  | M3)) /*HSUSB2_DIR*/\
+	MUX_VAL(CP(ETK_D13_ES2),	(IEN  | PTD | EN  | M3)) /*HSUSB2_NXT*/\
+	MUX_VAL(CP(ETK_D14_ES2),	(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA0*/\
+	MUX_VAL(CP(ETK_D15_ES2),	(IEN  | PTD | EN  | M3)) /*HSUSB2_DATA1*/\
  /*Control and debug */\
 	MUX_VAL(CP(SYS_32K),		(IEN  | PTD | DIS | M0)) /*SYS_32K*/\
 	MUX_VAL(CP(SYS_CLKREQ),		(IEN  | PTD | DIS | M0)) /*SYS_CLKREQ*/\

@@ -383,7 +383,8 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MCBSP3_CLKX),	(IEN  | PTD | DIS | M4)) /*GPIO_141*/\
 	MUX_VAL(CP(UART2_CTS),		(IEN  | PTU | EN  | M0)) /*UART2_CTS*/\
 	MUX_VAL(CP(UART2_RTS),		(IDIS | PTD | DIS | M0)) /*UART2_RTS*/\
-	MUX_VAL(CP(UART2_TX),		(IDIS | PTD | DIS | M0)) /*UART2_TX*/
+	MUX_VAL(CP(UART2_TX),		(IDIS | PTD | DIS | M0)) /*UART2_TX*/\
+	MUX_VAL(CP(UART2_RX),		(IDIS | PTU | EN  | M4)) /*GPIO_147*/
 
 #define MUX_BEAGLE_XM() \
 	MUX_VAL(CP(GPMC_NCS5),		(IDIS | PTD | EN  | M4)) /*GPIO_56*/\

Signature · 1 line

1.7.3.4

Alexander Holler

author

2011-04-01 22:37 UTC #1 lore raw

PATCH 2/3 OMAP3: Add support for DPLL5 (usbhost)

Signed-off-by Alexander Holler <[email protected]>

---
 arch/arm/cpu/armv7/omap3/clock.c               |   20 ++++++++++++++++++
 arch/arm/cpu/armv7/omap3/lowlevel_init.S       |   22 ++++++++++++++++++++
 arch/arm/include/asm/arch-omap3/clocks.h       |    1 +
 arch/arm/include/asm/arch-omap3/clocks_omap3.h |   26 ++++++++++++++++++++++++
 arch/arm/include/asm/arch-omap3/cpu.h          |   21 ++++++++++++++----
 5 files changed, 85 insertions(+), 5 deletions(-)

arch/arm/cpu/armv7/omap3/clock.c +20 -0

index 2238c52..3d38d08 100644
@@ -278,6 +278,25 @@ static void dpll4_init_34xx(u32 sil_index, u32 clk_index)
 	wait_on_value(ST_PERIPH_CLK, 2, &prcm_base->idlest_ckgen, LDELAY);
 }
 
+static void dpll5_init_34xx(u32 sil_index, u32 clk_index)
+{
+	struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
+	dpll_param *ptr = (dpll_param *) get_per2_dpll_param();
+
+	/* Moving it to the right sysclk base */
+	ptr = ptr + clk_index;
+
+	/* PER2 DPLL (DPLL5) */
+	sr32(&prcm_base->clken2_pll, 0, 3, PLL_STOP);
+	wait_on_value(1, 0, &prcm_base->idlest2_ckgen, LDELAY);
+	sr32(&prcm_base->clksel5_pll, 0, 5, ptr->m2); /* set M2 (usbtll_fck) */
+	sr32(&prcm_base->clksel4_pll, 8, 11, ptr->m); /* set m (11-bit multiplier) */
+	sr32(&prcm_base->clksel4_pll, 0, 7, ptr->n); /* set n (7-bit divider)*/
+	sr32(&prcm_base->clken_pll, 4, 4, ptr->fsel);   /* FREQSEL */
+	sr32(&prcm_base->clken2_pll, 0, 3, PLL_LOCK);   /* lock mode */
+	wait_on_value(1, 1, &prcm_base->idlest2_ckgen, LDELAY);
+}
+
 static void mpu_init_34xx(u32 sil_index, u32 clk_index)
 {
 	struct prcm *prcm_base = (struct prcm *)PRCM_BASE;

@@ -587,6 +606,7 @@ void prcm_init(void)
 
 		dpll3_init_34xx(sil_index, clk_index);
 		dpll4_init_34xx(sil_index, clk_index);
+		dpll5_init_34xx(sil_index, clk_index);
 		iva_init_34xx(sil_index, clk_index);
 		mpu_init_34xx(sil_index, clk_index);

arch/arm/cpu/armv7/omap3/lowlevel_init.S +22 -0

index 109481e..1458072 100644
@@ -360,6 +360,28 @@ get_per_dpll_param:
 	adr	r0, per_dpll_param
 	mov	pc, lr
 
+/* PER2 DPLL values */
+per2_dpll_param:
+/* 12MHz */
+.word PER2_M_12, PER2_N_12, PER2_FSEL_12, PER2_M2_12
+
+/* 13MHz */
+.word PER2_M_13, PER2_N_13, PER2_FSEL_13, PER2_M2_13
+
+/* 19.2MHz */
+.word PER2_M_19P2, PER2_N_19P2, PER2_FSEL_19P2, PER2_M2_19P2
+
+/* 26MHz */
+.word PER2_M_26, PER2_N_26, PER2_FSEL_26, PER2_M2_26
+
+/* 38.4MHz */
+.word PER2_M_38P4, PER2_N_38P4, PER2_FSEL_38P4, PER2_M2_38P4
+
+.globl get_per2_dpll_param
+get_per2_dpll_param:
+	adr	r0, per2_dpll_param
+	mov	pc, lr
+
 /*
  * Tables for 36XX/37XX devices
  *

arch/arm/include/asm/arch-omap3/clocks.h +1 -0

index 40f80ba..bed0002 100644
@@ -68,6 +68,7 @@ extern dpll_param *get_mpu_dpll_param(void);
 extern dpll_param *get_iva_dpll_param(void);
 extern dpll_param *get_core_dpll_param(void);
 extern dpll_param *get_per_dpll_param(void);
+extern dpll_param *get_per2_dpll_param(void);
 
 extern dpll_param *get_36x_mpu_dpll_param(void);
 extern dpll_param *get_36x_iva_dpll_param(void);

arch/arm/include/asm/arch-omap3/clocks_omap3.h +26 -0

index 30ef690..ef600dd 100644
@@ -282,6 +282,32 @@
 #define PER_FSEL_38P4		0x07
 #define PER_M2_38P4		0x09
 
+/* PER2 DPLL */
+#define PER2_M_12		0x78
+#define PER2_N_12		0x0B
+#define PER2_FSEL_12		0x03
+#define PER2_M2_12		0x01
+
+#define PER2_M_13		0x78
+#define PER2_N_13		0x0C
+#define PER2_FSEL_13		0x03
+#define PER2_M2_13		0x01
+
+#define PER2_M_19P2		0x2EE
+#define PER2_N_19P2		0x0B
+#define PER2_FSEL_19P2		0x06
+#define PER2_M2_19P2		0x0A
+
+#define PER2_M_26		0x78
+#define PER2_N_26		0x0C
+#define PER2_FSEL_26		0x03
+#define PER2_M2_26		0x01
+
+#define PER2_M_38P4		0x2EE
+#define PER2_N_38P4		0x0B
+#define PER2_FSEL_38P4		0x06
+#define PER2_M2_38P4		0x0A
+
 /* 36XX PER DPLL */
 
 #define PER_36XX_M_12		0x1B0

arch/arm/include/asm/arch-omap3/cpu.h +16 -5

index 962d6d4..e944de7 100644
@@ -347,10 +347,13 @@ struct prcm {
 	u32 clksel2_pll_mpu;	/* 0x944 */
 	u8 res6[0xb8];
 	u32 fclken1_core;	/* 0xa00 */
-	u8 res7[0xc];
+	u32 res_fclken2_core;
+	u32 fclken3_core;	/* 0xa08 */
+	u8 res7[0x4];
 	u32 iclken1_core;	/* 0xa10 */
 	u32 iclken2_core;	/* 0xa14 */
-	u8 res8[0x28];
+	u32 iclken3_core;	/* 0xa18 */
+	u8 res8[0x24];
 	u32 clksel_core;	/* 0xa40 */
 	u8 res9[0xbc];
 	u32 fclken_gfx;		/* 0xb00 */

@@ -368,13 +371,17 @@ struct prcm {
 	u32 clksel_wkup;	/* 0xc40 */
 	u8 res16[0xbc];
 	u32 clken_pll;		/* 0xd00 */
-	u8 res17[0x1c];
+	u32 clken2_pll;	        /* 0xd04 */
+	u8 res17[0x18];
 	u32 idlest_ckgen;	/* 0xd20 */
-	u8 res18[0x1c];
+	u32 idlest2_ckgen;	/* 0xd24 */
+	u8 res18[0x18];
 	u32 clksel1_pll;	/* 0xd40 */
 	u32 clksel2_pll;	/* 0xd44 */
 	u32 clksel3_pll;	/* 0xd48 */
-	u8 res19[0xb4];
+	u32 clksel4_pll;	/* 0xd4c */
+	u32 clksel5_pll;	/* 0xd50 */
+	u8 res19[0xac];
 	u32 fclken_dss;		/* 0xe00 */
 	u8 res20[0xc];
 	u32 iclken_dss;		/* 0xe10 */

@@ -394,6 +401,10 @@ struct prcm {
 	u32 clksel_per;		/* 0x1040 */
 	u8 res28[0xfc];
 	u32 clksel1_emu;	/* 0x1140 */
+	u8 res29[0x2bc];
+	u32 fclken_usbhost;	/* 0x1400 */
+	u8 res30[0xc];
+	u32 iclken_usbhost;	/* 0x1410 */
 };
 #else /* __ASSEMBLY__ */
 #define CM_CLKSEL_CORE		0x48004a40

Signature · 1 line

1.7.3.4

Alexander Holler

author

2011-04-01 22:37 UTC #2 lore raw

PATCH 3/3 omap3_beagle: enable EHCI and USB storage.

In reply to Alexander Holler

The reset sequence/configuration for ehci is highly board specific, so this will be done in the source for the board, instead of introducing several CONFIG_* which would be needed to make those few lines in beagle.c usable across different OMAP boards.

Signed-off-by Alexander Holler <[email protected]>

---
 arch/arm/include/asm/arch-omap3/ehci_omap3.h |   58 ++++++++++++++
 board/ti/beagle/beagle.c                     |  106 ++++++++++++++++++++++++++
 include/configs/omap3_beagle.h               |    6 ++
 3 files changed, 170 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-omap3/ehci_omap3.h

arch/arm/include/asm/arch-omap3/ehci_omap3.h new file +58 -0

new file mode 100644
index 0000000..cd01f50
@@ -0,0 +1,58 @@
+/*
+ * (C) Copyright 2011
+ * Alexander Holler <[email protected]>
+ *
+ * Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37
+ *
+ * See there for additional Copyrights.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+#ifndef _EHCI_OMAP3_H_
+#define _EHCI_OMAP3_H_
+
+/* USB/EHCI registers */
+#define OMAP3_USBTLL_BASE				0x48062000UL
+#define OMAP3_UHH_BASE					0x48064000UL
+#define OMAP3_EHCI_BASE					0x48064800UL
+
+/* TLL Register Set */
+#define	OMAP_USBTLL_SYSCONFIG				(0x10)
+#define	OMAP_USBTLL_SYSCONFIG_SOFTRESET			(1 << 1)
+#define	OMAP_USBTLL_SYSCONFIG_ENAWAKEUP			(1 << 2)
+#define	OMAP_USBTLL_SYSCONFIG_SIDLEMODE			(1 << 3)
+#define	OMAP_USBTLL_SYSCONFIG_CACTIVITY			(1 << 8)
+
+#define	OMAP_USBTLL_SYSSTATUS				(0x14)
+#define	OMAP_USBTLL_SYSSTATUS_RESETDONE			(1 << 0)
+
+/* UHH Register Set */
+#define	OMAP_UHH_SYSCONFIG				(0x10)
+#define	OMAP_UHH_SYSCONFIG_SOFTRESET			(1 << 1)
+#define	OMAP_UHH_SYSCONFIG_CACTIVITY			(1 << 8)
+#define	OMAP_UHH_SYSCONFIG_SIDLEMODE			(1 << 3)
+#define	OMAP_UHH_SYSCONFIG_ENAWAKEUP			(1 << 2)
+#define	OMAP_UHH_SYSCONFIG_MIDLEMODE			(1 << 12)
+
+#define	OMAP_UHH_HOSTCONFIG				(0x40)
+#define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN		(1 << 2)
+#define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN		(1 << 3)
+#define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN		(1 << 4)
+
+#endif /* _EHCI_OMAP3_H_ */

board/ti/beagle/beagle.c +106 -0

117 lines not on this page · raw message

include/configs/omap3_beagle.h +6 -0

index 5cfa4cb..ba34e8a 100644
@@ -121,6 +121,11 @@
 #define CONFIG_USB_TTY			1
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
 
+/* USB EHCI */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+
 /* commands to include */
 #include <config_cmd_default.h>

@@ -137,6 +142,7 @@
 
 #define CONFIG_CMD_I2C		/* I2C serial bus support	*/
 #define CONFIG_CMD_MMC		/* MMC support			*/
+#define CONFIG_USB_STORAGE	/* USB storage support		*/
 #define CONFIG_CMD_NAND		/* NAND support			*/
 
 #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/

Signature · 1 line

1.7.3.4

Paulraj

2011-04-19 13:33 UTC #3 lore raw

PATCH 3/3 omap3_beagle: enable EHCI and USB storage.

Quoted 10 lines

The reset sequence/configuration for ehci is highly board specific, so this will be done in the source for the board, instead of introducing several CONFIG_* which would be needed to make those few lines in beagle.c usable across different OMAP boards.
Signed-off-by Alexander Holler <[email protected]>
---

Thanks

Pushed to u-boot-ti.

In one patch I changed the patch subject line as it was too long.

--Sandeep

Christian Spielberger

2011-05-26 11:30 UTC #4 lore raw

PATCH 3/3 omap3_beagle: enable EHCI and USB storage.

In reply to Alexander Holler

Hi Alexander Holler,

is EHCI on omap3 already working?

On my beagleboard xM

usb start

hangs at this position in method ehci_hcd_init:

+ /* perform TLL soft reset, and wait until reset is complete */
+ writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET,
+ OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);

regards,
chris.

Alexander Holler

author

2011-05-26 15:41 UTC #5 lore raw

PATCH 3/3 omap3_beagle: enable EHCI and USB storage.

Am 26.05.2011 13:30, schrieb Christian Spielberger:

Quoted 6 lines

Hi Alexander Holler,
is EHCI on omap3 already working?
On my beagleboard xM

Quoted 7 lines

usb start
hangs at this position in method ehci_hcd_init:
+ /* perform TLL soft reset, and wait until reset is complete */
+ writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET,
+ OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);

It works on a normal BeagleBoard (720 MHz). On the XM it seems you have either move the initialization of the usb-clocks a bit upwards (e.g. before the reset of the phy) or you have to add a check if the clock runs after it was initialized (before that writel). The XM seems to be too fast and the peripheral-clock isn't ready when that writel wants to write to the peripheral-register, therefor it hangs there on a XM.

But even than USB doesn't seem to work on a BeagleBoard XM (at least some people told me so). I don't have a XM, so I can't help more there. It might be a problem with (a needed reset of) the HUB which is included on the XM, I don't know.

And a side note: don't try a kernel compiled with gcc 4.6 on the BeagleBoard. EHCI on the OMAP3 doesn't come up here when the kernel is compiled with gcc 4.6. That seems to be specific to OMAP, I don't have those problems on other ARM hw (I use successfull e.g. EHCI on some armv5 devices with kernels which are compiled with gcc 4.6).When I compile the same kernel using gcc 4.5.2 I have no problems with EHCI on the BeagleBoard. Haven't investigated that further.

Regards,

Alexander

Alexander Holler

author

2011-05-27 07:34 UTC #6 lore raw

PATCH 3/3 omap3_beagle: enable EHCI and USB storage.

Am 26.05.2011 17:41, schrieb Alexander Holler:

Quoted 1 line

Am 26.05.2011 13:30, schrieb Christian Spielberger:

...

Quoted 4 lines

But even than USB doesn't seem to work on a BeagleBoard XM (at least some people told me so). I don't have a XM, so I can't help more there. It might be a problem with (a needed reset of) the HUB which is included on the XM, I don't know.

I forgot to mention that the PHY reset on the XM works inverse than for the BeagleBoard w/o XM. Haven't known this, when I've written that patch.

Regards,

Alexander

Christian Spielberger

2011-05-27 09:40 UTC #7 lore raw

PATCH 3/3 omap3_beagle: enable EHCI and USB storage.

Quoted 8 lines · Alexander Holler

Am 26.05.2011 17:41, schrieb Alexander Holler:
Quoted 1 line
Am 26.05.2011 13:30, schrieb Christian Spielberger:
...
Quoted 4 lines
But even than USB doesn't seem to work on a BeagleBoard XM (at least some people told me so). I don't have a XM, so I can't help more there. It might be a problem with (a needed reset of) the HUB which is included on the XM, I don't know.

Quoted 8 lines

I forgot to mention that the PHY reset on the XM works inverse than for the BeagleBoard w/o XM. Haven't known this, when I've written that patch.
Regards,
Alexander

We checked what you mentioned but found that the PHY reset is identical between XM and C4. The reset signal is ok. That is what we saw on an oscilloscope.

We also found that the USB2HS_CLK initialization does not work, also with the oscilloscope. I am going to check the CLK initialization sequence in beagle.c/ehci_hcd_init.

regards,
chris.

Alexander Holler

author

2011-05-27 11:24 UTC #8 lore raw

PATCH 3/3 omap3_beagle: enable EHCI and USB storage.

Am 27.05.2011 11:40, schrieb Christian Spielberger:

Quoted 18 lines · Alexander Holler

Quoted 8 lines
Am 26.05.2011 17:41, schrieb Alexander Holler:
Quoted 1 line
Am 26.05.2011 13:30, schrieb Christian Spielberger:
...
Quoted 4 lines
But even than USB doesn't seem to work on a BeagleBoard XM (at least some people told me so). I don't have a XM, so I can't help more there. It might be a problem with (a needed reset of) the HUB which is included on the XM, I don't know.
Quoted 8 lines
I forgot to mention that the PHY reset on the XM works inverse than for the BeagleBoard w/o XM. Haven't known this, when I've written that patch.
Regards,
Alexander

Quoted 7 lines

We checked what you mentioned but found that the PHY reset is identical between XM and C4. The reset signal is ok. That is what we saw on an oscilloscope.
We also found that the USB2HS_CLK initialization does not work, also with the oscilloscope. I am going to check the CLK initialization sequence in beagle.c/ehci_hcd_init.

It seems the PHY reset was only inverted for XM-A and XM-B and got again the same as in the C4 with XM-C.

I've looked up in my mailbox and found a quick and dirty hack from Koen Kooi with which he comes at least through the initialization on the XM:

http://dominion.thruhere.net/koen/angstrom/beagleboard/uboot/hacks.diff

But I think he stopped working on that topic, waiting for feedback from other people.

You might ask on the mailing list for the BeagleBoard about the status.

Regards,

Alexander

Christian Spielberger

2011-05-28 08:55 UTC #9 lore raw

PATCH 3/3 omap3_beagle: enable EHCI and USB storage.

Quoted 35 lines · Alexander Holler

Am 27.05.2011 11:40, schrieb Christian Spielberger:
Quoted 18 lines · Alexander Holler
Quoted 8 lines
Am 26.05.2011 17:41, schrieb Alexander Holler:
Quoted 1 line
Am 26.05.2011 13:30, schrieb Christian Spielberger:
...
Quoted 4 lines
But even than USB doesn't seem to work on a BeagleBoard XM (at least some people told me so). I don't have a XM, so I can't help more there. It might be a problem with (a needed reset of) the HUB which is included on the XM, I don't know.
Quoted 8 lines
I forgot to mention that the PHY reset on the XM works inverse than for the BeagleBoard w/o XM. Haven't known this, when I've written that patch.
Regards,
Alexander
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We checked what you mentioned but found that the PHY reset is identical between XM and C4. The reset signal is ok. That is what we saw on an oscilloscope.
We also found that the USB2HS_CLK initialization does not work, also with the oscilloscope. I am going to check the CLK initialization sequence in beagle.c/ehci_hcd_init.
It seems the PHY reset was only inverted for XM-A and XM-B and got again the same as in the C4 with XM-C.
I've looked up in my mailbox and found a quick and dirty hack from Koen Kooi with which he comes at least through the initialization on the XM:
http://dominion.thruhere.net/koen/angstrom/beagleboard/uboot/hacks.diff

Quoted 8 lines

But I think he stopped working on that topic, waiting for feedback from other people.
You might ask on the mailing list for the BeagleBoard about the status.
Regards,
Alexander

Hi Alexander, hi Koen,

@Alexander:
Thanks for your input! I could not find any difference in the schematics between C4, xM-A2, xM-A3 (which should be the same as xM-B, see
http://beagleboard.org/hardware/design!). Anyway, I'll check the lines:

MUX_VAL(CP(UART2_RX), (IDIS | PTU | EN | M4)) /*GPIO_147*/

in the defines of MUX_BEAGLE_C and MUX_BEAGLE_XM (board/ti/beagle/beagle.h) on Monday. I'am not sure if PTU is correct if a pull down resistor is used.

@Koen: We tried your hack

http://dominion.thruhere.net/koen/angstrom/beagleboard/uboot/hacks.diff

for a proper initialization of the omap3 ehci with both versions of PHY reset levels. Thus we removed the soft reset and the following initialization of the USBTLL. The result: U-boot hangs at the first writel after invoking "usb start".
We assume the reason for that is a faulty initialization of the usb clk for the DM3730 at lines 377-388 in board/ti/beagle/beagle.cpp. We also inserted an udelay after the CLK initialization with no result.

Did you have any luck with your efforts on the xM? What was the reason for removing the USBTLL soft reset and initialization?

regards,
chris.