Add RAM configuration independent of x-loader or CH

@@ -8,6 +8,8 @@
   * Copyright (C) 2004-2010
   * Texas Instruments Incorporated - http://www.ti.com/
   *
+ * Copyright (C) 2011 Simon Schwarz <[email protected]>
+ *
   * Author :
   *     Vaibhav Hiremath <[email protected]>
   *

@@ -133,13 +135,38 @@ void do_sdrc_init(u32 cs, u32 early)
  		sdelay(0x20000);
  	}
 
+#ifdef CONFIG_PRELOADER
+	/* If we use a SPL there is no x-loader nor config header so we have
+	 * to do the job ourselfs
+	 */
+	if (cs == CS0) {
+		sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+
+		/* General SDRC config */
+		writel(V_MCFG, &sdrc_base->cs[cs].mcfg);
+		writel(V_RFR_CTRL, &sdrc_base->cs[cs].rfr_ctrl);
+
+		/* AC timings */
+		writel(V_ACTIMA_165, &sdrc_actim_base0->ctrla);
+		writel(V_ACTIMB_165, &sdrc_actim_base0->ctrlb);
+
+		/* Initialize */
+		writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+		writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+		writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+		writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+
+		writel(V_MR, &sdrc_base->cs[cs].mr);
+	}
+#endif
+
  	/*
  	 * SDRC timings are set up by x-load or config header
  	 * We don't need to redo them here.
  	 * Older x-loads configure only CS0
  	 * configure CS1 to handle this ommission
  	 */
-	if (cs) {
+	if (cs == CS1) {
  		sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
  		sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
  		writel(readl(&sdrc_base->cs[CS0].mcfg),

@@ -3,6 +3,8 @@
   * Texas Instruments, <www.ti.com>
   * Richard Woodruff <[email protected]>
   *
+ * (C) Copyright 2011 Simon Schwarz <[email protected]>
+ *
   * See file CREDITS for list of people who contributed to this
   * project.
   *

@@ -128,6 +130,32 @@ enum {
  		(MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) |	\
  		(MICRON_TWTR_165 << 16))
 
+#define MICRON_RAMTYPE			0x1
+#define MICRON_DDRTYPE			0x0
+#define MICRON_DEEPPD			0x1
+#define MICRON_B32NOT16			0x0
+#define MICRON_BANKALLOCATION	0x0
+#define MICRON_RAMSIZE			(PHYS_SDRAM_1_SIZE/2)
+#define MICRON_ADDMUXLEGACY		0x1
+#define MICRON_CASWIDTH			0x4
+#define MICRON_RASWIDTH			0x1
+#define MICRON_LOCKSTATUS		0x0
+#define MICRON_V_MCFG ((MICRON_LOCKSTATUS << 30) | (MICRON_RASWIDTH <<