API Rewrite

index eac4ffb..c05a39d 100644
@@ -106,13 +106,6 @@ int timer_init (void)
 	return 0;
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	gd->lastinc = GPTCNT; /* capture current incrementer value time */
-	gd->tbl = 0; /* start "advancing" time stamp from 0 */
-}
-
 unsigned long long get_ticks (void)
 {
 	ulong now = GPTCNT; /* current tick value */

index 6f1ebbf..73bf4a7 100644
@@ -41,6 +41,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static void reset_timer_masked (void)
+{
+	/* reset time */
+	gd->lastinc = READ_TIMER;	/* capture current incrementer value time */
+	gd->tbl = 0;			/* start "advancing" time stamp from 0 */
+}
+
 int timer_init (void)
 {
 	int32_t val;

@@ -85,13 +92,6 @@ void __udelay (unsigned long usec)
 		/*NOP*/;
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	gd->lastinc = READ_TIMER;	/* capture current incrementer value time */
-	gd->tbl = 0;			/* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked (void)
 {
 	ulong now = READ_TIMER;		/* current tick value */

index bc21f86..f16a37b 100644
@@ -135,13 +135,6 @@ ulong get_tbclk(void)
 	return (ulong)(timer_load_val / 100);
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = read_timer();
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	unsigned long long res = get_ticks();

index 9cd7fee..fa9c5a2 100644
@@ -233,13 +233,6 @@ void __udelay (unsigned long usec)
 #endif
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastdec = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_masked (void)
 {
 	ulong now = READ_TIMER;

index 374cc25..c321e28 100644
@@ -82,14 +82,6 @@ void __udelay(unsigned long usec)
 	udelay_masked(usec);
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
-	gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
-	gd->tbl = 0;
-}
-
 ulong get_timer_raw(void)
 {
 	at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;

index 9a1ae85..fbe74b6 100644
@@ -81,13 +81,6 @@ void __udelay (unsigned long usec)
 	udelay_masked(usec);
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastinc = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_raw (void)
 {
 	ulong now = READ_TIMER;

index f19ec61..a3990a7 100644
@@ -91,12 +91,6 @@ unsigned long get_timer(unsigned long base)
 	return get_timer_masked() - base;
 }
 
-void reset_timer_masked(void)
-{
-	read_timer();
-	timer.ticks = 0;
-}
-
 void __udelay(unsigned long usec)
 {
 	unsigned long long target;

@@ -123,7 +117,9 @@ int timer_init(void)
 	writel(TIMER_ENABLE | TIMER_CLKSEL,
 		&timer_regs->timer3.control);
 
-	reset_timer_masked();
+	/* Reset the timer */
+	read_timer();
+	timer.ticks = 0;
 
 	return 0;
 }

index cdb2148..6141bd4 100644
@@ -43,7 +43,9 @@ int timer_init (void)
 	TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */
 	TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */
 
-	reset_timer_masked();
+	/* Reset the timer */
+	TCTL1 &= ~TCTL_TEN;
+	TCTL1 |= TCTL_TEN; /* Enable timer */
 
 	return (0);
 }

@@ -56,12 +58,6 @@ ulong get_timer (ulong base)
 	return get_timer_masked() - base;
 }
 
-void reset_timer_masked (void)
-{
-	TCTL1 &= ~TCTL_TEN;
-	TCTL1 |= TCTL_TEN; /* Enable timer */
-}
-
 ulong get_timer_masked (void)
 {
 	return TCN1;

index c78fd90..234fe91 100644
@@ -33,7 +33,11 @@ ulong timer_ticks;
 
 int timer_init (void)
 {
-	reset_timer_masked();
+	/* Set the hadware timer for 1ms */
+	ks8695_write(KS8695_TIMER1, TIMER_COUNT);
+	ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
+	ks8695_write(KS8695_TIMER_CTRL, 0x2);
+	timer_ticks = 0;
 
 	return 0;
 }

@@ -46,15 +50,6 @@ int timer_init (void)
 #define	TIMER_COUNT	(TIMER_INTERVAL / 2)
 #define	TIMER_PULSE	TIMER_COUNT
 
-void reset_timer_masked(void)
-{
-	/* Set the hadware timer for 1ms */
-	ks8695_write(KS8695_TIMER1, TIMER_COUNT);
-	ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
-	ks8695_write(KS8695_TIMER_CTRL, 0x2);
-	timer_ticks = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	/* Check for timer wrap */

index 9c71b80..9571870 100644
@@ -101,13 +101,6 @@ void __udelay (unsigned long usec)
 		/*NOP*/;
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = READ_TIMER();
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong tmr = get_ticks();

index 9c965e0..1b9386b 100644
@@ -56,7 +56,9 @@ int timer_init (void)
 		CONFIG_SYS_TIMERBASE + CNTL_TIMER);
 
 	/* init the timestamp and lastdec value */
-	reset_timer_masked();
+	lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
+			(TIMER_CLOCK / CONFIG_SYS_HZ);
+	timestamp = 0;	       /* start "advancing" time stamp from 0 */
 
 	return 0;
 }

@@ -85,14 +87,6 @@ void __udelay (unsigned long usec)
 	}
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
-			(TIMER_CLOCK / CONFIG_SYS_HZ);
-	timestamp = 0;	       /* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked (void)
 {
 	uint32_t now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /

index 86da0ce..82a6d7b 100644
@@ -77,13 +77,6 @@ ulong read_timer(void)
 	return(readl(&armd1timers->cvwr));
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	gd->tbl = read_timer();
-	gd->tbu = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = read_timer();

@@ -142,7 +135,8 @@ int timer_init(void)
 	/* Enable timer 0 */
 	writel(0x1, &armd1timers->cer);
 	/* init the gd->tbu and gd->tbl value */
-	reset_timer_masked();
+	gd->tbl = read_timer();
+	gd->tbu = 0;
 
 	return 0;
 }

index 5beb3f5..b4f6cf8 100644
@@ -88,13 +88,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define timestamp gd->tbl
 #define lastdec gd->lastinc
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = READ_TIMER;

@@ -154,7 +147,8 @@ int timer_init(void)
 	writel(cntmrctrl, CNTMR_CTRL_REG);
 
 	/* init the timestamp and lastdec value */
-	reset_timer_masked();
+	lastdec = READ_TIMER;
+	timestamp = 0;
 
 	return 0;
 }

index 5f54085..8f38056 100644
@@ -68,7 +68,9 @@ int timer_init(void)
 
 	writel(ctrl, &timer->control);
 
-	reset_timer_masked();
+	/* capture current value time */
+	lastdec = readl(&timer->value);
+	timestamp = 0; /* start "advancing" time stamp from 0 */
 
 	return 0;
 }

@@ -94,16 +96,6 @@ unsigned long long get_ticks(void)
 	return timestamp;
 }
 
-void reset_timer_masked(void)
-{
-	struct mb86r0x_timer * timer = (struct mb86r0x_timer *)
-					MB86R0x_TIMER_BASE;
-
-	/* capture current value time */
-	lastdec = readl(&timer->value);
-	timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked(void)
 {
 	return tick_to_time(get_ticks());

index 9a84b50..131d600 100644
@@ -121,15 +121,6 @@ int timer_init(void)
 	return 0;
 }
 
-void reset_timer_masked(void)
-{
-	struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
-	/* reset time */
-	/* capture current incrementer value time */
-	lastinc = readl(&gpt->counter);
-	timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
 unsigned long long get_ticks (void)
 {
 	struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;

index 058dbee..df76d16 100644
@@ -124,15 +124,6 @@ int timer_init(void)
 	return 0;
 }
 
-void reset_timer_masked(void)
-{
-	struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
-	/* reset time */
-	/* capture current incrementer value time */
-	lastinc = readl(&regs->gpt_tcn);
-	timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
 unsigned long long get_ticks (void)
 {
 	struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;

index 5bc43c8..17df68f 100644
@@ -95,13 +95,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define timestamp gd->tbl
 #define lastdec gd->lastinc
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = read_timer();
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = read_timer();

@@ -171,5 +164,6 @@ int timer_init(void)
 void timer_init_r(void)
 {
 	/* init the timestamp and lastdec value */
-	reset_timer_masked();
+	lastdec = read_timer();
+	timestamp = 0;
 }

index 2727adc..c71162a 100644
@@ -85,13 +85,6 @@ ulong read_timer(void)
 	return val;
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	gd->tbl = read_timer();
-	gd->tbu = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = read_timer();

@@ -151,7 +144,8 @@ int timer_init(void)
 	/* Enable timer 0 */
 	writel(0x1, &panthtimers->cer);
 	/* init the gd->tbu and gd->tbl value */
-	reset_timer_masked();
+	gd->tbl = read_timer();
+	gd->tbu = 0;
 
 	return 0;
 }

index cbef34f..1dc7860 100644
@@ -68,7 +68,9 @@ int timer_init(void)
 	/* auto reload, start timer */
 	writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
 
-	reset_timer_masked();
+	/* Reset the timer */
+	lastdec = READ_TIMER();
+	timestamp = 0;
 
 	return 0;
 }

@@ -97,13 +99,6 @@ void __udelay(unsigned long usec)
 		;
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = READ_TIMER();
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = READ_TIMER();

index 4525beb..2544b08 100644
@@ -52,6 +52,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int timer_init(void)
 {
 	int i;
+	ulong val;
 
 	/* setup GP Timer 1 */
 	__raw_writel(GPTCR_SWR, &cur_gpt->control);

@@ -65,15 +66,12 @@ int timer_init(void)
 	/* Freerun Mode, PERCLK1 input */
 	i = __raw_readl(&cur_gpt->control);
 	__raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
-	reset_timer_masked();
-	return 0;
-}
 
-void reset_timer_masked(void)
-{
-	ulong val = __raw_readl(&cur_gpt->counter);
+	val = __raw_readl(&cur_gpt->counter);
 	lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ);
 	timestamp = 0;
+
+	return 0;
 }
 
 ulong get_timer_masked(void)

index 4756e26..9f8bc93 100644
@@ -55,7 +55,9 @@ int timer_init(void)
 	writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
 		&timer_base->tclr);
 
-	reset_timer_masked();	/* init the timestamp and lastinc value */
+	/* reset time, capture current incrementer value time */
+	gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
+	gd->tbl = 0;		/* start "advancing" time stamp from 0 */
 
 	return 0;
 }

@@ -84,13 +86,6 @@ void __udelay(unsigned long usec)
 	}
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time, capture current incrementer value time */
-	gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
-	gd->tbl = 0;		/* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked(void)
 {
 	/* current tick value */

index 2761c12..0b9fa64 100644
@@ -69,13 +69,6 @@ void __udelay(unsigned long usec)
 	}
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time, capture current incrementer value time */
-	gd->lastinc = readl(&timer_base->cntr_1us) / (TIMER_CLK/CONFIG_SYS_HZ);
-	gd->tbl = 0;		/* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now;

index 44dae9a..2866745 100644
@@ -59,7 +59,7 @@ static inline unsigned long long us_to_tick(unsigned long long us)
 
 int timer_init (void)
 {
-	reset_timer_masked();
+	writel(0, OSCR);
 
 	return 0;
 }

@@ -74,12 +74,6 @@ void __udelay (unsigned long usec)
 	udelay_masked (usec);
 }
 
-
-void reset_timer_masked (void)
-{
-	writel(0, OSCR);
-}
-
 ulong get_timer_masked (void)
 {
 	return tick_to_time(get_ticks());

index ce48952..6c2f066 100644
@@ -78,13 +78,6 @@ void __udelay (unsigned long usec)
 		/*NOP*/;
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastdec = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_masked (void)
 {
 	ulong now = READ_TIMER;

index 694c03a..53bec0b 100644
@@ -44,12 +44,6 @@ void __udelay (unsigned long usec)
 	udelay_masked (usec);
 }
 
-
-void reset_timer_masked (void)
-{
-	OSCR = 0;
-}
-
 ulong get_timer_masked (void)
 {
 	return OSCR;

index 6734e8d..f10a026 100644
@@ -95,7 +95,10 @@ int timer_init (void)
 
 	/* init the timestamp */
 	total_count = 0ULL;
-	reset_timer_masked();
+	/* capure current decrementer value    */
+	lastdec	  = READ_TIMER;
+	/* start "advancing" time stamp from 0 */
+	timestamp = 0L;
 
 	div_timer = CONFIG_SYS_HZ_CLOCK;
 	do_div(div_timer, CONFIG_SYS_HZ);

@@ -129,14 +132,6 @@ void __udelay (unsigned long usec)
 	}
 }
 
-void reset_timer_masked (void)
-{
-	/* capure current decrementer value    */
-	lastdec	  = READ_TIMER;
-	/* start "advancing" time stamp from 0 */
-	timestamp = 0L;
-}
-
 /* converts the timer reading to U-Boot ticks	       */
 /* the timestamp is the number of ticks since reset    */
 ulong get_timer_masked (void)

index eac4ffb..c05a39d 100644
@@ -106,13 +106,6 @@ int timer_init (void)
 	return 0;
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	gd->lastinc = GPTCNT; /* capture current incrementer value time */
-	gd->tbl = 0; /* start "advancing" time stamp from 0 */
-}
-
 unsigned long long get_ticks (void)
 {
 	ulong now = GPTCNT; /* current tick value */

index 6f1ebbf..73bf4a7 100644
@@ -41,6 +41,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+static void reset_timer_masked (void)
+{
+	/* reset time */
+	gd->lastinc = READ_TIMER;	/* capture current incrementer value time */
+	gd->tbl = 0;			/* start "advancing" time stamp from 0 */
+}
+
 int timer_init (void)
 {
 	int32_t val;

@@ -85,13 +92,6 @@ void __udelay (unsigned long usec)
 		/*NOP*/;
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	gd->lastinc = READ_TIMER;	/* capture current incrementer value time */
-	gd->tbl = 0;			/* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked (void)
 {
 	ulong now = READ_TIMER;		/* current tick value */

index bc21f86..f16a37b 100644
@@ -135,13 +135,6 @@ ulong get_tbclk(void)
 	return (ulong)(timer_load_val / 100);
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = read_timer();
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	unsigned long long res = get_ticks();

index 9cd7fee..fa9c5a2 100644
@@ -233,13 +233,6 @@ void __udelay (unsigned long usec)
 #endif
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastdec = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_masked (void)
 {
 	ulong now = READ_TIMER;

index 374cc25..c321e28 100644
@@ -82,14 +82,6 @@ void __udelay(unsigned long usec)
 	udelay_masked(usec);
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
-	gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
-	gd->tbl = 0;
-}
-
 ulong get_timer_raw(void)
 {
 	at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;

index 9a1ae85..fbe74b6 100644
@@ -81,13 +81,6 @@ void __udelay (unsigned long usec)
 	udelay_masked(usec);
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastinc = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_raw (void)
 {
 	ulong now = READ_TIMER;

index f19ec61..a3990a7 100644
@@ -91,12 +91,6 @@ unsigned long get_timer(unsigned long base)
 	return get_timer_masked() - base;
 }
 
-void reset_timer_masked(void)
-{
-	read_timer();
-	timer.ticks = 0;
-}
-
 void __udelay(unsigned long usec)
 {
 	unsigned long long target;

@@ -123,7 +117,9 @@ int timer_init(void)
 	writel(TIMER_ENABLE | TIMER_CLKSEL,
 		&timer_regs->timer3.control);
 
-	reset_timer_masked();
+	/* Reset the timer */
+	read_timer();
+	timer.ticks = 0;
 
 	return 0;
 }

index cdb2148..6141bd4 100644
@@ -43,7 +43,9 @@ int timer_init (void)
 	TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */
 	TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */
 
-	reset_timer_masked();
+	/* Reset the timer */
+	TCTL1 &= ~TCTL_TEN;
+	TCTL1 |= TCTL_TEN; /* Enable timer */
 
 	return (0);
 }

@@ -56,12 +58,6 @@ ulong get_timer (ulong base)
 	return get_timer_masked() - base;
 }
 
-void reset_timer_masked (void)
-{
-	TCTL1 &= ~TCTL_TEN;
-	TCTL1 |= TCTL_TEN; /* Enable timer */
-}
-
 ulong get_timer_masked (void)
 {
 	return TCN1;

index c78fd90..234fe91 100644
@@ -33,7 +33,11 @@ ulong timer_ticks;
 
 int timer_init (void)
 {
-	reset_timer_masked();
+	/* Set the hadware timer for 1ms */
+	ks8695_write(KS8695_TIMER1, TIMER_COUNT);
+	ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
+	ks8695_write(KS8695_TIMER_CTRL, 0x2);
+	timer_ticks = 0;
 
 	return 0;
 }

@@ -46,15 +50,6 @@ int timer_init (void)
 #define	TIMER_COUNT	(TIMER_INTERVAL / 2)
 #define	TIMER_PULSE	TIMER_COUNT
 
-void reset_timer_masked(void)
-{
-	/* Set the hadware timer for 1ms */
-	ks8695_write(KS8695_TIMER1, TIMER_COUNT);
-	ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
-	ks8695_write(KS8695_TIMER_CTRL, 0x2);
-	timer_ticks = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	/* Check for timer wrap */

index 9c71b80..9571870 100644
@@ -101,13 +101,6 @@ void __udelay (unsigned long usec)
 		/*NOP*/;
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = READ_TIMER();
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong tmr = get_ticks();

index 9c965e0..1b9386b 100644
@@ -56,7 +56,9 @@ int timer_init (void)
 		CONFIG_SYS_TIMERBASE + CNTL_TIMER);
 
 	/* init the timestamp and lastdec value */
-	reset_timer_masked();
+	lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
+			(TIMER_CLOCK / CONFIG_SYS_HZ);
+	timestamp = 0;	       /* start "advancing" time stamp from 0 */
 
 	return 0;
 }

@@ -85,14 +87,6 @@ void __udelay (unsigned long usec)
 	}
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastdec = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /
-			(TIMER_CLOCK / CONFIG_SYS_HZ);
-	timestamp = 0;	       /* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked (void)
 {
 	uint32_t now = __raw_readl(CONFIG_SYS_TIMERBASE + READ_TIM) /

index 86da0ce..82a6d7b 100644
@@ -77,13 +77,6 @@ ulong read_timer(void)
 	return(readl(&armd1timers->cvwr));
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	gd->tbl = read_timer();
-	gd->tbu = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = read_timer();

@@ -142,7 +135,8 @@ int timer_init(void)
 	/* Enable timer 0 */
 	writel(0x1, &armd1timers->cer);
 	/* init the gd->tbu and gd->tbl value */
-	reset_timer_masked();
+	gd->tbl = read_timer();
+	gd->tbu = 0;
 
 	return 0;
 }

index 5beb3f5..b4f6cf8 100644
@@ -88,13 +88,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define timestamp gd->tbl
 #define lastdec gd->lastinc
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = READ_TIMER;

@@ -154,7 +147,8 @@ int timer_init(void)
 	writel(cntmrctrl, CNTMR_CTRL_REG);
 
 	/* init the timestamp and lastdec value */
-	reset_timer_masked();
+	lastdec = READ_TIMER;
+	timestamp = 0;
 
 	return 0;
 }

index 5f54085..8f38056 100644
@@ -68,7 +68,9 @@ int timer_init(void)
 
 	writel(ctrl, &timer->control);
 
-	reset_timer_masked();
+	/* capture current value time */
+	lastdec = readl(&timer->value);
+	timestamp = 0; /* start "advancing" time stamp from 0 */
 
 	return 0;
 }

@@ -94,16 +96,6 @@ unsigned long long get_ticks(void)
 	return timestamp;
 }
 
-void reset_timer_masked(void)
-{
-	struct mb86r0x_timer * timer = (struct mb86r0x_timer *)
-					MB86R0x_TIMER_BASE;
-
-	/* capture current value time */
-	lastdec = readl(&timer->value);
-	timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked(void)
 {
 	return tick_to_time(get_ticks());

index 9a84b50..131d600 100644
@@ -121,15 +121,6 @@ int timer_init(void)
 	return 0;
 }
 
-void reset_timer_masked(void)
-{
-	struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;
-	/* reset time */
-	/* capture current incrementer value time */
-	lastinc = readl(&gpt->counter);
-	timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
 unsigned long long get_ticks (void)
 {
 	struct gpt_regs *gpt = (struct gpt_regs *)IMX_GPT1_BASE;

index 058dbee..df76d16 100644
@@ -124,15 +124,6 @@ int timer_init(void)
 	return 0;
 }
 
-void reset_timer_masked(void)
-{
-	struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;
-	/* reset time */
-	/* capture current incrementer value time */
-	lastinc = readl(&regs->gpt_tcn);
-	timestamp = 0; /* start "advancing" time stamp from 0 */
-}
-
 unsigned long long get_ticks (void)
 {
 	struct gpt_regs *regs = (struct gpt_regs *)IMX_TIM1_BASE;

index 5bc43c8..17df68f 100644
@@ -95,13 +95,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define timestamp gd->tbl
 #define lastdec gd->lastinc
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = read_timer();
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = read_timer();

@@ -171,5 +164,6 @@ int timer_init(void)
 void timer_init_r(void)
 {
 	/* init the timestamp and lastdec value */
-	reset_timer_masked();
+	lastdec = read_timer();
+	timestamp = 0;
 }

index 2727adc..c71162a 100644
@@ -85,13 +85,6 @@ ulong read_timer(void)
 	return val;
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	gd->tbl = read_timer();
-	gd->tbu = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = read_timer();

@@ -151,7 +144,8 @@ int timer_init(void)
 	/* Enable timer 0 */
 	writel(0x1, &panthtimers->cer);
 	/* init the gd->tbu and gd->tbl value */
-	reset_timer_masked();
+	gd->tbl = read_timer();
+	gd->tbu = 0;
 
 	return 0;
 }

index cbef34f..1dc7860 100644
@@ -68,7 +68,9 @@ int timer_init(void)
 	/* auto reload, start timer */
 	writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
 
-	reset_timer_masked();
+	/* Reset the timer */
+	lastdec = READ_TIMER();
+	timestamp = 0;
 
 	return 0;
 }

@@ -97,13 +99,6 @@ void __udelay(unsigned long usec)
 		;
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time */
-	lastdec = READ_TIMER();
-	timestamp = 0;
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now = READ_TIMER();

index 4525beb..2544b08 100644
@@ -52,6 +52,7 @@ DECLARE_GLOBAL_DATA_PTR;
 int timer_init(void)
 {
 	int i;
+	ulong val;
 
 	/* setup GP Timer 1 */
 	__raw_writel(GPTCR_SWR, &cur_gpt->control);

@@ -65,15 +66,12 @@ int timer_init(void)
 	/* Freerun Mode, PERCLK1 input */
 	i = __raw_readl(&cur_gpt->control);
 	__raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt->control);
-	reset_timer_masked();
-	return 0;
-}
 
-void reset_timer_masked(void)
-{
-	ulong val = __raw_readl(&cur_gpt->counter);
+	val = __raw_readl(&cur_gpt->counter);
 	lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ);
 	timestamp = 0;
+
+	return 0;
 }
 
 ulong get_timer_masked(void)

index 4756e26..9f8bc93 100644
@@ -55,7 +55,9 @@ int timer_init(void)
 	writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST,
 		&timer_base->tclr);
 
-	reset_timer_masked();	/* init the timestamp and lastinc value */
+	/* reset time, capture current incrementer value time */
+	gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
+	gd->tbl = 0;		/* start "advancing" time stamp from 0 */
 
 	return 0;
 }

@@ -84,13 +86,6 @@ void __udelay(unsigned long usec)
 	}
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time, capture current incrementer value time */
-	gd->lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
-	gd->tbl = 0;		/* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked(void)
 {
 	/* current tick value */

index 2761c12..0b9fa64 100644
@@ -69,13 +69,6 @@ void __udelay(unsigned long usec)
 	}
 }
 
-void reset_timer_masked(void)
-{
-	/* reset time, capture current incrementer value time */
-	gd->lastinc = readl(&timer_base->cntr_1us) / (TIMER_CLK/CONFIG_SYS_HZ);
-	gd->tbl = 0;		/* start "advancing" time stamp from 0 */
-}
-
 ulong get_timer_masked(void)
 {
 	ulong now;

index 44dae9a..2866745 100644
@@ -59,7 +59,7 @@ static inline unsigned long long us_to_tick(unsigned long long us)
 
 int timer_init (void)
 {
-	reset_timer_masked();
+	writel(0, OSCR);
 
 	return 0;
 }

@@ -74,12 +74,6 @@ void __udelay (unsigned long usec)
 	udelay_masked (usec);
 }
 
-
-void reset_timer_masked (void)
-{
-	writel(0, OSCR);
-}
-
 ulong get_timer_masked (void)
 {
 	return tick_to_time(get_ticks());

index ce48952..6c2f066 100644
@@ -78,13 +78,6 @@ void __udelay (unsigned long usec)
 		/*NOP*/;
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastdec = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_masked (void)
 {
 	ulong now = READ_TIMER;

index 694c03a..53bec0b 100644
@@ -44,12 +44,6 @@ void __udelay (unsigned long usec)
 	udelay_masked (usec);
 }
 
-
-void reset_timer_masked (void)
-{
-	OSCR = 0;
-}
-
 ulong get_timer_masked (void)
 {
 	return OSCR;

index 6734e8d..f10a026 100644
@@ -95,7 +95,10 @@ int timer_init (void)
 
 	/* init the timestamp */
 	total_count = 0ULL;
-	reset_timer_masked();
+	/* capure current decrementer value    */
+	lastdec	  = READ_TIMER;
+	/* start "advancing" time stamp from 0 */
+	timestamp = 0L;
 
 	div_timer = CONFIG_SYS_HZ_CLOCK;
 	do_div(div_timer, CONFIG_SYS_HZ);

@@ -129,14 +132,6 @@ void __udelay (unsigned long usec)
 	}
 }
 
-void reset_timer_masked (void)
-{
-	/* capure current decrementer value    */
-	lastdec	  = READ_TIMER;
-	/* start "advancing" time stamp from 0 */
-	timestamp = 0L;
-}
-
 /* converts the timer reading to U-Boot ticks	       */
 /* the timestamp is the number of ticks since reset    */
 ulong get_timer_masked (void)

index 340e585..9735d47 100644
@@ -584,11 +584,29 @@ void	timer_interrupt	   (struct pt_regs *);
 void	external_interrupt (struct pt_regs *);
 void	irq_install_handler(int, interrupt_handler_t *, void *);
 void	irq_free_handler   (int);
-void	reset_timer	   (void);
-ulong	get_timer	   (ulong base);
 void	enable_interrupts  (void);
 int	disable_interrupts (void);
 
+/*
+ * Timer API
+ */
+void reset_timer (void);
+ulong get_timer (ulong base);
+u64 get_ticks(void);
+void wait_ticks(unsigned long);
+void __udelay(unsigned long);
+ulong usec2ticks(unsigned long usec);
+ulong ticks2usec(unsigned long ticks);
+int init_timebase(void);
+
+/* lib/time.c */
+void udelay(unsigned long);
+
+u32 time_now_ms(void);
+u32 time_since_ms(u32 from, u32 to);
+u32 time_max_since_ms(u32 from, u32 to);
+u32 time_resolution_ms(void);
+
 /* $(CPU)/.../commproc.c */
 int	dpram_init (void);
 uint	dpram_base(void);

@@ -616,17 +634,6 @@ void	flush_cache   (unsigned long, unsigned long);
 void	flush_dcache_range(unsigned long start, unsigned long stop);
 void	invalidate_dcache_range(unsigned long start, unsigned long stop);
 
-
-/* arch/$(ARCH)/lib/ticks.S */
-unsigned long long get_ticks(void);
-void	wait_ticks    (unsigned long);
-
-/* arch/$(ARCH)/lib/time.c */
-void	__udelay      (unsigned long);
-ulong	usec2ticks    (unsigned long usec);
-ulong	ticks2usec    (unsigned long ticks);
-int	init_timebase (void);
-
 /* lib/gunzip.c */
 int gunzip(void *, int, unsigned char *, unsigned long *);
 int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp,

@@ -644,9 +651,6 @@ void qsort(void *base, size_t nmemb, size_t size,
 	   int(*compar)(const void *, const void *));
 int strcmp_compar(const void *, const void *);
 
-/* lib/time.c */
-void	udelay        (unsigned long);
-
 /* lib/vsprintf.c */
 ulong	simple_strtoul(const char *cp,char **endp,unsigned int base);
 int strict_strtoul(const char *cp, unsigned int base, unsigned long *res);

index a309c26..1563507 100644
@@ -41,3 +41,29 @@ void udelay(unsigned long usec)
 		usec -= kv;
 	} while(usec);
 }
+
+u32 time_since_ms(u32 from)
+{
+	u32 delta = time_now_ms() - from;
+
+	/* round down */
+	if (delta < time_ms_resolution())
+		return 0;
+
+	return delta - time_resolution_ms();
+}
+
+u32 time_max_since_ms(u32 from)
+{
+	u32 delta = time_now_ms() - from;
+
+	return delta + time_resolution_ms();
+}
+
+__attribute__((weak))
+u32 time_resolution_ms(void) {return 1;}
+
+u32 time_now_ms(void)
+{
+	return get_timer(0);
+}

index 2198017..c8cc195 100644
@@ -88,17 +88,16 @@ static void mg_dump_status (const char *msg, unsigned int stat, unsigned err)
 static unsigned int mg_wait (u32 expect, u32 msec)
 {
 	u8 status;
-	u32 from, cur, err;
+	u32 ts, err;
 
 	err = MG_ERR_NONE;
 #ifdef CONFIG_NIOS2
 	reset_timer();
 #endif
-	from = get_timer(0);
+	ts = time_now_ms();
 
 	status = readb(mg_base() + MG_REG_STATUS);
 	do {
-		cur = get_timer(from);
 		if (status & MG_REG_STATUS_BIT_BUSY) {
 			if (expect == MG_REG_STATUS_BIT_BUSY)
 				break;

@@ -119,9 +118,9 @@ static unsigned int mg_wait (u32 expect, u32 msec)
 					break;
 		}
 		status = readb(mg_base() + MG_REG_STATUS);
-	} while (cur < msec);
+	} while (time_since_ms(ts) < msec);
 
-	if (cur >= msec)
+	if (time_since_ms(ts) >= msec)
 		err = MG_ERR_TIMEOUT;
 
 	return err;

index 3ac6c80..dad80c5 100644
@@ -563,7 +563,7 @@ static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 			       ulong tout, char *prompt)
 {
-	ulong start;
+	u32 start;
 
 #if CONFIG_SYS_HZ != 1000
 	if ((ulong)CONFIG_SYS_HZ > 100000)

@@ -576,9 +576,9 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 #ifdef CONFIG_NIOS2
 	reset_timer();
 #endif
-	start = get_timer (0);
+	start = time_now_ms();
 	while (flash_is_busy (info, sector)) {
-		if (get_timer (start) > tout) {
+		if (time_since_ms(start) > tout) {
 			printf ("Flash %s timeout at address %lx data %lx\n",
 				prompt, info->start[sector],
 				flash_read_long (info, sector, 0));

@@ -653,7 +653,7 @@ static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 			     ulong tout, char *prompt)
 {
 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
-	ulong start;
+	u32 start;
 	int ready;
 
 #if CONFIG_SYS_HZ != 1000

@@ -667,7 +667,7 @@ static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 #ifdef CONFIG_NIOS2
 	reset_timer();
 #endif
-	start = get_timer(0);
+	start = time_now_ms();
 	while (1) {
 		switch (info->portwidth) {
 		case FLASH_CFI_8BIT:

@@ -688,7 +688,7 @@ static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 		}
 		if (ready)
 			break;
-		if (get_timer(start) > tout) {
+		if (time_since_ms(start) > tout) {
 			printf("Flash %s timeout at address %lx data %lx\n",
 			       prompt, (ulong)dst, (ulong)flash_read8(dst));
 			return ERR_TIMOUT;

index 52f8575..c838695 100644
@@ -33,6 +33,7 @@
  */
 
 #include <common.h>
+#include <time.h>
 
 #define ENOTSUPP	524	/* Operation is not supported */
 

@@ -439,12 +440,12 @@ void nand_wait_ready(struct mtd_info *mtd)
 {
 	struct nand_chip *chip = mtd->priv;
 	u32 timeo = (CONFIG_SYS_HZ * 20) / 1000;
-	u32 time_start;
+	u32 start;
 
-	time_start = get_timer(0);
+	start = time_now_ms();
 
 	/* wait until command is processed or timeout occures */
-	while (get_timer(time_start) < timeo) {
+	while (time_since_ms(start) < timeo) {
 		if (chip->dev_ready)
 			if (chip->dev_ready(mtd))
 				break;

@@ -705,7 +706,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this)
 {
 	unsigned long	timeo;
 	int state = this->state;
-	u32 time_start;
+	u32 start;
 
 	if (state == FL_ERASING)
 		timeo = (CONFIG_SYS_HZ * 400) / 1000;

@@ -717,10 +718,10 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this)
 	else
 		this->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
 
-	time_start = get_timer(0);
+	start = time_now_ms();
 
 	while (1) {
-		if (get_timer(time_start) > timeo) {
+		if (time_since_ms(start) > timeo) {
 			printf("Timeout!");
 			return 0x01;
 		}

@@ -734,8 +735,8 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this)
 		}
 	}
 #ifdef PPCHAMELON_NAND_TIMER_HACK
-	time_start = get_timer(0);
-	while (get_timer(time_start) < 10)
+	start = time_now_ms();
+	while (time_since_ms(start) < 10)
 		;
 #endif /*  PPCHAMELON_NAND_TIMER_HACK */
 

index ef8ed6f..16b194c 100644
@@ -75,7 +75,7 @@ ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)
 {
 	struct spi_slave *slave;
 	char buf[3];
-	ulong start;
+	u32 start;
 
 	slave = spi_setup_slave(CONFIG_DEFAULT_SPI_BUS, 1, 1000000,
 			CONFIG_DEFAULT_SPI_MODE);

@@ -103,7 +103,7 @@ ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)
 	if(spi_xfer(slave, len * 8, buffer, NULL, SPI_XFER_END))
 		return -1;
 
-	start = get_timer(0);
+	start = time_now_ms();
 	do {
 		buf[0] = SPI_EEPROM_RDSR;
 		buf[1] = 0;

@@ -112,7 +112,7 @@ ssize_t spi_write (uchar *addr, int alen, uchar *buffer, int len)
 		if (!(buf[1] & 1))
 			break;
 
-	} while (get_timer(start) < CONFIG_SYS_SPI_WRITE_TOUT);
+	} while (time_since_ms(start) <	CONFIG_SYS_SPI_WRITE_TOUT);
 
 	if (buf[1] & 1)
 		printf ("*** spi_write: Time out while writing!\n");

index 016b586..6e1054d 100644
@@ -94,7 +94,7 @@ int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
 			   u8 cmd, u8 poll_bit)
 {
 	struct spi_slave *spi = flash->spi;
-	unsigned long timebase;
+	u32 start;
 	int ret;
 	u8 status;
 

@@ -104,7 +104,7 @@ int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
 		return ret;
 	}
 
-	timebase = get_timer(0);
+	start = time_now_ms();
 	do {
 		WATCHDOG_RESET();
 

@@ -115,7 +115,7 @@ int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
 		if ((status & poll_bit) == 0)
 			break;
 
-	} while (get_timer(timebase) < timeout);
+	} while (time_since_ms(start) < timeout);
 
 	spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
 

index 0a97fa6..5603894 100644
@@ -54,44 +54,6 @@ static struct irq_action vecs[32];
 /*************************************************************************/
 volatile ulong timestamp = 0;
 
-void reset_timer (void)
-{
-	nios_timer_t *tmr =(nios_timer_t *)CONFIG_SYS_NIOS_TMRBASE;
-
-	/* From Embedded Peripherals Handbook:
-	 *
-	 * "When the hardware is configured with Writeable period
-	 * disabled, writing to one of the period_n registers causes
-	 * the counter to reset to the fixed Timeout Period specified
-	 * at system generation time."
-	 *
-	 * Here we force a reload to prevent early timeouts from
-	 * get_timer() when the interrupt period is greater than
-	 * than 1 msec.
-	 *
-	 * Simply write to periodl with its own value to force an
-	 * internal counter reload, THEN reset the timestamp.
-	 */
-	writel (readl (&tmr->periodl), &tmr->periodl);
-	timestamp = 0;
-
-	/* From Embedded Peripherals Handbook:
-	 *
-	 * "Writing to one of the period_n registers stops the internal
-	 * counter, except when the hardware is configured with Start/Stop
-	 * control bits off. If Start/Stop control bits is off, writing
-	 * either register does not stop the counter."
-	 *
-	 * In order to accomodate either configuration, the control
-	 * register is re-written. If the counter is stopped, it will
-	 * be restarted. If it is running, the write is essentially
-	 * a nop.
-	 */
-	writel (NIOS_TIMER_ITO | NIOS_TIMER_CONT | NIOS_TIMER_START,
-			&tmr->control);
-
-}
-
 ulong get_timer (ulong base)
 {
 	WATCHDOG_RESET ();

index c8cc195..c56adfc 100644
@@ -91,9 +91,6 @@ static unsigned int mg_wait (u32 expect, u32 msec)
 	u32 ts, err;
 
 	err = MG_ERR_NONE;
-#ifdef CONFIG_NIOS2
-	reset_timer();
-#endif
 	ts = time_now_ms();
 
 	status = readb(mg_base() + MG_REG_STATUS);

index dad80c5..9918157 100644
@@ -573,9 +573,6 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 #endif
 
 	/* Wait for command completion */
-#ifdef CONFIG_NIOS2
-	reset_timer();
-#endif
 	start = time_now_ms();
 	while (flash_is_busy (info, sector)) {
 		if (time_since_ms(start) > tout) {

@@ -664,9 +661,6 @@ static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 #endif
 
 	/* Wait for command completion */
-#ifdef CONFIG_NIOS2
-	reset_timer();
-#endif
 	start = time_now_ms();
 	while (1) {
 		switch (info->portwidth) {

index 06b4247..7a8e744 100644
@@ -156,10 +156,11 @@ static int ACEX1K_ps_load (Altera_desc * desc, void *buf, size_t bsize)
 		udelay(2);		/* T_cf2st1 < 4us	*/
 
 		/* Wait for nSTATUS to be released (i.e. deasserted) */
-		ts = get_timer (0);		/* get current time */
+		ts = timer_ms_now();		/* get current time */
 		do {
 			CONFIG_FPGA_DELAY ();
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+			if (time_ms_delta_min(ts, timer_ms_now()) >
+				CONFIG_SYS_FPGA_WAIT) {	/* check the time */
 				puts ("** Timeout waiting for STATUS to go high.\n");
 				(*fn->abort) (cookie);
 				return FPGA_FAIL;

index 4622b4e..5dd6cdd 100644
@@ -139,10 +139,11 @@ static int CYC2_ps_load (Altera_desc * desc, void *buf, size_t bsize)
 		udelay(2);		/* T_cfg > 2us	*/
 
 		/* Wait for nSTATUS to be asserted */
-		ts = get_timer (0);		/* get current time */
+		ts = time_now_ms();		/* get current time */
 		do {
 			CONFIG_FPGA_DELAY ();
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+			/* check the time */
+			if (time_since_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 				puts ("** Timeout waiting for STATUS to go high.\n");
 				(*fn->abort) (cookie);
 				return FPGA_FAIL;

index cd16a9c..cab68ef 100644
@@ -168,11 +168,12 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
 		CONFIG_FPGA_DELAY ();
 		(*fn->pgm) (FALSE, TRUE, cookie);	/* Deassert the program, commit */
 
-		ts = get_timer (0);		/* get current time */
+		ts = time_now_ms();		/* get current time */
 		/* Now wait for INIT and BUSY to go high */
 		do {
 			CONFIG_FPGA_DELAY ();
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+			/* check the time */
+			if (time_sine_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 				puts ("** Timeout waiting for INIT to clear.\n");
 				(*fn->abort) (cookie);	/* abort the burn */
 				return FPGA_FAIL;

@@ -195,7 +196,7 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
 			(*fn->clk) (TRUE, TRUE, cookie);	/* Assert the clock pin */
 
 #ifdef CONFIG_SYS_FPGA_CHECK_BUSY
-			ts = get_timer (0);	/* get current time */
+			ts = time_now_ms();	/* get current time */
 			while ((*fn->busy) (cookie)) {
 				/* XXX - we should have a check in here somewhere to
 				 * make sure we aren't busy forever... */

@@ -205,7 +206,8 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
 				CONFIG_FPGA_DELAY ();
 				(*fn->clk) (TRUE, TRUE, cookie);	/* Assert the clock pin */
 
-				if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+				/* check the time */
+				if (time_since_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 					puts ("** Timeout waiting for BUSY to clear.\n");
 					(*fn->abort) (cookie);	/* abort the burn */
 					return FPGA_FAIL;

@@ -228,7 +230,7 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
 #endif
 
 		/* now check for done signal */
-		ts = get_timer (0);		/* get current time */
+		ts = time_now_ms();		/* get current time */
 		ret_val = FPGA_SUCCESS;
 		while ((*fn->done) (cookie) == FPGA_FAIL) {
 

@@ -237,7 +239,8 @@ static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
 			CONFIG_FPGA_DELAY ();
 			(*fn->clk) (TRUE, TRUE, cookie);	/* Assert the clock pin */
 
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+			/* check the time */
+			if (time_sine_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 				puts ("** Timeout waiting for DONE to clear.\n");
 				(*fn->abort) (cookie);	/* abort the burn */
 				ret_val = FPGA_FAIL;

@@ -354,10 +357,11 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 		(*fn->pgm) (TRUE, TRUE, cookie);	/* Assert the program, commit */
 
 		/* Wait for INIT state (init low)                            */
-		ts = get_timer (0);		/* get current time */
+		ts = time_now_ms();		/* get current time */
 		do {
 			CONFIG_FPGA_DELAY ();
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+			/* check the time */
+			if (time_since_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 				puts ("** Timeout waiting for INIT to start.\n");
 				return FPGA_FAIL;
 			}

@@ -367,11 +371,12 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 		CONFIG_FPGA_DELAY ();
 		(*fn->pgm) (FALSE, TRUE, cookie);	/* Deassert the program, commit */
 
-		ts = get_timer (0);		/* get current time */
+		ts = time_now_ms();		/* get current time */
 		/* Now wait for INIT to go high */
 		do {
 			CONFIG_FPGA_DELAY ();
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+			/* check the time */
+			if (time_since_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 				puts ("** Timeout waiting for INIT to clear.\n");
 				return FPGA_FAIL;
 			}

@@ -415,7 +420,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 #endif
 
 		/* now check for done signal */
-		ts = get_timer (0);		/* get current time */
+		ts = time_now_ms();		/* get current time */
 		ret_val = FPGA_SUCCESS;
 		(*fn->wr) (TRUE, TRUE, cookie);
 

@@ -428,7 +433,8 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 
 			putc ('*');
 
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+			/* check the time */
+			if (time_since_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 				puts ("** Timeout waiting for DONE to clear.\n");
 				ret_val = FPGA_FAIL;
 				break;

index 1dd6f26..8282a23 100644
@@ -173,11 +173,12 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
 		CONFIG_FPGA_DELAY ();
 		(*fn->pgm) (FALSE, TRUE, cookie);	/* Deassert the program, commit */
 
-		ts = get_timer (0);		/* get current time */
+		ts = time_now_ms();		/* get current time */
 		/* Now wait for INIT and BUSY to go high */
 		do {
 			CONFIG_FPGA_DELAY ();
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+			/* check the time */
+			if (time_since_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 				puts ("** Timeout waiting for INIT to clear.\n");
 				(*fn->abort) (cookie);	/* abort the burn */
 				return FPGA_FAIL;

@@ -200,7 +201,7 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
 			(*fn->clk) (TRUE, TRUE, cookie);	/* Assert the clock pin */
 
 #ifdef CONFIG_SYS_FPGA_CHECK_BUSY
-			ts = get_timer (0);	/* get current time */
+			ts = time_now_ms();	/* get current time */
 			while ((*fn->busy) (cookie)) {
 				/* XXX - we should have a check in here somewhere to
 				 * make sure we aren't busy forever... */

@@ -210,7 +211,8 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
 				CONFIG_FPGA_DELAY ();
 				(*fn->clk) (TRUE, TRUE, cookie);	/* Assert the clock pin */
 
-				if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+				/* check the time */
+				if (time_since_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 					puts ("** Timeout waiting for BUSY to clear.\n");
 					(*fn->abort) (cookie);	/* abort the burn */
 					return FPGA_FAIL;

@@ -233,7 +235,7 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
 #endif
 
 		/* now check for done signal */
-		ts = get_timer (0);		/* get current time */
+		ts = time_since_ms();		/* get current time */
 		ret_val = FPGA_SUCCESS;
 		while ((*fn->done) (cookie) == FPGA_FAIL) {
 			/* XXX - we should have a check in here somewhere to

@@ -244,7 +246,8 @@ static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
 			CONFIG_FPGA_DELAY ();
 			(*fn->clk) (TRUE, TRUE, cookie);	/* Assert the clock pin */
 
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+			/* check the time */
+			if (time_since_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 				puts ("** Timeout waiting for DONE to clear.\n");
 				(*fn->abort) (cookie);	/* abort the burn */
 				ret_val = FPGA_FAIL;

@@ -361,10 +364,12 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 		(*fn->pgm) (TRUE, TRUE, cookie);	/* Assert the program, commit */
 
 		/* Wait for INIT state (init low)                            */
-		ts = get_timer (0);		/* get current time */
+		ts = time_now_ms();	/* get current time */
 		do {
 			CONFIG_FPGA_DELAY ();
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+
+			/* check the time */
+			if (time_since_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 				puts ("** Timeout waiting for INIT to start.\n");
 				if (*fn->abort)
 					(*fn->abort) (cookie);

@@ -376,11 +381,13 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 		CONFIG_FPGA_DELAY ();
 		(*fn->pgm) (FALSE, TRUE, cookie);	/* Deassert the program, commit */
 
-		ts = get_timer (0);		/* get current time */
+		ts = time_now_ms();	/* get current time */
 		/* Now wait for INIT to go high */
 		do {
 			CONFIG_FPGA_DELAY ();
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+
+			/* check the time */
+			if (time_since_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 				puts ("** Timeout waiting for INIT to clear.\n");
 				if (*fn->abort)
 					(*fn->abort) (cookie);

@@ -432,7 +439,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 #endif
 
 		/* now check for done signal */
-		ts = get_timer (0);		/* get current time */
+		ts = time_now_ms();		/* get current time */
 		ret_val = FPGA_SUCCESS;
 		(*fn->wr) (TRUE, TRUE, cookie);
 

@@ -447,7 +454,8 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
 
 			putc ('*');
 
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) {	/* check the time */
+			/* check the time */
+			if (time_since_ms(ts) > CONFIG_SYS_FPGA_WAIT) {
 				puts ("** Timeout waiting for DONE to clear.\n");
 				ret_val = FPGA_FAIL;
 				break;

index d1b4d15..d1995e6 100644
@@ -223,9 +223,10 @@ static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize)
 		 */
 		(*fn->pgm) (TRUE, TRUE, cookie);
 		udelay (10);
-		ts = get_timer (0);
+		ts = time_ms_now();
 		do {
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT_INIT) {
+			if (time_ms_delta_min(ts, timer_ms_now())
+					> CONFIG_SYS_FPGA_WAIT_INIT) {
 				printf ("%s:%d: ** Timeout after %d ticks waiting for INIT"
 						" to assert.\n", __FUNCTION__, __LINE__,
 						CONFIG_SYS_FPGA_WAIT_INIT);

@@ -241,10 +242,11 @@ static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize)
 		/*
 		 * Start a timer and wait for INIT_B to go high
 		 */
-		ts = get_timer (0);
+		ts = time_ms_now();
 		do {
 			CONFIG_FPGA_DELAY ();
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT_INIT) {
+			if (time_ms_delta_min(ts, timer_ms_now())
+					> CONFIG_SYS_FPGA_WAIT_INIT) {
 				printf ("%s:%d: ** Timeout after %d ticks waiting for INIT"
 						" to deassert.\n", __FUNCTION__, __LINE__,
 						CONFIG_SYS_FPGA_WAIT_INIT);

@@ -297,9 +299,10 @@ static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize)
 			(*fn->clk) (TRUE, TRUE, cookie);
 
 #ifdef CONFIG_SYS_FPGA_CHECK_BUSY
-			ts = get_timer (0);
+			ts = time_ms_now();
 			while ((*fn->busy) (cookie)) {
-				if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT_BUSY) {
+				if (time_ms_delta_min(ts, timer_ms_now())
+						> CONFIG_SYS_FPGA_WAIT_BUSY) {
 					printf ("%s:%d: ** Timeout after %d ticks waiting for"
 							" BUSY to deassert\n",
 							__FUNCTION__, __LINE__, CONFIG_SYS_FPGA_WAIT_BUSY);

@@ -330,10 +333,11 @@ static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize)
 		 * Check for successful configuration.  FPGA INIT_B and DONE should
 		 * both be high upon successful configuration.
 		 */
-		ts = get_timer (0);
+		ts = time_ms_now();
 		ret_val = FPGA_SUCCESS;
 		while (((*fn->done) (cookie) == FPGA_FAIL) || (*fn->init) (cookie)) {
-			if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT_CONFIG) {
+			if (time_ms_delta_min(ts, timer_ms_now())
+					> CONFIG_SYS_FPGA_WAIT_CONFIG) {
 				printf ("%s:%d: ** Timeout after %d ticks waiting for DONE to"
 						"assert and INIT to deassert\n",
 						__FUNCTION__, __LINE__, CONFIG_SYS_FPGA_WAIT_CONFIG);

index b3a04d3..66f3677 100644
@@ -94,7 +94,7 @@ struct i2c_msg {
 static int wait_for_completion(struct i2c_msg *msg)
 {
 	uint16_t int_stat;
-	ulong timebase = get_timer(0);
+	u32 timebase = time_ms_now();
 
 	do {
 		int_stat = twi->int_stat;

@@ -146,9 +146,9 @@ static int wait_for_completion(struct i2c_msg *msg)
 
 		/* If we were able to do something, reset timeout */
 		if (int_stat)
-			timebase = get_timer(0);
+			timebase = time_ms_now();
 
-	} while (get_timer(timebase) < I2C_TIMEOUT);
+	} while time_ms_delta_min(timebase, timer_ms_now()) < I2C_TIMEOUT);
 
 	return msg->len;
 }

index eabfe84..de5cd10 100644
@@ -168,13 +168,14 @@ static void i2c_flush_rxfifo(void)
  */
 static int i2c_wait_for_bb(void)
 {
-	unsigned long start_time_bb = get_timer(0);
+	u32 start_time_bb = time_ms_now();
 
 	while ((readl(&i2c_regs_p->ic_status) & IC_STATUS_MA) ||
 	       !(readl(&i2c_regs_p->ic_status) & IC_STATUS_TFE)) {
 
 		/* Evaluate timeout */
-		if (get_timer(start_time_bb) > (unsigned long)(I2C_BYTE_TO_BB))
+		if (time_ms_delta_min(start_time_bb, timer_ms_now())
+				> (unsigned long)(I2C_BYTE_TO_BB))
 			return 1;
 	}
 

@@ -217,13 +218,14 @@ static int i2c_xfer_init(uchar chip, uint addr)
 
 static int i2c_xfer_finish(void)
 {
-	ulong start_stop_det = get_timer(0);
+	u32 start_stop_det = time_ms_now();
 
 	while (1) {
 		if ((readl(&i2c_regs_p->ic_raw_intr_stat) & IC_STOP_DET)) {
 			readl(&i2c_regs_p->ic_clr_stop_det);
 			break;
-		} else if (get_timer(start_stop_det) > I2C_STOPDET_TO) {
+		} else if (time_ms_delta_min(start_stop_det, timer_ms_now())
+				> I2C_STOPDET_TO) {
 			break;
 		}
 	}

@@ -253,7 +255,7 @@ static int i2c_xfer_finish(void)
  */
 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 {
-	unsigned long start_time_rx;
+	u32 start_time_rx;
 
 	if (check_params(addr, alen, buffer, len))
 		return 1;

@@ -261,16 +263,17 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 	if (i2c_xfer_init(chip, addr))
 		return 1;
 
-	start_time_rx = get_timer(0);
+	start_time_rx = time_ms_now();
 	while (len) {
 		writel(IC_CMD, &i2c_regs_p->ic_cmd_data);
 
 		if (readl(&i2c_regs_p->ic_status) & IC_STATUS_RFNE) {
 			*buffer++ = (uchar)readl(&i2c_regs_p->ic_cmd_data);
 			len--;
-			start_time_rx = get_timer(0);
+			start_time_rx = time_ms_now();
 
-		} else if (get_timer(start_time_rx) > I2C_BYTE_TO) {
+		} else if (time_ms_delta_min(start_time_rx, timer_ms_now())
+				> I2C_BYTE_TO) {
 				printf("Timed out. i2c read Failed\n");
 				return 1;
 		}

@@ -292,7 +295,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 {
 	int nb = len;
-	unsigned long start_time_tx;
+	u32 start_time_tx;
 
 	if (check_params(addr, alen, buffer, len))
 		return 1;

@@ -300,15 +303,16 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 	if (i2c_xfer_init(chip, addr))
 		return 1;
 
-	start_time_tx = get_timer(0);
+	start_time_tx = time_ms_now();
 	while (len) {
 		if (readl(&i2c_regs_p->ic_status) & IC_STATUS_TFNF) {
 			writel(*buffer, &i2c_regs_p->ic_cmd_data);
 			buffer++;
 			len--;
-			start_time_tx = get_timer(0);
+			start_time_tx = time_ms_now();
 
-		} else if (get_timer(start_time_tx) > (nb * I2C_BYTE_TO)) {
+		} else if (time_ms_delta_min(start_time_tx, timer_ms_now()
+				> (nb * I2C_BYTE_TO)) {
 				printf("Timed out. i2c write Failed\n");
 				return 1;
 		}

index ea8a71d..488c1ea 100644
@@ -180,12 +180,12 @@ void i2c_init(int speed, int slaveaddr)
  */
 static int loop_till_bit_clear(void *io_reg, u32 mask, unsigned long timeout)
 {
-	unsigned long timebase = get_timer(0);
+	unsigned long timebase = time_now_ms();
 
 	do {
 		if ((readl(io_reg) & mask) == 0x0UL)
 			return 0;
-	} while (get_timer(timebase) < timeout);
+	} while (time_since_ms(timebase) < timeout);
 
 	debug("loop_till_bit_clear timed out\n");
 	return -1;

@@ -199,12 +199,12 @@ static int loop_till_bit_clear(void *io_reg, u32 mask, unsigned long timeout)
  */
 static int loop_till_bit_set(void *io_reg, u32 mask, unsigned long timeout)
 {
-	unsigned long timebase = get_timer(0);
+	unsigned long timebase = time_now_ms();
 
 	do {
 		if ((readl(io_reg) & mask) != 0x0UL)
 			return 0;
-	} while (get_timer(timebase) < timeout);
+	} while (time_since_ms(timebase) < timeout);
 
 	debug("loop_till_bit_set timed out\n");
 	return -1;

index ab74933..e841bd3 100644
@@ -39,7 +39,7 @@
 #endif
 
 
-static ulong start_time;
+static u32 st;
 static int init_done = 0;
 
 static int received_escape = 0;

@@ -66,7 +66,7 @@ static u_char ps2mult_buf_status [PS2BUF_SIZE];
 #endif
 void ps2mult_early_init (void)
 {
-	start_time = get_timer(0);
+	st = time_ms_now());
 }
 
 static void ps2mult_send_byte(u_char byte, u_char sel)

@@ -365,7 +365,7 @@ int ps2mult_init (void)
 	int kbd_found = 0;
 	int mouse_found = 0;
 
-	while (get_timer(start_time) < CONFIG_PS2MULT_DELAY);
+	while (time_ms_delta_min(ts, time_ms_now()) < CONFIG_PS2MULT_DELAY);
 
 	ps2ser_init();
 

163 lines not on this page · raw message

index 1ecece0..b2dbf86 100644
@@ -119,7 +119,7 @@ static int at45_wait_ready(struct spi_flash *flash, unsigned long timeout)
 	u8 cmd = CMD_AT45_READ_STATUS;
 	u8 status;
 
-	timebase = get_timer(0);
+	timebase = time_now_ms();
 
 	ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
 	if (ret)

@@ -132,7 +132,7 @@ static int at45_wait_ready(struct spi_flash *flash, unsigned long timeout)
 
 		if (status & AT45_STATUS_READY)
 			break;
-	} while (get_timer(timebase) < timeout);
+	} while (time_since_ms(timebase) < timeout);
 
 	/* Deactivate CS */
 	spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);

index b1763b1..79ec451 100644
@@ -1564,7 +1564,7 @@ static int ppc_4xx_eth_send (struct eth_device *dev, volatile void *ptr,
 			      int len)
 {
 	struct enet_frame *ef_ptr;
-	ulong time_start, time_now;
+	u32 ts;
 	unsigned long temp_txm0;
 	EMAC_4XX_HW_PST hw_p = dev->priv;
 

@@ -1609,7 +1609,7 @@ static int ppc_4xx_eth_send (struct eth_device *dev, volatile void *ptr,
 	/*-----------------------------------------------------------------------+
 	 * poll unitl the packet is sent and then make sure it is OK
 	 *-----------------------------------------------------------------------*/
-	time_start = get_timer (0);
+	ts = time_ms_now();
 	while (1) {
 		temp_txm0 = in_be32((void *)EMAC0_TMR0 + hw_p->hw_addr);
 		/* loop until either TINT turns on or 3 seconds elapse */

@@ -1618,10 +1618,8 @@ static int ppc_4xx_eth_send (struct eth_device *dev, volatile void *ptr,
 			 * If there is an error, an interrupt should
 			 * happen when we return
 			 */
-			time_now = get_timer (0);
-			if ((time_now - time_start) > 3000) {
+			if (time_ms_delta_min(ts, time_ms_now()) > 3000)
 				return (-1);
-			}
 		} else {
 			return (len);
 		}

index c250d44..5440e57 100644
@@ -1204,7 +1204,7 @@ LM_STATUS MM_FreeRxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
 
 unsigned long MM_AnGetCurrentTime_us (PAN_STATE_INFO pAnInfo)
 {
-	return get_timer (0);
+	return time_ms_now();
 }
 
 /*

index 9424fb2..8e434d9 100644
@@ -98,7 +98,7 @@ static void put_reg(struct eth_device *dev, int regno, u16 val)
 
 static void cs8900_reset(struct eth_device *dev)
 {
-	int tmo;
+	u32 st;
 	u16 us;
 
 	/* reset NIC */

@@ -108,9 +108,10 @@ static void cs8900_reset(struct eth_device *dev)
 	udelay(200000);
 	/* Wait until the chip is reset */
 
-	tmo = get_timer(0) + 1 * CONFIG_SYS_HZ;
+	st = time_ms_now();
 	while ((((us = get_reg_init_bus(dev, PP_SelfSTAT)) &
-		PP_SelfSTAT_InitD) == 0) && tmo < get_timer(0))
+		PP_SelfSTAT_InitD) == 0) &&
+		(time_ms_delta_min(st, time_ms_now()) < 1000))
 		/*NOP*/;
 }
 

@@ -220,7 +221,7 @@ static int cs8900_send(struct eth_device *dev,
 			volatile void *packet, int length)
 {
 	volatile u16 *addr;
-	int tmo;
+	u32 st;
 	u16 s;
 	struct cs8900_priv *priv = (struct cs8900_priv *)(dev->priv);
 

@@ -233,8 +234,8 @@ retry:
 	if ((get_reg(dev, PP_BusSTAT) & PP_BusSTAT_TxRDY) == 0) {
 		/* Oops... this should not happen! */
 		debug("cs: unable to send packet; retrying...\n");
-		for (tmo = get_timer(0) + 5 * CONFIG_SYS_HZ;
-			get_timer(0) < tmo;)
+		for (st = time_ms_now();
+				time_ms_delta_min(st, time_ms_now()) < 5000;)
 			/*NOP*/;
 		cs8900_reset(dev);
 		cs8900_reginit(dev);

@@ -247,9 +248,9 @@ retry:
 		REG_WRITE(*addr++, &priv->regs->rtdata);
 
 	/* wait for transfer to succeed */
-	tmo = get_timer(0) + 5 * CONFIG_SYS_HZ;
+	st = time_ms_now();
 	while ((s = get_reg(dev, PP_TER) & ~0x1F) == 0) {
-		if (get_timer(0) >= tmo)
+		if (time_ms_delta_min(st, time_ms_now()) >= 5000)
 			break;
 	}
 

index b5c5573..8fb15cf 100644
@@ -401,7 +401,7 @@ static int dm9000_init(struct eth_device *dev, bd_t *bd)
 static int dm9000_send(struct eth_device *netdev, volatile void *packet,
 		     int length)
 {
-	int tmo;
+	u32 st;
 	struct board_info *db = &dm9000_info;
 
 	DM9000_DMP_PACKET(__func__ , packet, length);

@@ -422,10 +422,10 @@ static int dm9000_send(struct eth_device *netdev, volatile void *packet,
 	DM9000_iow(DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
 
 	/* wait for end of transmission */
-	tmo = get_timer(0) + 5 * CONFIG_SYS_HZ;
+	st = time_ms_now();
 	while ( !(DM9000_ior(DM9000_NSR) & (NSR_TX1END | NSR_TX2END)) ||
 		!(DM9000_ior(DM9000_ISR) & IMR_PTM) ) {
-		if (get_timer(0) >= tmo) {
+		if (time_ms_delta_min(st, time_ms_now()) >= 5000) {
 			printf("transmission timeout\n");
 			break;
 		}

index 34cc47f..003fdc0 100644
@@ -420,7 +420,7 @@ static int ethoc_send(struct eth_device *dev, volatile void *packet, int length)
 	struct ethoc_bd bd;
 	u32 entry;
 	u32 pending;
-	int tmo;
+	u32 st;
 
 	entry = priv->cur_tx % priv->num_tx;
 	ethoc_read_bd(dev, entry, &bd);

@@ -440,7 +440,7 @@ static int ethoc_send(struct eth_device *dev, volatile void *packet, int length)
 	ethoc_write_bd(dev, entry, &bd);
 
 	/* wait for transfer to succeed */
-	tmo = get_timer(0) + 5 * CONFIG_SYS_HZ;
+	st = time_ms_now();
 	while (1) {
 		pending = ethoc_read(dev, INT_SOURCE);
 		ethoc_ack_irq(dev, pending & ~INT_MASK_RX);

@@ -451,7 +451,7 @@ static int ethoc_send(struct eth_device *dev, volatile void *packet, int length)
 			ethoc_tx(dev);
 			break;
 		}
-		if (get_timer(0) >= tmo) {
+		if (time_ms_delta_min(st, time_ms_now()) >= 5000) {
 			debug("%s(): timed out\n", __func__);
 			return -1;
 		}

index ab90afa..076e0dc 100644
@@ -70,7 +70,7 @@ static int fec_miiphy_read(const char *dev, uint8_t phyAddr, uint8_t regAddr,
 
 	uint32_t reg;		/* convenient holder for the PHY register */
 	uint32_t phy;		/* convenient holder for the PHY */
-	uint32_t start;
+	u32 st;
 
 	/*
 	 * reading from any PHY's register is done by properly

@@ -86,9 +86,9 @@ static int fec_miiphy_read(const char *dev, uint8_t phyAddr, uint8_t regAddr,
 	/*
 	 * wait for the related interrupt
 	 */
-	start = get_timer(0);
+	start = time_ms_now();
 	while (!(readl(&fec->eth->ievent) & FEC_IEVENT_MII)) {
-		if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
+		if (time_ms_delta_min(st, time_ms_now()) > 1) {
 			printf("Read MDIO failed...\n");
 			return -1;
 		}

@@ -127,7 +127,7 @@ static int fec_miiphy_write(const char *dev, uint8_t phyAddr, uint8_t regAddr,
 
 	uint32_t reg;		/* convenient holder for the PHY register */
 	uint32_t phy;		/* convenient holder for the PHY */
-	uint32_t start;
+	u32 st;
 
 	reg = regAddr << FEC_MII_DATA_RA_SHIFT;
 	phy = phyAddr << FEC_MII_DATA_PA_SHIFT;

@@ -138,9 +138,9 @@ static int fec_miiphy_write(const char *dev, uint8_t phyAddr, uint8_t regAddr,
 	/*
 	 * wait for the MII interrupt
 	 */
-	start = get_timer(0);
+	st = time_ms_now();
 	while (!(readl(&fec->eth->ievent) & FEC_IEVENT_MII)) {
-		if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
+		if (time_ms_delta_min(st, time_ms_now()) > 1) {
 			printf("Write MDIO failed...\n");
 			return -1;
 		}

@@ -183,15 +183,15 @@ static int miiphy_restart_aneg(struct eth_device *dev)
 
 static int miiphy_wait_aneg(struct eth_device *dev)
 {
-	uint32_t start;
+	u32 st;
 	uint16_t status;
 
 	/*
 	 * Wait for AN completion
 	 */
-	start = get_timer(0);
+	st = time_ms_now();
 	do {
-		if (get_timer(start) > (CONFIG_SYS_HZ * 5)) {
+		if (time_ms_delta_min(st, time_ms_now()) > 5000) {
 			printf("%s: Autonegotiation timeout\n", dev->name);
 			return -1;
 		}

index dc7a80e..5f24962 100644
@@ -490,7 +490,7 @@ ftgmac100_send(struct eth_device *dev, void *packet, int length)
 	struct ftgmac100 *ftgmac100 = (struct ftgmac100 *)dev->iobase;
 	struct ftgmac100_data *priv = dev->priv;
 	struct ftgmac100_txdes *curr_des = &priv->txdes[priv->tx_index];
-	int start;
+	int st;
 
 	if (curr_des->txdes0 & FTGMAC100_TXDES0_TXDMA_OWN) {
 		debug("%s(): no TX descriptor available\n", __func__);

@@ -515,9 +515,9 @@ ftgmac100_send(struct eth_device *dev, void *packet, int length)
 	writel(1, &ftgmac100->txpd);
 
 	/* wait for transfer to succeed */
-	start = get_timer(0);
+	st = time_ms_now();
 	while (curr_des->txdes0 & FTGMAC100_TXDES0_TXDMA_OWN) {
-		if (get_timer(0) >= 5) {
+		if (time_ms_delta_min(st, time_ms_now()) >= 5) {
 			debug("%s(): timed out\n", __func__);
 			return -1;
 		}

index 94dc6d9..5e057a1 100644
@@ -196,7 +196,7 @@ ftmac100_send (struct eth_device *dev, volatile void *packet, int length)
 	struct ftmac100 *ftmac100 = (struct ftmac100 *)dev->iobase;
 	struct ftmac100_data *priv = dev->priv;
 	struct ftmac100_txdes *curr_des = priv->txdes;
-	ulong start;
+	ulong st;
 
 	if (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) {
 		debug ("%s(): no TX descriptor available\n", __func__);

@@ -224,9 +224,9 @@ ftmac100_send (struct eth_device *dev, volatile void *packet, int length)
 
 	/* wait for transfer to succeed */
 
-	start = get_timer(0);
+	st = time_ms_now();
 	while (curr_des->txdes0 & FTMAC100_TXDES0_TXDMA_OWN) {
-		if (get_timer(start) >= 5) {
+		if (time_ms_delta_min(st, time_ms_now()) >= 5) {
 			debug ("%s(): timed out\n", __func__);
 			return -1;
 		}

index 6c32226..9653f64 100644
@@ -230,7 +230,7 @@ int greth_init_phy(greth_priv * dev, bd_t * bis)
 {
 	greth_regs *regs = dev->regs;
 	int tmp, tmp1, tmp2, i;
-	unsigned int start, timeout;
+	unsigned int st;
 	int phyaddr = GRETH_PHY_ADR_DEFAULT;
 
 #ifndef CONFIG_SYS_GRLIB_GRETH_PHYADDR

@@ -252,18 +252,16 @@ int greth_init_phy(greth_priv * dev, bd_t * bis)
 
 	debug("GRETH PHY ADDRESS: %d\n", phyaddr);
 
-	/* X msecs to ticks */
-	timeout = usec2ticks(GRETH_PHY_TIMEOUT_MS * 1000);
-
 	/* Get system timer0 current value
 	 * Total timeout is 5s
 	 */
-	start = get_timer(0);
+	st = time_ms_now();
 
 	/* get phy control register default values */
 
 	while ((tmp = read_mii(phyaddr, 0, regs)) & 0x8000) {
-		if (get_timer(start) > timeout) {
+		if (time_ms_delta_min(st, time_ms_now())
+				> GRETH_PHY_TIMEOUT_MS) {
 			debug("greth_init_phy: PHY read 1 failed\n");
 			return 1;	/* Fail */
 		}

@@ -273,7 +271,8 @@ int greth_init_phy(greth_priv * dev, bd_t * bis)
 	write_mii(phyaddr, 0, 0x8000 | tmp, regs);
 
 	while (((tmp = read_mii(phyaddr, 0, regs))) & 0x8000) {
-		if (get_timer(start) > timeout) {
+		if (time_ms_delta_min(st, time_ms_now())
+				> GRETH_PHY_TIMEOUT_MS) {
 			debug("greth_init_phy: PHY read 2 failed\n");
 			return 1;	/* Fail */
 		}

@@ -293,7 +292,8 @@ int greth_init_phy(greth_priv * dev, bd_t * bis)
 		dev->auto_neg = 1;
 		i = 0;
 		while (!(((tmp = read_mii(phyaddr, 1, regs)) >> 5) & 1)) {
-			if (get_timer(start) > timeout) {
+			if (time_ms_delta_min(st, time_ms_now())
+					> GRETH_PHY_TIMEOUT_MS) {
 				printf("Auto negotiation timed out. "
 				       "Selecting default config\n");
 				tmp = read_mii(phyaddr, 0, regs);

index 883f3a7..3aa825a 100644
@@ -175,14 +175,15 @@ static void print_packet (byte *, int);
 
 static int poll4int (struct eth_device *dev, byte mask, int timeout)
 {
-	int tmo = get_timer (0) + timeout * CONFIG_SYS_HZ;
+	int ts = time_ms_now();
 	int is_timeout = 0;
 	word old_bank = SMC_inw(dev, LAN91C96_BANK_SELECT);
 
 	PRINTK2 ("Polling...\n");
 	SMC_SELECT_BANK(dev, 2);
 	while ((SMC_inw(dev, LAN91C96_INT_STATS) & mask) == 0) {
-		if (get_timer (0) >= tmo) {
+		if (time_ms_delta_min(start, time_ms_now())
+				>= timeout * 1000) {
 			is_timeout = 1;
 			break;
 		}

index f93f932..288da5c 100644
@@ -733,21 +733,21 @@ int eth_rx() {
 }
 
 int eth_send(volatile void *packet, int length) {
-	int tmo;
+	int ts;
 
 	PRINTK("### eth_send\n");
 
 	pkey = -1;
 
 	dp83902a_send((u8 *) packet, length, 666);
-	tmo = get_timer (0) + TOUT * CONFIG_SYS_HZ;
+	ts = time_ms_now();
 	while(1) {
 		dp83902a_poll();
 		if (pkey != -1) {
 			PRINTK("Packet sucesfully sent\n");
 			return 0;
 		}
-		if (get_timer (0) >= tmo) {
+		if (time_ms_delta_min(ts, time_ms_now()) >= TOUT * 1000) {
 			printf("transmission error (timoeut)\n");
 			return 0;
 		}

index f54817e..0b4b959 100644
@@ -83,8 +83,9 @@ static int na_mii_poll_busy (void)
 {
 	ulong start;
 	/* arm simple, non interrupt dependent timer */
-	start = get_timer(0));
-	while (get_timer(start) < NA_MII_POLL_BUSY_DELAY) {
+	start = time_ms_now();
+	while (time_ms_delta_min(start, time_ms_now())
+			< NA_MII_POLL_BUSY_DELAY) {
 		if (!(GET_EADDR (NETARM_ETH_MII_IND) & NETARM_ETH_MIII_BUSY)) {
 			return 1;
 		}

@@ -172,13 +173,14 @@ static int reset_eth (void)
 
 	/* reset the phy */
 	na_mii_write (MII_PHY_CONTROL, 0x8000);
-	start = get_timer(0);
-	while (get_timer(start) < NA_MII_NEGOTIATE_DELAY) {
+	start = time_ms_now();
+	while (time_ms_delta_min(start, time_ms_now())
+			< NA_MII_NEGOTIATE_DELAY) {
 		if ((na_mii_read (MII_PHY_STATUS) & 0x8000) == 0) {
 			break;
 		}
 	}
-	if (get_timer(start) >= NA_MII_NEGOTIATE_DELAY)
+	if (time_ms_delta_min(start, time_ms_now()) >= NA_MII_NEGOTIATE_DELAY)
 		printf ("phy reset timeout\n");
 
 	/* set the PCS reg */

index de82b04..687e42a 100644
@@ -449,8 +449,9 @@ static void ns7520_link_auto_negotiate(void)
 
 	/* wait for completion */
 
-	ulStartJiffies = get_timer(0);
-	while (get_timer(0) < ulStartJiffies + NS7520_MII_NEG_DELAY) {
+	ulStartJiffies = time_ms_now();
+	while (time_ms_delta_min(ulStartJiffies, time_ms_now())
+			< NS7520_MII_NEG_DELAY) {
 		uiStatus = ns7520_mii_read(MII_BMSR);
 		if ((uiStatus &
 		     (BMSR_ANEGCOMPLETE | BMSR_LSTATUS)) ==

index 9899563..b800048 100644
@@ -291,7 +291,7 @@ int eth_send (volatile void *pPacket, int nLen)
 	*get_eth_reg_addr (NS9750_ETH_EGCR2) &= ~NS9750_ETH_EGCR2_TCLER;
 	*get_eth_reg_addr (NS9750_ETH_EGCR2) |= NS9750_ETH_EGCR2_TCLER;
 
-	ulTimeout = get_timer (0);
+	ts = time_ms_now();
 
 	DEBUG_ARGS0 (DEBUG_TX | DEBUG_MINOR,
 		     "Waiting for transmission to finish\n");

@@ -299,7 +299,7 @@ int eth_send (volatile void *pPacket, int nLen)
 	       (*get_eth_reg_addr (NS9750_ETH_EINTR) &
 		(NS9750_ETH_EINTR_TXDONE | NS9750_ETH_EINTR_TXERR))) {
 		/* do nothing, wait for completion */
-		if (get_timer (0) - ulTimeout > TX_TIMEOUT) {
+		if (time_ms_delta_min(ts, time_ms_now()) > TX_TIMEOUT) {
 			DEBUG_ARGS0 (DEBUG_TX, "Transmit Timed out\n");
 			return -1;
 		}

index c2779db..eb503a7 100644
@@ -98,7 +98,6 @@
 #undef DEBUG_TX
 #undef DEBUG_RX
 
-#define currticks()	get_timer(0)
 #define bus_to_phys(a)	pci_mem_to_phys((pci_dev_t)dev->priv, a)
 #define phys_to_bus(a)	pci_phys_to_mem((pci_dev_t)dev->priv, a)
 

@@ -425,6 +424,7 @@ static int rtl_transmit(struct eth_device *dev, volatile void *packet, int lengt
 	memcpy((char *)tx_buffer, (char *)packet, (int)length);
 
 #ifdef	DEBUG_TX
+	u32 ts = time_now_ms();
 	printf("sending %d bytes\n", len);
 #endif
 

@@ -454,8 +454,8 @@ static int rtl_transmit(struct eth_device *dev, volatile void *packet, int lengt
 	if (status & TxOK) {
 		cur_tx = (cur_tx + 1) % NUM_TX_DESC;
 #ifdef	DEBUG_TX
-		printf("tx done (%d ticks), status %hX txstatus %X\n",
-			to-currticks(), status, txstatus);
+		printf("tx done (%d ms), status %hX txstatus %X\n",
+			time_max_since_ms(ts), status, txstatus);
 #endif
 		return length;
 	} else {

index b81dcad..802a95a 100644
@@ -68,9 +68,6 @@
 
 static u32 ioaddr;
 
-/* Condensed operations for readability. */
-#define currticks()	get_timer(0)
-
 /* media options */
 #define MAX_UNITS 8
 static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };

@@ -473,9 +470,10 @@ static int rtl_send(struct eth_device *dev, volatile void *packet, int length)
 	int entry = tpc->cur_tx % NUM_TX_DESC;
 	u32 len = length;
 	int ret;
+	u32 ts;
 
 #ifdef DEBUG_RTL8169_TX
-	int stime = currticks();
+	int stime = time_now_ms();
 	printf ("%s\n", __FUNCTION__);
 	printf("sending %d bytes\n", len);
 #endif

@@ -504,17 +502,17 @@ static int rtl_send(struct eth_device *dev, volatile void *packet, int length)
 	RTL_W8(TxPoll, 0x40);	/* set polling bit */
 
 	tpc->cur_tx++;
-	to = currticks() + TX_TIMEOUT;
+	ts = time_now_ms();
 	do {
 		flush_cache((unsigned long)&tpc->TxDescArray[entry],
 				sizeof(struct TxDesc));
 	} while ((le32_to_cpu(tpc->TxDescArray[entry].status) & OWNbit)
-				&& (currticks() < to));	/* wait */
+			&& (time_since_ms(ts) < TX_TIMEOUT));	/* wait */
 
-	if (currticks() >= to) {
+	if (time_since_ms(ts) >= TX_TIMEOUT) {
 #ifdef DEBUG_RTL8169_TX
 		puts ("tx timeout/error\n");
-		printf ("%s elapsed time : %d\n", __FUNCTION__, currticks()-stime);
+		printf ("%s elapsed time : %d\n", __FUNCTION__, time_max_since_ms(stime));
 #endif
 		ret = 0;
 	} else {

@@ -556,7 +554,7 @@ static void rtl8169_hw_start(struct eth_device *dev)
 	u32 i;
 
 #ifdef DEBUG_RTL8169
-	int stime = currticks();
+	int stime = time_now_ms();
 	printf ("%s\n", __FUNCTION__);
 #endif
 

@@ -616,7 +614,7 @@ static void rtl8169_hw_start(struct eth_device *dev)
 	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
 
 #ifdef DEBUG_RTL8169
-	printf ("%s elapsed time : %d\n", __FUNCTION__, currticks()-stime);
+	printf ("%s elapsed time : %d\n", __FUNCTION__, time_max_since_ms(stime));
 #endif
 }
 

@@ -625,7 +623,7 @@ static void rtl8169_init_ring(struct eth_device *dev)
 	int i;
 
 #ifdef DEBUG_RTL8169
-	int stime = currticks();
+	int stime = time_now_ms();
 	printf ("%s\n", __FUNCTION__);
 #endif
 

@@ -654,7 +652,7 @@ static void rtl8169_init_ring(struct eth_device *dev)
 	}
 
 #ifdef DEBUG_RTL8169
-	printf ("%s elapsed time : %d\n", __FUNCTION__, currticks()-stime);
+	printf ("%s elapsed time : %d\n", __FUNCTION__, time_max_sine_ms(stime));
 #endif
 }
 

@@ -666,7 +664,7 @@ static int rtl_reset(struct eth_device *dev, bd_t *bis)
 	int i;
 
 #ifdef DEBUG_RTL8169
-	int stime = currticks();
+	int stime = time_now_ms();
 	printf ("%s\n", __FUNCTION__);
 #endif
 

@@ -695,7 +693,7 @@ static int rtl_reset(struct eth_device *dev, bd_t *bis)
 	txb[5] = dev->enetaddr[5];
 
 #ifdef DEBUG_RTL8169
-	printf ("%s elapsed time : %d\n", __FUNCTION__, currticks()-stime);
+	printf ("%s elapsed time : %d\n", __FUNCTION__, time_max_since_ms(stime));
 #endif
 	return 0;
 }

index ba9c67e..7ae0580 100644
@@ -251,14 +251,14 @@ static void print_packet( byte *, int );
 
 static int poll4int (struct eth_device *dev, byte mask, int timeout)
 {
-	int tmo = get_timer (0) + timeout * CONFIG_SYS_HZ;
+	int ts = time_ms_now();
 	int is_timeout = 0;
 	word old_bank = SMC_inw (dev, BSR_REG);
 
 	PRINTK2 ("Polling...\n");
 	SMC_SELECT_BANK (dev, 2);
 	while ((SMC_inw (dev, SMC91111_INT_REG) & mask) == 0) {
-		if (get_timer (0) >= tmo) {
+		if (time_ms_delta_min(ts, time_ms_now()) >= (timeout * 1000)) {
 			is_timeout = 1;
 			break;
 		}

index a6aecad..aec70d5 100644
@@ -76,15 +76,15 @@ int serial_init (void)
  */
 void serial_putc (const char c)
 {
-	int tmo;
+	u32 ts;
 
 	/* If \n, also do \r */
 	if (c == '\n')
 		serial_putc ('\r');
 
-	tmo = get_timer (0) + 1 * CONFIG_SYS_HZ;
+	ts = time_now_ms();
 	while (IO_SYSFLG1 & SYSFLG1_UTXFF)
-		if (get_timer (0) > tmo)
+		if (time_since_ms(ts) > 1000)
 			break;
 
 	IO_UARTDR1 = c;

index d04790d..78f3c90 100644
@@ -43,9 +43,9 @@ DECLARE_GLOBAL_DATA_PTR;
 /* wait until transmitter is ready for another character */
 #define TXWAITRDY(registers)							\
 {										\
-	ulong tmo = get_timer(0) + 1 * CONFIG_SYS_HZ;					\
+	u32 st = time_now_ms();						\
 	while (((registers)->status_a & NETARM_SER_STATA_TX_RDY) == 0 )	{	\
-		if (get_timer(0) > tmo)						\
+		if (time_since_ms(st) > 1000)		\
 			break;							\
 	}									\
 }

index e7d3ff0..d77c5fe 100644
@@ -141,7 +141,6 @@ unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
 
 unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
 {
-	unsigned int timeout;
 	unsigned int timebase;
 
 	pDesc->state = BUSY;

@@ -174,19 +173,18 @@ unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
 	}
 
 	/* arm simple, non interrupt dependent timer */
-	timebase = get_timer(0);
-	timeout = 0;
+	timebase = time_now_ms();
 
 	writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN,
 		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
 	while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_RXBUFF) &&
-		((timeout = get_timer(timebase)) < CONFIG_SYS_SPI_WRITE_TOUT))
+		(time_since_ms(timebase) < CONFIG_SYS_SPI_WRITE_TOUT))
 		;
 	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
 		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
 	pDesc->state = IDLE;
 
-	if (timeout >= CONFIG_SYS_SPI_WRITE_TOUT) {
+	if (time_since_ms(timebase) >= CONFIG_SYS_SPI_WRITE_TOUT) {
 		printf("Error Timeout\n\r");
 		return DATAFLASH_ERROR;
 	}

index 9fb0e80..52396d0 100644
@@ -1922,8 +1922,8 @@ static void eth_start(struct eth_dev *dev, gfp_t gfp_flags)
 static int eth_stop(struct eth_dev *dev)
 {
 #ifdef RNDIS_COMPLETE_SIGNAL_DISCONNECT
-	unsigned long ts;
-	unsigned long timeout = CONFIG_SYS_HZ; /* 1 sec to stop RNDIS */
+	u32 ts;
+	u32 timeout = CONFIG_SYS_HZ; /* 1 sec to stop RNDIS */
 #endif
 
 	if (rndis_active(dev)) {

@@ -1932,8 +1932,8 @@ static int eth_stop(struct eth_dev *dev)
 
 #ifdef RNDIS_COMPLETE_SIGNAL_DISCONNECT
 		/* Wait until host receives OID_GEN_MEDIA_CONNECT_STATUS */
-		ts = get_timer(0);
-		while (get_timer(ts) < timeout)
+		ts = time_now_ms();
+		while (time_since_ms(start) < timeout)
 			usb_gadget_handle_interrupts();
 #endif
 

@@ -2332,8 +2332,8 @@ static int usb_eth_init(struct eth_device *netdev, bd_t *bd)
 {
 	struct eth_dev *dev = &l_ethdev;
 	struct usb_gadget *gadget;
-	unsigned long ts;
-	unsigned long timeout = USB_CONNECT_TIMEOUT;
+	u32 ts;
+	u32 timeout = USB_CONNECT_TIMEOUT;
 
 	if (!netdev) {
 		error("received NULL ptr");

@@ -2379,10 +2379,11 @@ static int usb_eth_init(struct eth_device *netdev, bd_t *bd)
 	if (getenv("cdc_connect_timeout"))
 		timeout = simple_strtoul(getenv("cdc_connect_timeout"),
 						NULL, 10) * CONFIG_SYS_HZ;
-	ts = get_timer(0);
+	ts = time_now_ms();
 	while (!l_ethdev.network_started) {
 		/* Handle control-c and timeouts */
-		if (ctrlc() || (get_timer(ts) > timeout)) {
+		if (ctrlc() ||
+		    (time_since_ms(ts) > timeout)) {
 			error("The remote end did not respond in time.");
 			goto fail;
 		}

@@ -2403,8 +2404,8 @@ static int usb_eth_send(struct eth_device *netdev,
 	void			*rndis_pkt = NULL;
 	struct eth_dev		*dev = &l_ethdev;
 	struct usb_request	*req = dev->tx_req;
-	unsigned long ts;
-	unsigned long timeout = USB_CONNECT_TIMEOUT;
+	u32 ts;
+	u32 timeout = USB_CONNECT_TIMEOUT;
 
 	debug("%s:...\n", __func__);
 

@@ -2443,7 +2444,7 @@ static int usb_eth_send(struct eth_device *netdev,
 			? ((dev->tx_qlen % qmult) != 0) : 0;
 #endif
 	dev->tx_qlen = 1;
-	ts = get_timer(0);
+	ts = time_now_ms();
 	packet_sent = 0;
 
 	retval = usb_ep_queue(dev->in_ep, req, GFP_ATOMIC);

@@ -2451,7 +2452,7 @@ static int usb_eth_send(struct eth_device *netdev,
 	if (!retval)
 		debug("%s: packet queued\n", __func__);
 	while (!packet_sent) {
-		if (get_timer(ts) > timeout) {
+		if (time_since_ms(ts) > timeout) {
 			printf("timeout sending packets to usb ethernet\n");
 			return -1;
 		}

index 70c02c9..52751fa 100644
@@ -314,12 +314,12 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 	struct QH *qh;
 	struct qTD *td;
 	volatile struct qTD *vtd;
-	unsigned long ts;
+	u32 ts;
 	uint32_t *tdp;
 	uint32_t endpt, token, usbsts;
 	uint32_t c, toggle;
 	uint32_t cmd;
-	int timeout;
+	u32 timeout;
 	int ret = 0;
 
 	debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,

@@ -446,7 +446,7 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 	}
 
 	/* Wait for TDs to be processed. */
-	ts = get_timer(0);
+	ts = time_now_ms();
 	vtd = td;
 	timeout = USB_TIMEOUT_MS(pipe);
 	do {

@@ -456,7 +456,7 @@ ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 		if (!(token & 0x80))
 			break;
 		WATCHDOG_RESET();
-	} while (get_timer(ts) < timeout);
+	} while (time_since_ms(ts) < timeout);
 
 	/* Check that the TD processing happened */
 	if (token & 0x80) {

index 82a8b36..9e7dad7 100644
@@ -234,7 +234,8 @@ static int sl811_send_packet(struct usb_device *dev, unsigned long pipe, __u8 *b
 {
 	__u8 ctrl = SL811_USB_CTRL_ARM | SL811_USB_CTRL_ENABLE;
 	__u16 status = 0;
-	int err = 0, time_start = get_timer(0);
+	int err = 0;
+	u32 ts = time_now_ms();
 	int need_preamble = !(rh_status.wPortStatus & USB_PORT_STAT_LOW_SPEED) &&
 		usb_pipeslow(pipe);
 

@@ -264,7 +265,7 @@ static int sl811_send_packet(struct usb_device *dev, unsigned long pipe, __u8 *b
 
 		sl811_write(SL811_CTRL_A, ctrl);
 		while (!(sl811_read(SL811_INTRSTS) & SL811_INTR_DONE_A)) {
-			if (5*CONFIG_SYS_HZ < get_timer(time_start)) {
+			if (time_since_ms(ts) >= 5000) {
 				printf("USB transmit timed out\n");
 				return -USB_ST_CRC_ERR;
 			}

index 4db63cb..8c9560d 100644
@@ -637,7 +637,7 @@ BootpRequest (void)
 	bp->bp_htype = HWT_ETHER;
 	bp->bp_hlen = HWL_ETHER;
 	bp->bp_hops = 0;
-	bp->bp_secs = htons(get_timer(0) / 1000);
+	bp->bp_secs = htons(time_ms_now() / 1000);
 	NetWriteIP(&bp->bp_ciaddr, 0);
 	NetWriteIP(&bp->bp_yiaddr, 0);
 	NetWriteIP(&bp->bp_siaddr, 0);

@@ -660,7 +660,7 @@ BootpRequest (void)
 		| ((ulong)NetOurEther[3] << 16)
 		| ((ulong)NetOurEther[4] << 8)
 		| (ulong)NetOurEther[5];
-	BootpID += get_timer(0);
+	BootpID += time_now_ms();
 	BootpID	 = htonl(BootpID);
 	NetCopyLong(&bp->bp_id, &BootpID);
 

@@ -819,7 +819,7 @@ static void DhcpSendRequestPkt(Bootp_t *bp_offer)
 	bp->bp_htype = HWT_ETHER;
 	bp->bp_hlen = HWL_ETHER;
 	bp->bp_hops = 0;
-	bp->bp_secs = htons(get_timer(0) / 1000);
+	bp->bp_secs = htons(time_ms_now() / 1000);
 	/* Do not set the client IP, your IP, or server IP yet, since it hasn't been ACK'ed by
 	 * the server yet */