musb: Use name based initialization for musb_config

index 40bfe44..617d88e 100644
@@ -27,9 +27,9 @@
 
 /* MUSB platform configuration */
 struct musb_config musb_cfg = {
-	(struct	musb_regs *)DA8XX_USB_OTG_CORE_BASE,
-	DA8XX_USB_OTG_TIMEOUT,
-	0
+	.regs		= (struct musb_regs *)DA8XX_USB_OTG_CORE_BASE,
+	.timeout	= DA8XX_USB_OTG_TIMEOUT,
+	.musb_speed	= 0,
 };
 
 /*

index 8fbadc9..f56f2df 100644
@@ -28,9 +28,9 @@
 
 /* MUSB platform configuration */
 struct musb_config musb_cfg = {
-	(struct	musb_regs *)MENTOR_USB0_BASE,
-	DAVINCI_USB_TIMEOUT,
-	0
+	.regs		= (struct musb_regs *)MENTOR_USB0_BASE,
+	.timeout	= DAVINCI_USB_TIMEOUT,
+	.musb_speed	= 0,
 };
 
 /* MUSB module register overlay */

index 3bfd0a0..785629c 100644
@@ -36,9 +36,9 @@
 static int platform_needs_initialization = 1;
 
 struct musb_config musb_cfg = {
-	(struct	musb_regs *)MENTOR_USB0_BASE,
-	OMAP3_USB_TIMEOUT,
-	0
+	.regs		= (struct musb_regs *)MENTOR_USB0_BASE,
+	.timeout	= OMAP3_USB_TIMEOUT,
+	.musb_speed	= 0,
 };
 
 /*

index 7766069..dc740cf 100644
@@ -34,6 +34,7 @@ void musb_start(void)
 {
 #if defined(CONFIG_MUSB_HCD)
 	u8 devctl;
+	u8 busctl;
 #endif
 
 	/* disable all interrupts */

@@ -45,6 +46,12 @@ void musb_start(void)
 	/* put into basic highspeed mode and start session */
 	writeb(MUSB_POWER_HSENAB, &musbr->power);
 #if defined(CONFIG_MUSB_HCD)
+	/* Program PHY to use EXT VBUS if required */
+	if (musb_cfg.extvbus == 1) {
+		busctl = musb_read_ulpi_buscontrol(musbr);
+		musb_write_ulpi_buscontrol(musbr, busctl | ULPI_USE_EXTVBUS);
+	}
+
 	devctl = readb(&musbr->devctl);
 	writeb(devctl | MUSB_DEVCTL_SESSION, &musbr->devctl);
 #endif

index 9a1fb4f..4771876 100644
@@ -112,7 +112,10 @@ struct musb_regs {
 	u16	rxfifoadd;
 	u32	vcontrol;
 	u16	hwvers;
-	u16	reserved2[5];
+	u16	reserved2a[1];
+	u8	ulpi_busctl;
+	u8	reserved2b[1];
+	u16	reserved2[3];
 	u8	epinfo;
 	u8	raminfo;
 	u8	linkinfo;

@@ -181,6 +184,10 @@ struct musb_regs {
 #define MUSB_DEVCTL_HR		0x02
 #define MUSB_DEVCTL_SESSION	0x01
 
+/* ULPI VBUSCONTROL */
+#define ULPI_USE_EXTVBUS	0x01
+#define ULPI_USE_EXTVBUSIND	0x02
+
 /* TESTMODE */
 #define MUSB_TEST_FORCE_HOST	0x80
 #define MUSB_TEST_FIFO_ACCESS	0x40

@@ -341,6 +348,7 @@ struct musb_config {
 	struct	musb_regs	*regs;
 	u32			timeout;
 	u8			musb_speed;
+	u8			extvbus;
 };
 
 /* externally defined data */

@@ -361,6 +369,26 @@ extern void read_fifo(u8 ep, u32 length, void *fifo_data);
 # define readb(addr)     (u8)bfin_read16(addr)
 # undef  writeb
 # define writeb(b, addr) bfin_write16(addr, b)
+/*
+ * The USB PHY on current Blackfin processors is a UTMI+ level 2 PHY.
+ * However, it has no ULPI support - so there are no registers at all.
+ * That means accesses to ULPI_BUSCONTROL have to be abstracted away.
+ */
+static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
+{
+	return 0;
+}
+static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val)
+{}
+#else
+static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr)
+{
+	return readb(&musbr->ulpi_busctl);
+}
+static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val)
+{
+	writeb(val, &musbr->ulpi_busctl);
+}
 #endif
 
 #endif	/* __MUSB_HDRC_DEFS_H__ */

index 0718a08..fcc1803 100644
@@ -37,6 +37,33 @@
 #include <asm/mach-types.h>
 #include "evm.h"
 
+static u8 omap3_evm_version;
+
+u8 get_omap3_evm_rev(void)
+{
+	return omap3_evm_version;
+}
+
+static void omap3_evm_get_revision(void)
+{
+	unsigned int smsc_id;
+
+	/* Ethernet PHY ID is stored at ID_REV register */
+	smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000;
+	printf("Read back SMSC id 0x%x\n", smsc_id);
+
+	switch (smsc_id) {
+	/* SMSC9115 chipset */
+	case 0x01150000:
+		omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
+		break;
+	/* SMSC 9220 chipset */
+	case 0x92200000:
+	default:
+		omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
+       }
+}
+
 /*
  * Routine: board_init
  * Description: Early hardware init.

@@ -121,6 +148,9 @@ static void setup_net_chip(void)
 	writel(GPIO0, &gpio3_base->cleardataout);
 	udelay(1);
 	writel(GPIO0, &gpio3_base->setdataout);
+
+	/* determine omap3evm revision */
+	omap3_evm_get_revision();
 }
 
 int board_eth_init(bd_t *bis)

index 37da29d..e2581f6 100644
@@ -33,6 +33,20 @@ const omap3_sysinfo sysinfo = {
 #endif
 };
 
+/*
+ * OMAP35x EVM revision
+ * Run time detection of EVM revision is done by reading Ethernet
+ * PHY ID -
+ *      GEN_1   = 0x01150000
+ *      GEN_2   = 0x92200000
+ */
+enum {
+	OMAP3EVM_BOARD_GEN_1 = 0,	/* EVM Rev between  A - D */
+	OMAP3EVM_BOARD_GEN_2,		/* EVM Rev >= Rev E */
+};
+
+u8 get_omap3_evm_rev(void);
+
 static void setup_net_chip(void);
 
 /*

index fcc1803..9948b9c 100644
@@ -65,6 +65,19 @@ static void omap3_evm_get_revision(void)
 }
 
 /*
+ * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
+ */
+u8 omap3_evm_need_extvbus(void)
+{
+	u8 retval = 0;
+
+	if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
+		retval = 1;
+
+	return retval;
+}
+
+/*
  * Routine: board_init
  * Description: Early hardware init.
  */

index 785629c..a983552 100644
@@ -119,6 +119,9 @@ int musb_platform_init(void)
 		stdby &= ~OMAP3_OTG_FORCESTDBY_STANDBY;
 		writel(stdby, &otg->forcestdby);
 
+#ifdef CONFIG_OMAP3_EVM
+		musb_cfg.extvbus = omap3_evm_need_extvbus();
+#endif
 		platform_needs_initialization = 0;
 	}
 

index b591862..c934e0c 100644
@@ -44,4 +44,8 @@
 
 int musb_platform_init(void);
 
+#ifdef CONFIG_OMAP3_EVM
+extern u8 omap3_evm_use_extvbus(void);
+#endif
+
 #endif /* _MUSB_OMAP3_H */