ARM: MX5: Fix broken leftover TO-2 errata workaround
Subsystems (2)
PATCH 1/1 ARM: MX5: Fix broken leftover TO-2 errata workaround
This check was broken. r3 does not contain the silicon revision anymore, so we need to reload it.
--- arch/arm/cpu/armv7/mx5/lowlevel_init.S | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-)
arch/arm/cpu/armv7/mx5/lowlevel_init.S +3 -1
@@ -39,7 +39,9 @@ orr r0, r0, #(1 << 23) /* disable write allocate combine */ orr r0, r0, #(1 << 22) /* disable write allocate */ - cmp r3, #0x10 /* r3 contains the silicon rev */ + ldr r1, =0x0 + ldr r3, [r1, #ROM_SI_REV] + cmp r3, #0x10 /* disable write combine for TO 2 and lower revs */ orrls r0, r0, #(1 << 25)
Signature · 1 line
1.7.4.1
PATCH 1/1 ARM: MX5: Fix broken leftover TO-2 errata workaround
Quoted 5 lines · David Jander
This check was broken. r3 does not contain the silicon revision anymore, so we need to reload it.
Signed-off-by David Jander <[email protected]>---
Hi David,
Quoted 8 lines
arch/arm/cpu/armv7/mx5/lowlevel_init.S | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-)arch/arm/cpu/armv7/mx5/lowlevel_init.S +0
-0
arch/arm/cpu/armv7/mx5/lowlevel_init.S line 44
Quoted 7 lines
arch/arm/cpu/armv7/mx5/lowlevel_init.S +3
-1@@ -39,7 +39,9 @@ orr r0, r0, #(1 << 23) /* disable write allocate combine */ orr r0, r0, #(1 << 22) /* disable write allocate */ - cmp r3, #0x10 /* r3 contains the silicon rev */ + ldr r1, =0x0 + ldr r3, [r1, #ROM_SI_REV] + cmp r3, #0x10
You have to protect the code related to TO2 with CONFIG_MX51. As I can see, the macro is called for MX.53, too, and the test produces wrong results.
Best regards,
Stefano Babic
Signature · 5 lines
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PATCH 1/1 ARM: MX5: Fix broken leftover TO-2 errata workaround
Quoted 12 lines · On Thu, 14 Jul 2011 14:14:52 +0200 Stefano Babic <[email protected]> wrote:
Quoted 5 lines · David Jander
This check was broken. r3 does not contain the silicon revision anymore, so we need to reload it.
Signed-off-by David Jander <[email protected]>---
Hi David,
Quoted 3 lines
arch/arm/cpu/armv7/mx5/lowlevel_init.S | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-)
Quoted 16 lines
arch/arm/cpu/armv7/mx5/lowlevel_init.S line 44
Quoted 12 lines
(quoted diff) +0
-0
b/arch/arm/cpu/armv7/mx5/lowlevel_init.Sindex ee4150d..6bb398f 100644arch/arm/cpu/armv7/mx5/lowlevel_init.S +0
-0@@ -39,7 +39,9 @@ orr r0, r0, #(1 << 23) /* disable write allocatecombine */ orr r0, r0, #(1 << 22) /* disable write allocate
*/arch/arm/cpu/armv7/mx5/lowlevel_init.S +3
-1- cmp r3, #0x10 /* r3 contains the silicon rev */ + ldr r1, =0x0 + ldr r3, [r1, #ROM_SI_REV] + cmp r3, #0x10You have to protect the code related to TO2 with
CONFIG_MX51. As I can see, the macro is called for MX.53, too, and the test produces wrong results.
Wow, you are right! So this code was actually broken in more ways than I initially thought :-)
Ok, will fix it (again).
Btw, may I congratulate you for your good work in improving u-boot code quality? It is starting to get to a level only known from LKML ;-) Clearly the code was not reviewed as well when this was initially submitted.
Best regards,
Signature · 2 lines
David Jander Protonic Holland.
PATCH 1/1 ARM: MX5: Fix broken leftover TO-2 errata workaround
Quoted 6 lines · David Jander
Quoted 3 lines
You have to protect the code related to TO2 with
CONFIG_MX51. As I can see, the macro is called for MX.53, too, and the test produces wrong results.Wow, you are right! So this code was actually broken in more ways than I initially thought :-)
Yes, with one shot you hit more bugs...
Quoted 3 lines
Ok, will fix it (again).
Btw, may I congratulate you for your good work in improving u-boot code quality? It is starting to get to a level only known from LKML ;-)
Congratulations go to all participants and reviewers of this ML, who are helping to improve the quality of the code ;-)
Quoted 1 line
Clearly the code was not reviewed as well when this was initially submitted.
That is right - some issues was not seen and not fixed in time.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================