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clocksource: convert S5PV210 32-bit down counting clocksource

PATCH Superseded Chanwoo Choi 2 participants 5 messages Jul 12, 2011 – Jul 18, 2011

Subsystems (2)
Arm (32-bit) Arm sub-architectures
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Chanwoo Choi

author
#0 lore raw

PATCH 1/1 clocksource: convert S5PV210 32-bit down counting clocksource

Convert the S5PV210 32-bit down-counting clocksource to the generic mmio clocksource infrastructure

Signed-off-by Chanwoo Choi <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 arch/arm/Kconfig             |    1 +
 arch/arm/plat-s5p/s5p-time.c |   20 +++-----------------
 2 files changed, 4 insertions(+), 17 deletions(-)
arch/arm/Kconfig +1 -0
index 9adc278..d7cd6f9 100644
@@ -749,6 +749,7 @@ config ARCH_S5PV210
 	bool "Samsung S5PV210/S5PC110"
 	select CPU_V7
 	select ARCH_SPARSEMEM_ENABLE
+	select CLKSRC_MMIO
 	select GENERIC_GPIO
 	select HAVE_CLK
 	select ARM_L1_CACHE_SHIFT_6
arch/arm/plat-s5p/s5p-time.c +3 -17
index 612934c..5666f55 100644
@@ -314,13 +314,6 @@ static void __iomem *s5p_timer_reg(void)
 	return S3C_TIMERREG(offset);
 }
 
-static cycle_t s5p_timer_read(struct clocksource *cs)
-{
-	void __iomem *reg = s5p_timer_reg();
-
-	return (cycle_t) (reg ? ~__raw_readl(reg) : 0);
-}
-
 /*
  * Override the global weak sched_clock symbol with this
  * local implementation which uses the clocksource to get some

@@ -350,14 +343,6 @@ static void notrace s5p_update_sched_clock(void)
 	update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
 }
 
-struct clocksource time_clocksource = {
-	.name		= "s5p_clocksource_timer",
-	.rating		= 250,
-	.read		= s5p_timer_read,
-	.mask		= CLOCKSOURCE_MASK(32),
-	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
 static void __init s5p_clocksource_init(void)
 {
 	unsigned long pclk;

@@ -375,8 +360,9 @@ static void __init s5p_clocksource_init(void)
 
 	init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
 
-	if (clocksource_register_hz(&time_clocksource, clock_rate))
-		panic("%s: can't register clocksource\n", time_clocksource.name);
+	if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
+			clock_rate, 250, 32, clocksource_mmio_readl_down))
+		panic("s5p_clocksource_timer: can't register clocksource\n");
 }
 
 static void __init s5p_timer_resources(void)
Signature · 1 line
1.7.0.4
#1 lore raw
Quoted 69 lines · Chanwoo Choi

Convert the S5PV210 32-bit down-counting clocksource to the generic mmio clocksource infrastructure

Signed-off-by Chanwoo Choi <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 arch/arm/Kconfig             |    1 +
 arch/arm/plat-s5p/s5p-time.c |   20 +++-----------------
 2 files changed, 4 insertions(+), 17 deletions(-)
arch/arm/Kconfig +1 -0
index 9adc278..d7cd6f9 100644
@@ -749,6 +749,7 @@ config ARCH_S5PV210
 	bool "Samsung S5PV210/S5PC110"
 	select CPU_V7
 	select ARCH_SPARSEMEM_ENABLE
+	select CLKSRC_MMIO
 	select GENERIC_GPIO
 	select HAVE_CLK
 	select ARM_L1_CACHE_SHIFT_6
arch/arm/plat-s5p/s5p-time.c +3 -18
index 612934c..5666f55 100644
@@ -314,13 +314,6 @@ static void __iomem *s5p_timer_reg(void)
 	return S3C_TIMERREG(offset);
 }
 
-static cycle_t s5p_timer_read(struct clocksource *cs)
-{
-	void __iomem *reg = s5p_timer_reg();
-
-	return (cycle_t) (reg ? ~__raw_readl(reg) : 0);
-}
-
 /*
  * Override the global weak sched_clock symbol with this
  * local implementation which uses the clocksource to get some

@@ -350,14 +343,6 @@ static void notrace s5p_update_sched_clock(void)
 	update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
 }
 
-struct clocksource time_clocksource = {
-	.name		= "s5p_clocksource_timer",
-	.rating		= 250,
-	.read		= s5p_timer_read,
-	.mask		= CLOCKSOURCE_MASK(32),
-	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
 static void __init s5p_clocksource_init(void)
 {
 	unsigned long pclk;

@@ -375,8 +360,9 @@ static void __init s5p_clocksource_init(void)
 
 	init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
 
-	if (clocksource_register_hz(&time_clocksource, clock_rate))
-		panic("%s: can't register clocksource\n", time_clocksource.name);
+	if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
+			clock_rate, 250, 32, clocksource_mmio_readl_down))
+		panic("s5p_clocksource_timer: can't register clocksource\n");
 }
 
 static void __init s5p_timer_resources(void)
--
Quoted 1 line

1.7.0.4

The s5p-time is also used on S5P64X0, so CLKSRC_MMIO should be add in that.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

author
#2 lore raw
Quoted 67 lines · Kukjin Kim
Quoted 66 lines · Chanwoo Choi

Convert the S5PV210 32-bit down-counting clocksource to the generic mmio clocksource infrastructure

Signed-off-by Chanwoo Choi <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 arch/arm/Kconfig             |    1 +
 arch/arm/plat-s5p/s5p-time.c |   20 +++-----------------
 2 files changed, 4 insertions(+), 17 deletions(-)
arch/arm/Kconfig +1 -0
index 9adc278..d7cd6f9 100644
@@ -749,6 +749,7 @@ config ARCH_S5PV210
 	bool "Samsung S5PV210/S5PC110"
 	select CPU_V7
 	select ARCH_SPARSEMEM_ENABLE
+	select CLKSRC_MMIO
 	select GENERIC_GPIO
 	select HAVE_CLK
 	select ARM_L1_CACHE_SHIFT_6
arch/arm/plat-s5p/s5p-time.c +3 -17
index 612934c..5666f55 100644
@@ -314,13 +314,6 @@ static void __iomem *s5p_timer_reg(void)
 	return S3C_TIMERREG(offset);
 }
 
-static cycle_t s5p_timer_read(struct clocksource *cs)
-{
-	void __iomem *reg = s5p_timer_reg();
-
-	return (cycle_t) (reg ? ~__raw_readl(reg) : 0);
-}
-
 /*
  * Override the global weak sched_clock symbol with this
  * local implementation which uses the clocksource to get some

@@ -350,14 +343,6 @@ static void notrace s5p_update_sched_clock(void)
 	update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
 }
 
-struct clocksource time_clocksource = {
-	.name		= "s5p_clocksource_timer",
-	.rating		= 250,
-	.read		= s5p_timer_read,
-	.mask		= CLOCKSOURCE_MASK(32),
-	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
 static void __init s5p_clocksource_init(void)
 {
 	unsigned long pclk;

@@ -375,8 +360,9 @@ static void __init s5p_clocksource_init(void)
 
 	init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
 
-	if (clocksource_register_hz(&time_clocksource, clock_rate))
-		panic("%s: can't register clocksource\n", time_clocksource.name);
+	if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
+			clock_rate, 250, 32, clocksource_mmio_readl_down))
+		panic("s5p_clocksource_timer: can't register clocksource\n");
 }
Quoted 6 lines
Quoted 3 lines
arch/arm/plat-s5p/s5p-time.c +0 -1
 static void __init s5p_timer_resources(void)
--

1.7.0.4

The s5p-time is also used on S5P64X0, so CLKSRC_MMIO should be add in that.

OK, I will repost the modified patch.

Thanks & Regards,
Chanwoo Choi

author
#3 lore raw

PATCH v2 1/1 clocksource: convert S5PV210/S5P64X0 32-bit down counting clocksource

In reply to Chanwoo Choi

Convert the S5PV210/S5P64X0 32-bit down-counting clocksource to the generic mmio clocksource infrastructure

Signed-off-by Chanwoo Choi <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 arch/arm/Kconfig             |    2 ++
 arch/arm/plat-s5p/s5p-time.c |   20 +++-----------------
 2 files changed, 5 insertions(+), 17 deletions(-)
arch/arm/Kconfig +2 -0
index 9adc278..98fed17 100644
@@ -721,6 +721,7 @@ config ARCH_S3C64XX
 config ARCH_S5P64X0
 	bool "Samsung S5P6440 S5P6450"
 	select CPU_V6
+	select CLKSRC_MMIO
 	select GENERIC_GPIO
 	select HAVE_CLK
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG

@@ -749,6 +750,7 @@ config ARCH_S5PV210
 	bool "Samsung S5PV210/S5PC110"
 	select CPU_V7
 	select ARCH_SPARSEMEM_ENABLE
+	select CLKSRC_MMIO
 	select GENERIC_GPIO
 	select HAVE_CLK
 	select ARM_L1_CACHE_SHIFT_6
arch/arm/plat-s5p/s5p-time.c +3 -17
index 612934c..5666f55 100644
@@ -314,13 +314,6 @@ static void __iomem *s5p_timer_reg(void)
 	return S3C_TIMERREG(offset);
 }
 
-static cycle_t s5p_timer_read(struct clocksource *cs)
-{
-	void __iomem *reg = s5p_timer_reg();
-
-	return (cycle_t) (reg ? ~__raw_readl(reg) : 0);
-}
-
 /*
  * Override the global weak sched_clock symbol with this
  * local implementation which uses the clocksource to get some

@@ -350,14 +343,6 @@ static void notrace s5p_update_sched_clock(void)
 	update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
 }
 
-struct clocksource time_clocksource = {
-	.name		= "s5p_clocksource_timer",
-	.rating		= 250,
-	.read		= s5p_timer_read,
-	.mask		= CLOCKSOURCE_MASK(32),
-	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
 static void __init s5p_clocksource_init(void)
 {
 	unsigned long pclk;

@@ -375,8 +360,9 @@ static void __init s5p_clocksource_init(void)
 
 	init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
 
-	if (clocksource_register_hz(&time_clocksource, clock_rate))
-		panic("%s: can't register clocksource\n", time_clocksource.name);
+	if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
+			clock_rate, 250, 32, clocksource_mmio_readl_down))
+		panic("s5p_clocksource_timer: can't register clocksource\n");
 }
 
 static void __init s5p_timer_resources(void)
Signature · 1 line
1.7.0.4
#4 lore raw

RE: [PATCHv2] clocksource: convert S5PV210/S5P64X0 32-bit down counting clocksource

Quoted 77 lines · Chanwoo Choi

Convert the S5PV210/S5P64X0 32-bit down-counting clocksource to the generic mmio clocksource infrastructure

Signed-off-by Chanwoo Choi <[email protected]>
Signed-off-by Kyungmin Park <[email protected]>
---
 arch/arm/Kconfig             |    2 ++
 arch/arm/plat-s5p/s5p-time.c |   20 +++-----------------
 2 files changed, 5 insertions(+), 17 deletions(-)
arch/arm/Kconfig +2 -0
index 9adc278..98fed17 100644
@@ -721,6 +721,7 @@ config ARCH_S3C64XX
 config ARCH_S5P64X0
 	bool "Samsung S5P6440 S5P6450"
 	select CPU_V6
+	select CLKSRC_MMIO
 	select GENERIC_GPIO
 	select HAVE_CLK
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG

@@ -749,6 +750,7 @@ config ARCH_S5PV210
 	bool "Samsung S5PV210/S5PC110"
 	select CPU_V7
 	select ARCH_SPARSEMEM_ENABLE
+	select CLKSRC_MMIO
 	select GENERIC_GPIO
 	select HAVE_CLK
 	select ARM_L1_CACHE_SHIFT_6
arch/arm/plat-s5p/s5p-time.c +3 -18
index 612934c..5666f55 100644
@@ -314,13 +314,6 @@ static void __iomem *s5p_timer_reg(void)
 	return S3C_TIMERREG(offset);
 }
 
-static cycle_t s5p_timer_read(struct clocksource *cs)
-{
-	void __iomem *reg = s5p_timer_reg();
-
-	return (cycle_t) (reg ? ~__raw_readl(reg) : 0);
-}
-
 /*
  * Override the global weak sched_clock symbol with this
  * local implementation which uses the clocksource to get some

@@ -350,14 +343,6 @@ static void notrace s5p_update_sched_clock(void)
 	update_sched_clock(&cd, ~__raw_readl(reg), (u32)~0);
 }
 
-struct clocksource time_clocksource = {
-	.name		= "s5p_clocksource_timer",
-	.rating		= 250,
-	.read		= s5p_timer_read,
-	.mask		= CLOCKSOURCE_MASK(32),
-	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
 static void __init s5p_clocksource_init(void)
 {
 	unsigned long pclk;

@@ -375,8 +360,9 @@ static void __init s5p_clocksource_init(void)
 
 	init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate);
 
-	if (clocksource_register_hz(&time_clocksource, clock_rate))
-		panic("%s: can't register clocksource\n", time_clocksource.name);
+	if (clocksource_mmio_init(s5p_timer_reg(), "s5p_clocksource_timer",
+			clock_rate, 250, 32, clocksource_mmio_readl_down))
+		panic("s5p_clocksource_timer: can't register clocksource\n");
 }
 
 static void __init s5p_timer_resources(void)
--
Quoted 1 line

1.7.0.4

Looks ok, applied.
Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.