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OMAP: ctrl: Fix CONTROL_DSIPHY register fields

PATCH New Archit Taneja 3 participants 3 messages Jul 27, 2011 – Aug 1, 2011

Subsystems (3)
Arm (32-bit) Arm sub-architectures OMAP2+ support
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Archit Taneja

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#0 lore raw

PATCH v2 1/1 OMAP: ctrl: Fix CONTROL_DSIPHY register fields

Fix the shift and mask macros for DSIx_PPID fields in CONTROL_DSIPHY. The OMAP4430 Public TRM vV has these fields mentioned correctly.

Signed-off-by Archit Taneja <[email protected]>
Acked-by Benoit Cousson <[email protected]>

---
v2:
- Improve commit description.
- Define fields in decreasing order of the field's end bit.

 .../include/mach/ctrl_module_pad_core_44xx.h       |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h +4 -4
index c88420d..1e2d332 100644
@@ -941,10 +941,10 @@
 #define OMAP4_DSI2_LANEENABLE_MASK				(0x7 << 29)
 #define OMAP4_DSI1_LANEENABLE_SHIFT				24
 #define OMAP4_DSI1_LANEENABLE_MASK				(0x1f << 24)
-#define OMAP4_DSI1_PIPD_SHIFT					19
-#define OMAP4_DSI1_PIPD_MASK					(0x1f << 19)
-#define OMAP4_DSI2_PIPD_SHIFT					14
-#define OMAP4_DSI2_PIPD_MASK					(0x1f << 14)
+#define OMAP4_DSI2_PIPD_SHIFT					19
+#define OMAP4_DSI2_PIPD_MASK					(0x1f << 19)
+#define OMAP4_DSI1_PIPD_SHIFT					14
+#define OMAP4_DSI1_PIPD_MASK					(0x1f << 14)
 
 /* CONTROL_MCBSPLP */
 #define OMAP4_ALBCTRLRX_FSX_SHIFT				31
Signature · 1 line
1.7.1
#1 lore raw

PATCH v2 1/1 OMAP: ctrl: Fix CONTROL_DSIPHY register fields

Quoted 10 lines · Archit Taneja

Fix the shift and mask macros for DSIx_PPID fields in CONTROL_DSIPHY. The OMAP4430 Public TRM vV has these fields mentioned correctly.

Signed-off-by Archit Taneja<[email protected]>
Acked-by Benoit Cousson<[email protected]>

---
v2:
- Improve commit description.
- Define fields in decreasing order of the field's end bit.

Thanks for the update.

Acked-by Santosh Shilimkar <[email protected]>
Quoted 22 lines
  .../include/mach/ctrl_module_pad_core_44xx.h       |    8 ++++----
  1 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h +4 -4
index c88420d..1e2d332 100644
@@ -941,10 +941,10 @@
  #define OMAP4_DSI2_LANEENABLE_MASK				(0x7<<  29)
  #define OMAP4_DSI1_LANEENABLE_SHIFT				24
  #define OMAP4_DSI1_LANEENABLE_MASK				(0x1f<<  24)
-#define OMAP4_DSI1_PIPD_SHIFT					19
-#define OMAP4_DSI1_PIPD_MASK					(0x1f<<  19)
-#define OMAP4_DSI2_PIPD_SHIFT					14
-#define OMAP4_DSI2_PIPD_MASK					(0x1f<<  14)
+#define OMAP4_DSI2_PIPD_SHIFT					19
+#define OMAP4_DSI2_PIPD_MASK					(0x1f<<  19)
+#define OMAP4_DSI1_PIPD_SHIFT					14
+#define OMAP4_DSI1_PIPD_MASK					(0x1f<<  14)
 
  /* CONTROL_MCBSPLP */
  #define OMAP4_ALBCTRLRX_FSX_SHIFT				31
#2 lore raw

PATCH v2 1/1 OMAP: ctrl: Fix CONTROL_DSIPHY register fields

In reply to Archit Taneja
Quoted 2 lines · Archit Taneja

Fix the shift and mask macros for DSIx_PPID fields in CONTROL_DSIPHY. The OMAP4430 Public TRM vV has these fields mentioned correctly.

Thanks, queued for 3.2 in the scm_fixes_3.2 branch of
git://git.pwsan.com/linux-2.6

Also added Santosh's ack.

- Paul