powerpc/85xx: Add support for FMan ethernet in Independent mode

index 6aca166..27f836c 100644
@@ -31,6 +31,7 @@
 #include <asm/processor.h>
 #include <ioports.h>
 #include <sata.h>
+#include <fm_eth.h>
 #include <asm/io.h>
 #include <asm/cache.h>
 #include <asm/mmu.h>

@@ -472,6 +473,10 @@ skip_l2:
 	}
 #endif
 
+#ifdef CONFIG_FMAN_ENET
+	fman_enet_init();
+#endif
+
 	return 0;
 }
 

index 767bc52..861952d 100644
@@ -27,6 +27,7 @@
 #include <common.h>
 #include <command.h>
 #include <tsec.h>
+#include <fm_eth.h>
 #include <netdev.h>
 #include <asm/cache.h>
 #include <asm/io.h>

@@ -174,5 +175,8 @@ int cpu_eth_init(bd_t *bis)
 	tsec_standard_init(bis);
 #endif
 
+#ifdef CONFIG_FMAN_ENET
+	fm_standard_init(bis);
+#endif
 	return 0;
 }

index 9aad9be..c5e5c9c 100644
@@ -96,6 +96,11 @@
 #endif /* TSEC_ENET */
 #endif /* !CONFIG_PHYLIB */
 
+/* The FMAN driver uses the PHYLIB infrastructure */
+#if defined(CONFIG_FMAN_ENET)
+#define CONFIG_PHYLIB
+#endif
+
 /* All PPC boards must swap IDE bytes */
 #define CONFIG_IDE_SWAP_IO
 

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index 6aaade0..50569fb 100644
@@ -1700,12 +1700,24 @@ typedef struct ccsr_gur {
 #define FSL_CORENET_RCWSR8_HOST_AGT_B1		0x00e00000
 #define FSL_CORENET_RCWSR8_HOST_AGT_B2		0x00100000
 #define FSL_CORENET_RCWSR11_EC1			0x00c00000 /* bits 360..361 */
-#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC1	0x00000000
-#define FSL_CORENET_RCWSR11_EC1_FM1_USB1	0x00800000
+#if defined(CONFIG_PPC_P4080)
+#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC1		0x00000000
+#define FSL_CORENET_RCWSR11_EC1_FM1_USB1		0x00800000
 #define FSL_CORENET_RCWSR11_EC2			0x001c0000 /* bits 363..365 */
-#define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC1	0x00000000
-#define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC2	0x00080000
-#define FSL_CORENET_RCWSR11_EC2_USB2		0x00100000
+#define FSL_CORENET_RCWSR11_EC2_FM2_DTSEC1		0x00000000
+#define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC2		0x00080000
+#define FSL_CORENET_RCWSR11_EC2_USB2			0x00100000
+#endif
+#if defined(CONFIG_PPC_P2040) || defined(CONFIG_PPC_P2041) \
+	|| defined(CONFIG_PPC_P3041) || defined(CONFIG_PPC_P5020)
+#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_RGMII	0x00000000
+#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_MII		0x00800000
+#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_NONE		0x00c00000
+#define FSL_CORENET_RCWSR11_EC2			0x00180000 /* bits 363..364 */
+#define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC5_RGMII	0x00000000
+#define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC5_MII		0x00100000
+#define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC5_NONE		0x00180000
+#endif
 	u8	res18[192];
 	u32	scratchrw[4];	/* Scratch Read/Write */
 	u8	res19[240];

@@ -1873,6 +1885,7 @@ typedef struct ccsr_gur {
 #if defined(CONFIG_P1017) || defined(CONFIG_P1023)
 #define MPC85xx_PORDEVSR_SGMII1_DIS	0x10000000
 #define MPC85xx_PORDEVSR_SGMII2_DIS	0x08000000
+#define MPC85xx_PORDEVSR_TSEC1_PRTC	0x02000000
 #else
 #define MPC85xx_PORDEVSR_SGMII1_DIS	0x20000000
 #define MPC85xx_PORDEVSR_SGMII2_DIS	0x10000000

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new file mode 100644
index 0000000..19ef7c4
@@ -0,0 +1,26 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __FMAN_BOARD_HELPER__
+#define __FMAN_BOARD_HELPER__
+
+void fdt_set_phy_handle(void *fdt, char *compat, phys_addr_t addr,
+			const char *alias);
+
+#endif

index b1e7823..7c82da0 100644
@@ -32,6 +32,7 @@
 #include <asm/fsl_serdes.h>
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
+#include <fm_eth.h>
 
 extern void pci_of_setup(void *blob, bd_t *bd);
 

@@ -219,6 +220,8 @@ int misc_init_r(void)
 	return 0;
 }
 
+extern void fdt_fixup_board_enet(void *blob);
+
 void ft_board_setup(void *blob, bd_t *bd)
 {
 	phys_addr_t base;

@@ -237,9 +240,9 @@ void ft_board_setup(void *blob, bd_t *bd)
 
 	fdt_fixup_liodn(blob);
 	fdt_fixup_dr_usb(blob, bd);
-}
 
-int board_eth_init(bd_t *bis)
-{
-	return pci_eth_init(bis);
+#ifdef CONFIG_SYS_DPAA_FMAN
+	fdt_fixup_fman_ethernet(blob);
+	fdt_fixup_board_enet(blob);
+#endif
 }

506 lines not on this page · raw message

index eb89b30..4f8c391 100644
@@ -474,7 +474,6 @@
 #define CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_DPAA_PME
 /* Default address of microcode for the Linux Fman driver */
-#define CONFIG_SYS_FMAN_FW
 #if defined(CONFIG_SPIFLASH)
 /*
  * env is stored@0x100000, sector size is 0x10000, ucode is stored after

@@ -498,6 +497,9 @@
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
+#define CONFIG_PHYLIB_10G
+#define CONFIG_PHY_VITESSE
+#define CONFIG_PHY_TERANETICS
 #endif
 
 #ifdef CONFIG_PCI

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index 50569fb..0dd57f3 100644
@@ -1984,6 +1984,9 @@ typedef struct ccsr_gur {
 #define MPC85xx_PMUXCR_CAN2_TDM			0x00000002
 #define MPC85xx_PMUXCR_CAN2_RES			0x00000003
 #endif
+#if defined(CONFIG_P1017) || defined(CONFIG_P1023)
+#define MPC85xx_PMUXCR_TSEC1_1		0x10000000
+#else
 #define MPC85xx_PMUXCR_SD_DATA		0x80000000
 #define MPC85xx_PMUXCR_SDHC_CD		0x40000000
 #define MPC85xx_PMUXCR_SDHC_WP		0x20000000

@@ -2002,6 +2005,7 @@ typedef struct ccsr_gur {
 #define MPC85xx_PMUXCR_QE10		0x00000020
 #define MPC85xx_PMUXCR_QE11		0x00000010
 #define MPC85xx_PMUXCR_QE12		0x00000008
+#endif
 #if defined(CONFIG_P1013) || defined(CONFIG_P1022)
 #define MPC85xx_PMUXCR_TDM_MASK		0x0001cc00
 #define MPC85xx_PMUXCR_TDM		0x00014800

index 8cfd199..546819c 100644
@@ -38,6 +38,11 @@
 #include <fdt_support.h>
 #include <netdev.h>
 #include <malloc.h>
+#include <fm_eth.h>
+#include <fsl_mdio.h>
+#include <miiphy.h>
+#include <phy.h>
+#include <asm/fsl_dtsec.h>
 
 #include "bcsr.h"
 

@@ -143,6 +148,39 @@ unsigned long get_board_ddr_clk(ulong dummy)
 
 int board_eth_init(bd_t *bis)
 {
+	u8 *bcsr = (u8 *)BCSR_ACCESS_REG_ADDR;
+	ccsr_gur_t *gur = (ccsr_gur_t *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+	struct fsl_pq_mdio_info dtsec_mdio_info;
+
+	/*
+	 * Need to set dTSEC 1 pin multiplexing to TSEC. The default setting
+	 * is not correct.
+	 */
+	setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_TSEC1_1);
+
+	dtsec_mdio_info.regs =
+		(struct tsec_mii_mng *)CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR;
+	dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
+
+	/* Register the 1G MDIO bus */
+	fsl_pq_mdio_init(bis, &dtsec_mdio_info);
+
+	fm_info_set_phy_address(FM1_DTSEC1, CONFIG_SYS_FM1_DTSEC1_PHY_ADDR);
+	fm_info_set_phy_address(FM1_DTSEC2, CONFIG_SYS_FM1_DTSEC2_PHY_ADDR);
+
+	fm_info_set_mdio(FM1_DTSEC1,
+		miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
+	fm_info_set_mdio(FM1_DTSEC2,
+		miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
+
+	/* Make SERDES connected to SGMII by cleaing bcsr19[7] */
+	if (fm_info_get_enet_if(FM1_DTSEC1) == PHY_INTERFACE_MODE_SGMII)
+		clrbits_8(&bcsr[19], BCSR19_SGMII_SEL_L);
+
+#ifdef CONFIG_FMAN_ENET
+	cpu_eth_init(bis);
+#endif
+
 	return pci_eth_init(bis);
 }
 

@@ -158,5 +196,7 @@ void ft_board_setup(void *blob, bd_t *bd)
 	size = getenv_bootm_size();
 
 	fdt_fixup_memory(blob, (u64)base, (u64)size);
+
+	fdt_fixup_fman_ethernet(blob);
 }
 #endif

index 24042df..9386674 100644
@@ -525,9 +525,9 @@ extern unsigned long get_clock_freq(void);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
+#define CONFIG_PHY_MARVELL
 #endif
 
-#define CONFIG_SYS_FMAN_FW
 #ifndef CONFIG_NAND
 /* Default address of microcode for the Linux Fman driver */
 /* QE microcode/firmware address */

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index 52269d3..6ed404f 100644
@@ -32,6 +32,7 @@
 #include <asm/fsl_serdes.h>
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
+#include <fm_eth.h>
 
 extern void pci_of_setup(void *blob, bd_t *bd);
 

@@ -200,4 +201,7 @@ void ft_board_setup(void *blob, bd_t *bd)
 #endif
 
 	fdt_fixup_liodn(blob);
+#ifdef CONFIG_SYS_DPAA_FMAN
+	fdt_fixup_fman_ethernet(blob);
+#endif
 }

index 03dbe55..37e98bb 100644
@@ -405,7 +405,6 @@
 #define CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_DPAA_PME
 /* Default address of microcode for the Linux Fman driver */
-#define CONFIG_SYS_FMAN_FW
 #if defined(CONFIG_SPIFLASH)
 /*
  * env is stored at 0x100000, sector size is 0x10000, ucode is stored after

@@ -429,6 +428,9 @@
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
+#define CONFIG_PHYLIB_10G
+#define CONFIG_PHY_VITESSE
+#define CONFIG_PHY_TERANETICS
 #endif
 
 #ifdef CONFIG_PCI

@@ -472,6 +474,8 @@
 #define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR	0x1e
 #define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR	0x1f
 
+#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR	0
+
 #define CONFIG_SYS_TBIPA_VALUE	8
 #define CONFIG_MII		/* MII PHY management */
 #define CONFIG_ETHPRIME		"FM1 at DTSEC1"

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new file mode 100644
index 0000000..19ef7c4
@@ -0,0 +1,26 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __FMAN_BOARD_HELPER__
+#define __FMAN_BOARD_HELPER__
+
+void fdt_set_phy_handle(void *fdt, char *compat, phys_addr_t addr,
+			const char *alias);
+
+#endif

index b1e7823..a03fdfd 100644
@@ -32,10 +32,12 @@
 #include <asm/fsl_serdes.h>
 #include <asm/fsl_portals.h>
 #include <asm/fsl_liodn.h>
+#include <fm_eth.h>
 
 extern void pci_of_setup(void *blob, bd_t *bd);
 
 #include "../common/ngpixis.h"
+#include "corenet_ds.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 

@@ -237,9 +239,9 @@ void ft_board_setup(void *blob, bd_t *bd)
 
 	fdt_fixup_liodn(blob);
 	fdt_fixup_dr_usb(blob, bd);
-}
 
-int board_eth_init(bd_t *bis)
-{
-	return pci_eth_init(bis);
+#ifdef CONFIG_SYS_DPAA_FMAN
+	fdt_fixup_fman_ethernet(blob);
+	fdt_fixup_board_enet(blob);
+#endif
 }

new file mode 100644
index 0000000..425c6aa
@@ -0,0 +1,25 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CORENET_DS_H__
+#define __CORENET_DS_H__
+
+void fdt_fixup_board_enet(void *blob);
+
+#endif

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index eb89b30..4f8c391 100644
@@ -474,7 +474,6 @@
 #define CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_DPAA_PME
 /* Default address of microcode for the Linux Fman driver */
-#define CONFIG_SYS_FMAN_FW
 #if defined(CONFIG_SPIFLASH)
 /*
  * env is stored@0x100000, sector size is 0x10000, ucode is stored after

@@ -498,6 +497,9 @@
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
+#define CONFIG_PHYLIB_10G
+#define CONFIG_PHY_VITESSE
+#define CONFIG_PHY_TERANETICS
 #endif
 
 #ifdef CONFIG_PCI