Fix wrong loop bound in flush_cache() when "size" is zero

The issue is found when calling flush_cache() with zero "size" argument.
The bound of loop is miscalculated in this case and flush_cache() enters a wrong flushing loop. To fix this issue I skipped the operations when "size" is found to be zero.

---
Changes for v2:
- Coding style cleanup
- Move code after declarations to avoid warning

 arch/mips/cpu/mips32/cpu.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

index 3ae397c..8fa53ba 100644
@@ -56,6 +56,11 @@ void flush_cache(ulong start_addr, ulong size)
 	unsigned long addr = start_addr & ~(lsize - 1);
 	unsigned long aend = (start_addr + size - 1) & ~(lsize - 1);
 
+	/* aend will be miscalculated when size is zero, so we return here */
+	if (size == 0) {
+		return;
+	}
+
 	while (1) {
 		cache_op(Hit_Writeback_Inv_D, addr);
 		cache_op(Hit_Invalidate_I, addr);

1.7.4.1

in the future, please prefix your patches. since this is mips-specific, your summary would read:
mips: fix wrong loop bound in flush_cache() when "size" is zero

or perhaps:
mips32: fix wrong loop bound in flush_cache() when "size" is zero -mike

Hello.