ARM: SAMSUNG: Modify the devname for pl330 clock

PATCH New Boojin Kim 3 participants 4 messages Aug 17, 2011

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Arm (32-bit) Arm sub-architectures Arm Samsung Exynos

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Boojin Kim

author

2011-08-17 00:26 UTC #0 lore raw

PATCH 1/1 ARM: SAMSUNG: Modify the devname for pl330 clock

This patch modified the devname for pl330 clock from 's3c-pl330' to 'dma-pl330' to support new pl330 driver on dmaengine.
NOTE: This patch sould be added after merging new pl330 driver on dmaengine.

Signed-off-by Boojin Kim <[email protected]>

---
 arch/arm/mach-exynos4/clock.c         |    4 ++--
 arch/arm/mach-s5p64x0/clock-s5p6440.c |    1 +
 arch/arm/mach-s5p64x0/clock-s5p6450.c |    1 +
 arch/arm/mach-s5pc100/clock.c         |    4 ++--
 arch/arm/mach-s5pv210/clock.c         |    4 ++--
 5 files changed, 8 insertions(+), 6 deletions(-)

arch/arm/mach-exynos4/clock.c +2 -2

index fee2dd8..04c997a 100644
@@ -460,12 +460,12 @@ static struct clk init_clocks_off[] = {
 		.ctrlbit	= (1 << 10),
 	}, {
 		.name		= "dma",
-		.devname	= "s3c-pl330.0",
+		.devname	= "dma-pl330.0",
 		.enable		= exynos4_clk_ip_fsys_ctrl,
 		.ctrlbit	= (1 << 0),
 	}, {
 		.name		= "dma",
-		.devname	= "s3c-pl330.1",
+		.devname	= "dma-pl330.1",
 		.enable		= exynos4_clk_ip_fsys_ctrl,
 		.ctrlbit	= (1 << 1),
 	}, {

arch/arm/mach-s5p64x0/clock-s5p6440.c +1 -0

index c1f548f..c54c65d 100644
@@ -147,6 +147,7 @@ static struct clk init_clocks_off[] = {
 		.ctrlbit	= (1 << 8),
 	}, {
 		.name		= "dma",
+		.devname	= "dma-pl330",
 		.parent		= &clk_hclk_low.clk,
 		.enable		= s5p64x0_hclk0_ctrl,
 		.ctrlbit	= (1 << 12),

arch/arm/mach-s5p64x0/clock-s5p6450.c +1 -0

index 3d9b609..2d04abf 100644
@@ -180,6 +180,7 @@ static struct clk init_clocks_off[] = {
 		.ctrlbit	= (1 << 3),
 	}, {
 		.name		= "dma",
+		.devname	= "dma-pl330",
 		.parent		= &clk_hclk_low.clk,
 		.enable		= s5p64x0_hclk0_ctrl,
 		.ctrlbit	= (1 << 12),

arch/arm/mach-s5pc100/clock.c +2 -2

index 6527c05..8d47709 100644
@@ -460,13 +460,13 @@ static struct clk init_clocks_off[] = {
 		.ctrlbit	= (1 << 2),
 	}, {
 		.name		= "dma",
-		.devname	= "s3c-pl330.1",
+		.devname	= "dma-pl330.1",
 		.parent		= &clk_div_d1_bus.clk,
 		.enable		= s5pc100_d1_0_ctrl,
 		.ctrlbit	= (1 << 1),
 	}, {
 		.name		= "dma",
-		.devname	= "s3c-pl330.0",
+		.devname	= "dma-pl330.0",
 		.parent		= &clk_div_d1_bus.clk,
 		.enable		= s5pc100_d1_0_ctrl,
 		.ctrlbit	= (1 << 0),

arch/arm/mach-s5pv210/clock.c +2 -2

index d35726a..239aaad 100644
@@ -295,13 +295,13 @@ static struct clk_ops clk_fout_apll_ops = {
 static struct clk init_clocks_off[] = {
 	{
 		.name		= "dma",
-		.devname	= "s3c-pl330.0",
+		.devname	= "dma-pl330.0",
 		.parent		= &clk_hclk_psys.clk,
 		.enable		= s5pv210_clk_ip0_ctrl,
 		.ctrlbit	= (1 << 3),
 	}, {
 		.name		= "dma",
-		.devname	= "s3c-pl330.1",
+		.devname	= "dma-pl330.1",
 		.parent		= &clk_hclk_psys.clk,
 		.enable		= s5pv210_clk_ip0_ctrl,
 		.ctrlbit	= (1 << 4),

Signature · 1 line

1.7.1

Vladimir Zapolskiy

2011-08-17 06:16 UTC #1 lore raw

PATCH 1/1 ARM: SAMSUNG: Modify the devname for pl330 clock

Hi,

looks like it contains my series as a subset.

--
With best wishes,
Vladimir

Quoted 96 lines · Boojin Kim

This patch modified the devname for pl330 clock from 's3c-pl330' to 'dma-pl330' to support new pl330 driver on dmaengine.
NOTE: This patch sould be added after merging new pl330 driver on dmaengine.

Signed-off-by Boojin Kim<[email protected]>

---
  arch/arm/mach-exynos4/clock.c         |    4 ++--
  arch/arm/mach-s5p64x0/clock-s5p6440.c |    1 +
  arch/arm/mach-s5p64x0/clock-s5p6450.c |    1 +
  arch/arm/mach-s5pc100/clock.c         |    4 ++--
  arch/arm/mach-s5pv210/clock.c         |    4 ++--
  5 files changed, 8 insertions(+), 6 deletions(-)

arch/arm/mach-exynos4/clock.c +2 -2

index fee2dd8..04c997a 100644
@@ -460,12 +460,12 @@ static struct clk init_clocks_off[] = {
  		.ctrlbit	= (1<<  10),
  	}, {
  		.name		= "dma",
-		.devname	= "s3c-pl330.0",
+		.devname	= "dma-pl330.0",
  		.enable		= exynos4_clk_ip_fsys_ctrl,
  		.ctrlbit	= (1<<  0),
  	}, {
  		.name		= "dma",
-		.devname	= "s3c-pl330.1",
+		.devname	= "dma-pl330.1",
  		.enable		= exynos4_clk_ip_fsys_ctrl,
  		.ctrlbit	= (1<<  1),
  	}, {

arch/arm/mach-s5p64x0/clock-s5p6440.c +1 -0

index c1f548f..c54c65d 100644
@@ -147,6 +147,7 @@ static struct clk init_clocks_off[] = {
  		.ctrlbit	= (1<<  8),
  	}, {
  		.name		= "dma",
+		.devname	= "dma-pl330",
  		.parent		=&clk_hclk_low.clk,
  		.enable		= s5p64x0_hclk0_ctrl,
  		.ctrlbit	= (1<<  12),

arch/arm/mach-s5p64x0/clock-s5p6450.c +1 -0

index 3d9b609..2d04abf 100644
@@ -180,6 +180,7 @@ static struct clk init_clocks_off[] = {
  		.ctrlbit	= (1<<  3),
  	}, {
  		.name		= "dma",
+		.devname	= "dma-pl330",
  		.parent		=&clk_hclk_low.clk,
  		.enable		= s5p64x0_hclk0_ctrl,
  		.ctrlbit	= (1<<  12),

arch/arm/mach-s5pc100/clock.c +2 -2

index 6527c05..8d47709 100644
@@ -460,13 +460,13 @@ static struct clk init_clocks_off[] = {
  		.ctrlbit	= (1<<  2),
  	}, {
  		.name		= "dma",
-		.devname	= "s3c-pl330.1",
+		.devname	= "dma-pl330.1",
  		.parent		=&clk_div_d1_bus.clk,
  		.enable		= s5pc100_d1_0_ctrl,
  		.ctrlbit	= (1<<  1),
  	}, {
  		.name		= "dma",
-		.devname	= "s3c-pl330.0",
+		.devname	= "dma-pl330.0",
  		.parent		=&clk_div_d1_bus.clk,
  		.enable		= s5pc100_d1_0_ctrl,
  		.ctrlbit	= (1<<  0),

arch/arm/mach-s5pv210/clock.c +2 -2

index d35726a..239aaad 100644
@@ -295,13 +295,13 @@ static struct clk_ops clk_fout_apll_ops = {
  static struct clk init_clocks_off[] = {
  	{
  		.name		= "dma",
-		.devname	= "s3c-pl330.0",
+		.devname	= "dma-pl330.0",
  		.parent		=&clk_hclk_psys.clk,
  		.enable		= s5pv210_clk_ip0_ctrl,
  		.ctrlbit	= (1<<  3),
  	}, {
  		.name		= "dma",
-		.devname	= "s3c-pl330.1",
+		.devname	= "dma-pl330.1",
  		.parent		=&clk_hclk_psys.clk,
  		.enable		= s5pv210_clk_ip0_ctrl,
  		.ctrlbit	= (1<<  4),

Boojin Kim

author

2011-08-17 08:46 UTC #2 lore raw

PATCH 1/1 ARM: SAMSUNG: Modify the devname for pl330 clock

Quoted 3 lines · Vladimir Zapolskiy

Hi,
looks like it contains my series as a subset.

As I replied on your patches, yes, I know that. I sent it before see your patch.
Do you add the missing about s5p64x0 in your patch?
If not, I will split up this patch to get missing about s5p64x0 in your patch.

Thanks
Boojin Kim.

Quoted 109 lines

--
With best wishes,
Vladimir
Quoted 1 line · Boojin Kim
This patch modified the devname for pl330 clock from 's3c-pl330' to
'dma-pl330'
Quoted 2 lines
to support new pl330 driver on dmaengine.
NOTE: This patch sould be added after merging new pl330 driver on
dmaengine.
arch/arm/mach-
Quoted 11 lines
Signed-off-by Boojin Kim<[email protected]>
---
  arch/arm/mach-exynos4/clock.c         |    4 ++--
  arch/arm/mach-s5p64x0/clock-s5p6440.c |    1 +
  arch/arm/mach-s5p64x0/clock-s5p6450.c |    1 +
  arch/arm/mach-s5pc100/clock.c         |    4 ++--
  arch/arm/mach-s5pv210/clock.c         |    4 ++--
  5 files changed, 8 insertions(+), 6 deletions(-)
arch/arm/mach- renamed from arch/arm/mach-exynos4/clock.c +0 -0
exynos4/clock.c
arch/arm/mach-
Quoted 19 lines
index fee2dd8..04c997a 100644
arch/arm/mach-exynos4/clock.c +2 -2
@@ -460,12 +460,12 @@ static struct clk init_clocks_off[] = {
  		.ctrlbit	= (1<<  10),
  	}, {
  		.name		= "dma",
-		.devname	= "s3c-pl330.0",
+		.devname	= "dma-pl330.0",
  		.enable		= exynos4_clk_ip_fsys_ctrl,
  		.ctrlbit	= (1<<  0),
  	}, {
  		.name		= "dma",
-		.devname	= "s3c-pl330.1",
+		.devname	= "dma-pl330.1",
  		.enable		= exynos4_clk_ip_fsys_ctrl,
  		.ctrlbit	= (1<<  1),
  	}, {
arch/arm/mach- renamed from arch/arm/mach-s5p64x0/clock-s5p6440.c +0 -0
s5p64x0/clock-s5p6440.c
arch/arm/mach-
Quoted 12 lines
index c1f548f..c54c65d 100644
arch/arm/mach-s5p64x0/clock-s5p6440.c +1 -0
@@ -147,6 +147,7 @@ static struct clk init_clocks_off[] = {
  		.ctrlbit	= (1<<  8),
  	}, {
  		.name		= "dma",
+		.devname	= "dma-pl330",
  		.parent		=&clk_hclk_low.clk,
  		.enable		= s5p64x0_hclk0_ctrl,
  		.ctrlbit	= (1<<  12),
arch/arm/mach- renamed from arch/arm/mach-s5p64x0/clock-s5p6450.c +0 -0
s5p64x0/clock-s5p6450.c
arch/arm/mach-
Quoted 12 lines
index 3d9b609..2d04abf 100644
arch/arm/mach-s5p64x0/clock-s5p6450.c +1 -0
@@ -180,6 +180,7 @@ static struct clk init_clocks_off[] = {
  		.ctrlbit	= (1<<  3),
  	}, {
  		.name		= "dma",
+		.devname	= "dma-pl330",
  		.parent		=&clk_hclk_low.clk,
  		.enable		= s5p64x0_hclk0_ctrl,
  		.ctrlbit	= (1<<  12),
arch/arm/mach- renamed from arch/arm/mach-s5pc100/clock.c +0 -0
s5pc100/clock.c
arch/arm/mach-
Quoted 20 lines
index 6527c05..8d47709 100644
arch/arm/mach-s5pc100/clock.c +2 -2
@@ -460,13 +460,13 @@ static struct clk init_clocks_off[] = {
  		.ctrlbit	= (1<<  2),
  	}, {
  		.name		= "dma",
-		.devname	= "s3c-pl330.1",
+		.devname	= "dma-pl330.1",
  		.parent		=&clk_div_d1_bus.clk,
  		.enable		= s5pc100_d1_0_ctrl,
  		.ctrlbit	= (1<<  1),
  	}, {
  		.name		= "dma",
-		.devname	= "s3c-pl330.0",
+		.devname	= "dma-pl330.0",
  		.parent		=&clk_div_d1_bus.clk,
  		.enable		= s5pc100_d1_0_ctrl,
  		.ctrlbit	= (1<<  0),
arch/arm/mach- renamed from arch/arm/mach-s5pv210/clock.c +0 -0
s5pv210/clock.c
Quoted 19 lines
index d35726a..239aaad 100644
arch/arm/mach-s5pv210/clock.c +2 -2
@@ -295,13 +295,13 @@ static struct clk_ops clk_fout_apll_ops = {
  static struct clk init_clocks_off[] = {
  	{
  		.name		= "dma",
-		.devname	= "s3c-pl330.0",
+		.devname	= "dma-pl330.0",
  		.parent		=&clk_hclk_psys.clk,
  		.enable		= s5pv210_clk_ip0_ctrl,
  		.ctrlbit	= (1<<  3),
  	}, {
  		.name		= "dma",
-		.devname	= "s3c-pl330.1",
+		.devname	= "dma-pl330.1",
  		.parent		=&clk_hclk_psys.clk,
  		.enable		= s5pv210_clk_ip0_ctrl,
  		.ctrlbit	= (1<<  4),

Vladimir Zapolskiy

2011-08-17 10:25 UTC #3 lore raw

PATCH 1/1 ARM: SAMSUNG: Modify the devname for pl330 clock

Hi,

Quoted 10 lines · Boojin Kim

Quoted 3 lines · Vladimir Zapolskiy
Hi,
looks like it contains my series as a subset.
As I replied on your patches, yes, I know that. I sent it before see your patch.
Do you add the missing about s5p64x0 in your patch?
If not, I will split up this patch to get missing about s5p64x0 in your patch.

No, I haven't added that. In my opinion it would be nice, if you can split the patch and fix more incorrespondent device names for s5p64x0, or probably it might be done at once replacing my version of the change for s5p64x0 only.

Thank you a lot!

--
With best wishes,
Vladimir