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mmc: sdhci-s3c: Fix mmc card I/O problem

PATCH New Girish K S 3 participants 3 messages Aug 26, 2011 – Aug 28, 2011

Subsystems (4)
Arm Samsung Exynos MMC, SD and SDIO Secure digital host controller interface (SDHCI) driver Secure digital host controller interface (SDHCI) Samsung driver
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Girish K S

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#0 lore raw

PATCH 1/1 mmc: sdhci-s3c: Fix mmc card I/O problem

This patch fixes the problem in sdhci-s3c host driver for Samsung Soc's. During the card identification stage the mmc core driver enumerates for the best bus width in combination with the highest available data rate. It starts enumerating from the highest bus width (8) to lowest bus width (1).

In case of few MMC cards the 4-bit bus enumeration fails and tries the 1-bit bus enumeration. When switched to 1-bit bus mode the host driver has to clear the previous bus width setting and apply the new setting.

The current patch will clear the previous bus mode and apply the new mode setting.

Signed-off-by Girish K S <[email protected]>
---
 drivers/mmc/host/sdhci-s3c.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)
drivers/mmc/host/sdhci-s3c.c +2 -0
index 2bd7bf4..fe886d6 100644
@@ -302,6 +302,8 @@ static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width)
 		ctrl &= ~SDHCI_CTRL_8BITBUS;
 		break;
 	default:
+		ctrl &= ~SDHCI_CTRL_4BITBUS;
+		ctrl &= ~SDHCI_CTRL_8BITBUS;
 		break;
 	}
Signature · 1 line
1.7.1
maintainer
#1 lore raw

PATCH 1/1 mmc: sdhci-s3c: Fix mmc card I/O problem

This patch looks fine to me.

Acked-by Jaehoon Chung <[email protected]>
Quoted 31 lines · Girish K S

This patch fixes the problem in sdhci-s3c host driver for Samsung Soc's. During the card identification stage the mmc core driver enumerates for the best bus width in combination with the highest available data rate. It starts enumerating from the highest bus width (8) to lowest bus width (1).

In case of few MMC cards the 4-bit bus enumeration fails and tries the 1-bit bus enumeration. When switched to 1-bit bus mode the host driver has to clear the previous bus width setting and apply the new setting.

The current patch will clear the previous bus mode and apply the new mode setting.

Signed-off-by Girish K S <[email protected]>
---
 drivers/mmc/host/sdhci-s3c.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)
drivers/mmc/host/sdhci-s3c.c +2 -0
index 2bd7bf4..fe886d6 100644
@@ -302,6 +302,8 @@ static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width)
 		ctrl &= ~SDHCI_CTRL_8BITBUS;
 		break;
 	default:
+		ctrl &= ~SDHCI_CTRL_4BITBUS;
+		ctrl &= ~SDHCI_CTRL_8BITBUS;
 		break;
 	}
#2 lore raw

PATCH 1/1 mmc: sdhci-s3c: Fix mmc card I/O problem

In reply to Girish K S

Hi,

Quoted 6 lines · Girish K S

This patch fixes the problem in sdhci-s3c host driver for Samsung Soc's. During the card identification stage the mmc core driver enumerates for the best bus width in combination with the highest available data rate. It starts enumerating from the highest bus width (8) to lowest bus width (1).

Quoted 8 lines

In case of few MMC cards the 4-bit bus enumeration fails and tries the 1-bit bus enumeration. When switched to 1-bit bus mode the host driver has to clear the previous bus width setting and apply the new setting.

The current patch will clear the previous bus mode and apply the new mode setting.

Signed-off-by Girish K S <[email protected]>

Thanks, pushed to mmc-next for 3.1 with a stable@ tag.

- Chris.

Signature · 2 lines
Chris Ball   <[email protected]>   <http://printf.net/>
One Laptop Per Child