Add device tree support for PL330 dma controller driver
Subsystems (5)
v2 cover Add device tree support for PL330 dma controller driver
This patchset adds device tree support for PL330 driver and uses it to add device tree support for Samsung platforms, specifically Exynos4.
First patch moves the pl330_filter function from Samsung specific wrappers to pl330 dma driver and also adds a check to ensure that the filter function proceeds only if it the dma channel being investigated belongs to pl330 dma controller instance.
Second patch adds support to infer the direction of the dma transfer using the direction specified with the transfer request instead of including this information in the platform data. This simlifies the addition of device tree support. Third patch simplifies the platform data for Exynos4 pl330 dma controllers. Similar patches simplifying the platform data for other Samsung platforms is under development.
Fourth patch adds device tree support for pl330 dma controller driver. A dma channel is represented using a phandle of the dma controller node and the channel id within that controller. Client driver request a dma channel using the phandle and channel id pair. Correspondingly, the pl330 filter function has been modified to lookup a channel based on this value.
Fifth patch adds device tree support for Samsung's DMA engine wrappers. Client drivers retrive the channel property from their device node and pass it to the wrappers. The wrapper functions use the property value as the filter function parameter. Sixth patch restricts the usage of pl330 device and platform data instances to non-dt platforms.
This patchset is based on Linux 3.1-rc3 with the following patch sets.
* To use DMA generic APIs for Samsung DMA - v7 - (15 patches)
* ARM: Samsung: use dma-pl330 device name for clock (3 patches)
* ARM: S5P64X0: Add the devname for DMA clock.
* ARM: SAMSUNG: register the second instance of PL330 DMAC (3 patches)
Changes since v1:
- Removed "arm,pl330-pdma" and "arm,pl330-mdma" compatible values.
- Removed "arm,primecell-periphid" and "arm,pl330-peri-reqs" property requirements.
Thomas Abraham (6):
DMA: PL330: move filter function into driver
DMA: PL330: Infer transfer direction from transfer request instead of platform data
ARM: EXYNOS4: Modify platform data for pl330 driver
DMA: PL330: Add device tree support
ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers
ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build
.../devicetree/bindings/dma/arm-pl330.txt | 29 +++ arch/arm/mach-exynos4/Kconfig | 7 + arch/arm/mach-exynos4/Makefile | 3 +- arch/arm/mach-exynos4/dma.c | 223 ++++++-------------- arch/arm/plat-samsung/dma-ops.c | 15 +- arch/arm/plat-samsung/include/plat/dma-ops.h | 1 + arch/arm/plat-samsung/include/plat/dma-pl330.h | 3 +- drivers/dma/pl330.c | 101 +++++---- include/linux/amba/pl330.h | 15 +- 9 files changed, 170 insertions(+), 227 deletions(-) create mode 100644 Documentation/devicetree/bindings/dma/arm-pl330.txt
PATCH v2 1/6 DMA: PL330: move filter function into driver
The dma channel selection filter function is moved from plat-samsung into the pl330 driver. In additon to that, a check is added in the filter function to ensure that the channel on which the filter has been invoked is pl330 channel instance (and avoid any incorrect access of chan->private in a system with multiple types of DMA drivers).
--- arch/arm/plat-samsung/dma-ops.c | 6 ------ drivers/dma/pl330.c | 15 +++++++++++++++ include/linux/amba/pl330.h | 2 ++ 3 files changed, 17 insertions(+), 6 deletions(-)
arch/arm/plat-samsung/dma-ops.c +0 -6
@@ -17,12 +17,6 @@#include <mach/dma.h> -static inline bool pl330_filter (struct dma_chan *chan,void *param) -{ -struct dma_pl330_peri *peri = chan->private; -return peri->peri_id == (unsigned )param; -} -static unsigned samsung_dmadev_request (enum dma_ch dma_ch,struct samsung_dma_info *info) {
drivers/dma/pl330.c +15 -0
@@ -116,6 +116,9 @@ struct dma_pl330_desc {struct dma_pl330_chan *pchan; }; +/* forward declaration */ +static struct amba_driver pl330_driver; +static inline struct dma_pl330_chan *to_pchan (struct dma_chan *ch) {
@@ -267,6 +270,18 @@ static void dma_pl330_rqcb(void *token, enum pl330_op_err err)tasklet_schedule (&pch->task); } +bool pl330_filter (struct dma_chan *chan,void *param) +{ +struct dma_pl330_peri *peri; + +if (chan->device->dev->driver != &pl330_driver.drv) +return false; + + peri = chan->private; +return peri->peri_id == (unsigned )param; +} +EXPORT_SYMBOL (pl330_filter); +static int pl330_alloc_chan_resources (struct dma_chan *chan) {struct dma_pl330_chan *pch =to_pchan (chan);
include/linux/amba/pl330.h +2 -0
@@ -12,6 +12,7 @@#ifndef __AMBA_PL330_H_#define __AMBA_PL330_H_ +#include <linux/dmaengine.h> #include <asm/hardware/pl330.h> struct dma_pl330_peri {
@@ -38,4 +39,5 @@ struct dma_pl330_platdata { unsigned mcbuf_sz; }; +extern bool pl330_filter (struct dma_chan *chan,void *param);#endif /* __AMBA_PL330_H_ */
Signature · 1 line
1.6.6.rc2
PATCH v2 2/6 DMA: PL330: Infer transfer direction from transfer request instead of platform data
The transfer direction for a channel can be inferred from the transfer request and the need for specifying transfer direction in platfrom data can be eliminated. So the structure definition 'struct dma_pl330_peri' is no longer required.
The channel's private data is set to point to a channel id specified in the platform data (instead of an instance of type 'struct dma_pl330_peri'). The filter function is correspondingly modified to match the channel id.
With the 'struct dma_pl330_peri' removed from platform data, the dma controller transfer capabilities cannot be inferred any more. Hence, the dma controller capabilities is specified using platform data.
--- drivers/dma/pl330.c | 65 +++++++++++--------------------------------- include/linux/amba/pl330.h | 13 ++------- 2 files changed, 19 insertions(+), 59 deletions(-)
drivers/dma/pl330.c +16 -49
@@ -272,13 +272,13 @@ static void dma_pl330_rqcb(void *token, enum pl330_op_err err)bool pl330_filter (struct dma_chan *chan,void *param) { -struct dma_pl330_peri *peri; +u8 *peri_id;if (chan->device->dev->driver != &pl330_driver.drv)return false; - peri = chan->private; -return peri->peri_id == (unsigned )param; + peri_id = chan->private; +return *peri_id == (unsigned )param; }EXPORT_SYMBOL (pl330_filter);
@@ -514,7 +514,7 @@ pluck_desc(struct dma_pl330_dmac *pdmac)static struct dma_pl330_desc *pl330_get_desc (struct dma_pl330_chan *pch) {struct dma_pl330_dmac *pdmac = pch->dmac; -struct dma_pl330_peri *peri = pch->chan.private; +u8 *peri_id = pch->chan.private;struct dma_pl330_desc *desc;/* Pluck one desc from the pool of DMAC */
@@ -539,13 +539,7 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) desc->txd.cookie =0 ;async_tx_ack (&desc->txd); -if (peri) { - desc->req.rqtype = peri->rqtype; - desc->req.peri = pch->chan.chan_id; - }else { - desc->req.rqtype =MEMTOMEM ; - desc->req.peri =0 ; - } + desc->req.peri = peri_id ? pch->chan.chan_id :0 ;dma_async_tx_descriptor_init (&desc->txd, &pch->chan);
@@ -632,12 +626,14 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic(case DMA_TO_DEVICE : desc->rqcfg.src_inc =1 ; desc->rqcfg.dst_inc =0 ; + desc->req.rqtype =MEMTODEV ; src = dma_addr; dst = pch->fifo_addr;break ;case DMA_FROM_DEVICE : desc->rqcfg.src_inc =0 ; desc->rqcfg.dst_inc =1 ; + desc->req.rqtype =DEVTOMEM ; src = pch->fifo_addr; dst = dma_addr;break ;
@@ -663,16 +659,12 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst, {struct dma_pl330_desc *desc;struct dma_pl330_chan *pch =to_pchan (chan); -struct dma_pl330_peri *peri = chan->private;struct pl330_info *pi;int burst;if (unlikely (!pch || !len))return NULL ; -if (peri && peri->rqtype !=MEMTOMEM ) -return NULL ; - pi = &pch->dmac->pif; desc =__pl330_prep_dma_memcpy (pch, dst, src, len);
@@ -681,6 +673,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst, desc->rqcfg.src_inc =1 ; desc->rqcfg.dst_inc =1 ; + desc->req.rqtype =MEMTOMEM ;/* Select max possible burst size */ burst = pi->pcfg.data_bus_width /8 ;
@@ -709,24 +702,13 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, {struct dma_pl330_desc *first, *desc =NULL ;struct dma_pl330_chan *pch =to_pchan (chan); -struct dma_pl330_peri *peri = chan->private;struct scatterlist *sg;unsigned long flags;int i;dma_addr_t addr; -if (unlikely (!pch || !sgl || !sg_len || !peri)) -return NULL ; - -/* Make sure the direction is consistent */ -if ((direction ==DMA_TO_DEVICE && - peri->rqtype !=MEMTODEV ) || - (direction ==DMA_FROM_DEVICE && - peri->rqtype !=DEVTOMEM )) { -dev_err (pch->dmac->pif.dev,"%s:%d Invalid Direction\n" , - __func__, __LINE__); +if (unlikely (!pch || !sgl || !sg_len))return NULL ; - } addr = pch->fifo_addr;
@@ -767,11 +749,13 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,if (direction ==DMA_TO_DEVICE ) { desc->rqcfg.src_inc =1 ; desc->rqcfg.dst_inc =0 ; + desc->req.rqtype =MEMTODEV ;fill_px (&desc->px, addr,sg_dma_address (sg),sg_dma_len (sg)); }else { desc->rqcfg.src_inc =0 ; desc->rqcfg.dst_inc =1 ; + desc->req.rqtype =DEVTOMEM ;fill_px (&desc->px,sg_dma_address (sg), addr,sg_dma_len (sg)); }
@@ -878,28 +862,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)for (i =0 ; i < num_chan; i++) { pch = &pdmac->peripherals[i]; -if (pdat) { -struct dma_pl330_peri *peri = &pdat->peri[i]; - -switch (peri->rqtype) { -case MEMTOMEM : -dma_cap_set (DMA_MEMCPY , pd->cap_mask); -break ; -case MEMTODEV : -case DEVTOMEM : -dma_cap_set (DMA_SLAVE , pd->cap_mask); -dma_cap_set (DMA_CYCLIC , pd->cap_mask); -break ; -default : -dev_err (&adev->dev,"DEVTODEV Not Supported\n" ); -continue ; - } - pch->chan.private = peri; - }else { -dma_cap_set (DMA_MEMCPY , pd->cap_mask); - pch->chan.private =NULL ; - } - + pch->chan.private = pdat ? &pdat->peri_id[i] :NULL ;INIT_LIST_HEAD (&pch->work_list);spin_lock_init (&pch->lock); pch->pl330_chid =NULL ;
@@ -913,6 +876,10 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) } pd->dev = &adev->dev; +if (pdat) + pd->cap_mask = pdat->cap_mask; +else +dma_cap_set (DMA_MEMCPY , pd->cap_mask); pd->device_alloc_chan_resources = pl330_alloc_chan_resources; pd->device_free_chan_resources = pl330_free_chan_resources;
include/linux/amba/pl330.h +3 -10
@@ -15,15 +15,6 @@#include <linux/dmaengine.h> #include <asm/hardware/pl330.h> -struct dma_pl330_peri { -/* -* Peri_Req i/f of the DMAC that is -* peripheral could be reached from. -*/ -u8 peri_id;/* specific dma id */ -enum pl330_reqtype rqtype; -}; -struct dma_pl330_platdata {/* * Number of valid peripherals connected to DMAC.
@@ -34,7 +25,9 @@ struct dma_pl330_platdata {*/ u8 nr_valid_peri;/* Array of valid peripherals */ -struct dma_pl330_peri *peri; +u8 *peri_id; +/* Operational capabilities */ +dma_cap_mask_t cap_mask;/* Bytes to allocate for MC buffer */ unsigned mcbuf_sz; };
Signature · 1 line
1.6.6.rc2
PATCH v2 3/6 ARM: EXYNOS4: Modify platform data for pl330 driver
With the 'struct dma_pl330_peri' removed, the platfrom data for dma driver can be simplified to a simple list of peripheral request ids.
--- arch/arm/mach-exynos4/dma.c | 223 ++++++++++++------------------------------- 1 files changed, 62 insertions(+), 161 deletions(-)
arch/arm/mach-exynos4/dma.c +62 -161
@@ -35,95 +35,40 @@static u64 dma_dmamask =DMA_BIT_MASK (32 ); -struct dma_pl330_peri pdma0_peri[28 ] = { - { - .peri_id = (u8 )DMACH_PCM0_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_PCM0_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_PCM2_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_PCM2_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_MSM_REQ0 , - }, { - .peri_id = (u8 )DMACH_MSM_REQ2 , - }, { - .peri_id = (u8 )DMACH_SPI0_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_SPI0_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_SPI2_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_SPI2_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_I2S0S_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_I2S0_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_I2S0_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_UART0_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_UART0_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_UART2_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_UART2_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_UART4_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_UART4_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_SLIMBUS0_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_SLIMBUS0_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_SLIMBUS2_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_SLIMBUS2_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_SLIMBUS4_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_SLIMBUS4_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_AC97_MICIN , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_AC97_PCMIN , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_AC97_PCMOUT , - .rqtype =MEMTODEV , - }, +u8 pdma0_peri[] = { +DMACH_PCM0_RX , +DMACH_PCM0_TX , +DMACH_PCM2_RX , +DMACH_PCM2_TX , +DMACH_MSM_REQ0 , +DMACH_MSM_REQ2 , +DMACH_SPI0_RX , +DMACH_SPI0_TX , +DMACH_SPI2_RX , +DMACH_SPI2_TX , +DMACH_I2S0S_TX , +DMACH_I2S0_RX , +DMACH_I2S0_TX , +DMACH_UART0_RX , +DMACH_UART0_TX , +DMACH_UART2_RX , +DMACH_UART2_TX , +DMACH_UART4_RX , +DMACH_UART4_TX , +DMACH_SLIMBUS0_RX , +DMACH_SLIMBUS0_TX , +DMACH_SLIMBUS2_RX , +DMACH_SLIMBUS2_TX , +DMACH_SLIMBUS4_RX , +DMACH_SLIMBUS4_TX , +DMACH_AC97_MICIN , +DMACH_AC97_PCMIN , +DMACH_AC97_PCMOUT , };struct dma_pl330_platdata exynos4_pdma0_pdata = { .nr_valid_peri =ARRAY_SIZE (pdma0_peri), - .peri = pdma0_peri, + .peri_id = pdma0_peri, };struct amba_device exynos4_device_pdma0 = {
@@ -142,86 +87,37 @@ struct amba_device exynos4_device_pdma0 = { .periphid = 0x00041330, }; -struct dma_pl330_peri pdma1_peri[25 ] = { - { - .peri_id = (u8 )DMACH_PCM0_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_PCM0_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_PCM1_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_PCM1_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_MSM_REQ1 , - }, { - .peri_id = (u8 )DMACH_MSM_REQ3 , - }, { - .peri_id = (u8 )DMACH_SPI1_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_SPI1_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_I2S0S_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_I2S0_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_I2S0_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_I2S1_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_I2S1_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_UART0_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_UART0_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_UART1_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_UART1_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_UART3_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_UART3_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_SLIMBUS1_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_SLIMBUS1_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_SLIMBUS3_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_SLIMBUS3_TX , - .rqtype =MEMTODEV , - }, { - .peri_id = (u8 )DMACH_SLIMBUS5_RX , - .rqtype =DEVTOMEM , - }, { - .peri_id = (u8 )DMACH_SLIMBUS5_TX , - .rqtype =MEMTODEV , - }, +u8 pdma1_peri[] = { +DMACH_PCM0_RX , +DMACH_PCM0_TX , +DMACH_PCM1_RX , +DMACH_PCM1_TX , +DMACH_MSM_REQ1 , +DMACH_MSM_REQ3 , +DMACH_SPI1_RX , +DMACH_SPI1_TX , +DMACH_I2S0S_TX , +DMACH_I2S0_RX , +DMACH_I2S0_TX , +DMACH_I2S1_RX , +DMACH_I2S1_TX , +DMACH_UART0_RX , +DMACH_UART0_TX , +DMACH_UART1_RX , +DMACH_UART1_TX , +DMACH_UART3_RX , +DMACH_UART3_TX , +DMACH_SLIMBUS1_RX , +DMACH_SLIMBUS1_TX , +DMACH_SLIMBUS3_RX , +DMACH_SLIMBUS3_TX , +DMACH_SLIMBUS5_RX , +DMACH_SLIMBUS5_TX , };struct dma_pl330_platdata exynos4_pdma1_pdata = { .nr_valid_peri =ARRAY_SIZE (pdma1_peri), - .peri = pdma1_peri, + .peri_id = pdma1_peri, };struct amba_device exynos4_device_pdma1 = {
@@ -242,7 +138,12 @@ struct amba_device exynos4_device_pdma1 = {static int __init exynos4_dma_init (void ) { +dma_cap_set (DMA_SLAVE , exynos4_pdma0_pdata.cap_mask); +dma_cap_set (DMA_CYCLIC , exynos4_pdma0_pdata.cap_mask);amba_device_register (&exynos4_device_pdma0, &iomem_resource); + +dma_cap_set (DMA_SLAVE , exynos4_pdma1_pdata.cap_mask); +dma_cap_set (DMA_CYCLIC , exynos4_pdma1_pdata.cap_mask);amba_device_register (&exynos4_device_pdma1, &iomem_resource);return 0 ;
Signature · 1 line
1.6.6.rc2
PATCH v2 4/6 DMA: PL330: Add device tree support
For PL330 dma controllers instantiated from device tree, the channel lookup is based on phandle of the dma controller and dma request id specified by the client node. During probe, the private data of each channel of the controller is set to point to the device node of the dma controller. The 'chan_id' of the each channel is used as the dma request id.
Client driver requesting dma channels specify the phandle of the dma controller and the request id. The pl330 filter function converts the phandle to the device node pointer and matches that with channel's private data. If a match is found, the request id from the client node and the 'chan_id' of the channel is matched. A channel is found if both the values match.
--- .../devicetree/bindings/dma/arm-pl330.txt | 29 ++++++++++++++++ drivers/dma/pl330.c | 35 +++++++++++++++++--- 2 files changed, 59 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/dma/arm-pl330.txt
Documentation/devicetree/bindings/dma/arm-pl330.txt new file +29 -0
@@ -0,0 +1,29 @@ +* ARM PrimeCell PL330 DMA Controller + +The ARM PrimeCell PL330 DMA controller can move blocks of memory contents +between memory and peripherals or memory to memory. + +Required properties: + - compatible: should include both "arm,pl330" and "arm,primecell". + - reg: physical base address of the controller and length of memory mapped + region. + - interrupts: interrupt number to the cpu. + +Example: (from Samsung's Exynos4 processor dtsi file) + + pdma0: pdma at 12680000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x12680000 0x1000>; + interrupts = <99>; + }; + +Client drivers (device nodes requiring dma transfers from dev-to-mem or +mem-to-dev) should specify the DMA channel numbers using a two-value pair +as shown below. + + [property name] = <[phandle of the dma controller] [dma request id]>; + + where 'dma request id' is the dma request number which is connected + to the client controller. + + Example: tx-dma-channel = <&pdma0 12>;
drivers/dma/pl330.c +30 -5
@@ -19,6 +19,7 @@#include <linux/amba/pl330.h> #include <linux/pm_runtime.h> #include <linux/scatterlist.h> +#include <linux/of.h> #define NR_DEFAULT_DESC 16
@@ -277,6 +278,20 @@ bool pl330_filter(struct dma_chan *chan, void *param)if (chan->device->dev->driver != &pl330_driver.drv)return false; +#ifdef CONFIG_OF +if (chan->device->dev->of_node) { +const __be32 *prop_value; +phandle phandle; +struct device_node *node; + + prop_value = ((struct property *)param)->value; + phandle =be32_to_cpup (prop_value++); + node =of_find_node_by_phandle (phandle); +return ((chan->private == node) && + (chan->chan_id ==be32_to_cpup (prop_value))); + } +#endif + peri_id = chan->private;return *peri_id == (unsigned )param; }
@@ -857,12 +872,17 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)INIT_LIST_HEAD (&pd->channels);/* Initialize channel parameters */ - num_chan =max (pdat ? pdat->nr_valid_peri :0 , (u8 )pi->pcfg.num_chan); + num_chan =max (pdat ? pdat->nr_valid_peri : (u8 )pi->pcfg.num_peri, + (u8 )pi->pcfg.num_chan); pdmac->peripherals =kzalloc (num_chan *sizeof (*pch),GFP_KERNEL );for (i =0 ; i < num_chan; i++) { pch = &pdmac->peripherals[i]; - pch->chan.private = pdat ? &pdat->peri_id[i] :NULL ; +if (!adev->dev.of_node) + pch->chan.private = pdat ? &pdat->peri_id[i] :NULL ; +else + pch->chan.private = adev->dev.of_node; +INIT_LIST_HEAD (&pch->work_list);spin_lock_init (&pch->lock); pch->pl330_chid =NULL ;
@@ -876,11 +896,16 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) } pd->dev = &adev->dev; -if (pdat) +if (pdat) { pd->cap_mask = pdat->cap_mask; -else + }else {dma_cap_set (DMA_MEMCPY , pd->cap_mask); - +if (pi->pcfg.num_peri) { +dma_cap_set (DMA_SLAVE , pd->cap_mask); +dma_cap_set (DMA_CYCLIC , pd->cap_mask); + } + } + pd->device_alloc_chan_resources = pl330_alloc_chan_resources; pd->device_free_chan_resources = pl330_free_chan_resources; pd->device_prep_dma_memcpy = pl330_prep_dma_memcpy;
Signature · 1 line
1.6.6.rc2
PATCH v2 5/6 ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers
A new dma request id 'DMACH_DT_PROP' is introduced for client drivers requesting a dma channel. This request indicates that a device tree node property represting the dma channel is available in 'struct samsung_dma_info'. The dma channel request wrapper uses the node property value as the value for the filter parameter.
--- arch/arm/plat-samsung/dma-ops.c | 9 ++++++++- arch/arm/plat-samsung/include/plat/dma-ops.h | 1 + arch/arm/plat-samsung/include/plat/dma-pl330.h | 3 ++- 3 files changed, 11 insertions(+), 2 deletions(-)
arch/arm/plat-samsung/dma-ops.c +8 -1
@@ -23,11 +23,18 @@ static unsigned samsung_dmadev_request(enum dma_ch dma_ch,struct dma_chan *chan;dma_cap_mask_t mask;struct dma_slave_config slave_config; +void *filter_param;dma_cap_zero (mask);dma_cap_set (info->cap, mask); - chan =dma_request_channel (mask, pl330_filter, (void *)dma_ch); +/* +* If a dma channel property of a device node from device tree is +* specified, use that as the fliter parameter. +*/ + filter_param = (dma_ch ==DMACH_DT_PROP ) ? (void *)info->dt_dmach_prop : + (void *)dma_ch; + chan =dma_request_channel (mask, pl330_filter, filter_param);if (info->direction ==DMA_FROM_DEVICE ) {memset (&slave_config,0 ,sizeof (struct dma_slave_config ));
arch/arm/plat-samsung/include/plat/dma-ops.h +1 -0
@@ -31,6 +31,7 @@ struct samsung_dma_info {enum dma_slave_buswidth width;dma_addr_t fifo;struct s3c2410_dma_client *client; +struct property *dt_dmach_prop; };struct samsung_dma_ops {
arch/arm/plat-samsung/include/plat/dma-pl330.h +2 -1
@@ -21,7 +21,8 @@* use these just as IDs. */ enum dma_ch { -DMACH_UART0_RX , +DMACH_DT_PROP =-1 , +DMACH_UART0_RX =0 ,DMACH_UART0_TX ,DMACH_UART1_RX ,DMACH_UART1_TX ,
Signature · 1 line
1.6.6.rc2
PATCH v2 6/6 ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build
The pl330 device instances and associated platform data is required only for non-device-tree builds. With device tree, all of this information is obtained from the device tree.
--- arch/arm/mach-exynos4/Kconfig | 7 +++++++ arch/arm/mach-exynos4/Makefile | 3 ++- 2 files changed, 9 insertions(+), 1 deletions(-)
arch/arm/mach-exynos4/Kconfig +7 -0
@@ -21,6 +21,13 @@ config EXYNOS4_MCT help Use MCT (Multi Core Timer) as kernel timers +config EXYNOS4_DEV_DMA + bool + default y if !OF + help + Compile in amba device definitions for DMA controller if OF + is not enabled. + config EXYNOS4_DEV_AHCI bool help
arch/arm/mach-exynos4/Makefile +2 -1
@@ -13,7 +13,8 @@ obj- := # Core support for EXYNOS4 system obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o -obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o pmu.o +obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o pmu.o +obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o obj-$(CONFIG_PM) += pm.o sleep.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o
Signature · 1 line
1.6.6.rc2
PATCH v2 6/6 ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build
Quoted 5 lines
-----Original Message-----
From: Thomas Abraham [mailto:thomas.abraham at linaro.org]
Sent: Thursday, September 01, 2011 6:05 PM
To: devicetree-discuss at lists.ozlabs.org
Cc: grant.likely at secretlab.ca; linux-arm-kernel at lists.infradead.org;
linux-samsung-
Quoted 4 lines
soc at vger.kernel.org; kgene.kim at samsung.com; robherring2 at gmail.com; vinod.koul at intel.com; patches at linaro.org; jassisinghbrar at gmail.com; boojin.kim at samsung.com
Subject: [PATCH v2 6/6] ARM: EXYNOS4: Limit usage of pl330 device instance
to
Review
Quoted 31 lines
non-dt build
The pl330 device instances and associated platform data is required only for non-device-tree builds. With device tree, all of this information is obtained from the device tree.
Signed-off-by Thomas Abraham <[email protected]>--- arch/arm/mach-exynos4/Kconfig | 7 +++++++ arch/arm/mach-exynos4/Makefile | 3 ++- 2 files changed, 9 insertions(+), 1 deletions(-)arch/arm/mach-exynos4/Kconfig +7
-0@@ -21,6 +21,13 @@ config EXYNOS4_MCT help Use MCT (Multi Core Timer) as kernel timers +config EXYNOS4_DEV_DMA + bool + default y if !OF + help + Compile in amba device definitions for DMA controller if OF + is not enabled. + config EXYNOS4_DEV_AHCI bool help(quoted diff) +0
-0
b/arch/arm/mach-exynos4/Makefile
arch/arm/mach-exynos4/Makefile obj- := · line 17
Quoted 11 lines
index d2bf5bf..a2f33dc 100644
arch/arm/mach-exynos4/Makefile +0
-1@@ -13,7 +13,8 @@ obj- := # Core support for EXYNOS4 system obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o -obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.opmu.o
arch/arm/mach-exynos4/Makefile +2
-0+obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o pmu.o +obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o
Do we need _really_ EXYNOS4_DEV_DMA here?
How about to use like following?
+obj-$(!CONFIG_OF) += dma.o
If any problems, let me know.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.
Quoted 5 lines
obj-$(CONFIG_PM) += pm.o sleep.o
obj-$(CONFIG_CPU_IDLE) += cpuidle.o--
1.6.6.rc2
PATCH v2 6/6 ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build
Dear Mr. Kim,
Quoted 58 lines · Kukjin Kim
Quoted 5 lines
-----Original Message-----
From: Thomas Abraham [mailto:thomas.abraham at linaro.org]
Sent: Thursday, September 01, 2011 6:05 PM
To: devicetree-discuss at lists.ozlabs.org
Cc: grant.likely at secretlab.ca; linux-arm-kernel at lists.infradead.org;linux-samsung-
Quoted 4 lines
soc at vger.kernel.org; kgene.kim at samsung.com; robherring2 at gmail.com; vinod.koul at intel.com; patches at linaro.org; jassisinghbrar at gmail.com; boojin.kim at samsung.com
Subject: [PATCH v2 6/6] ARM: EXYNOS4: Limit usage of pl330 device instanceto
Quoted 30 lines
non-dt build
The pl330 device instances and associated platform data is required only for non-device-tree builds. With device tree, all of this information is obtained from the device tree.
Signed-off-by Thomas Abraham <[email protected]>---
?arch/arm/mach-exynos4/Kconfig ?| ? ?7 +++++++
?arch/arm/mach-exynos4/Makefile | ? ?3 ++-
?2 files changed, 9 insertions(+), 1 deletions(-)arch/arm/mach-exynos4/Kconfig +0
-0@@ -21,6 +21,13 @@ config EXYNOS4_MCT? ? ? help
? ? ? ? Use MCT (Multi Core Timer) as kernel timersarch/arm/mach-exynos4/Kconfig +7
-0+config EXYNOS4_DEV_DMA + ? ? bool + ? ? default y if !OF + ? ? help + ? ? ? Compile in amba device definitions for DMA controller if OF + ? ? ? is not enabled. +?config
EXYNOS4_DEV_AHCI
? ? ? bool
? ? ? helpReview
Quoted 1 line
(quoted diff) +0
-0b/arch/arm/mach-exynos4/Makefile
arch/arm/mach-exynos4/Makefile
Quoted 11 lines
index d2bf5bf..a2f33dc 100644
arch/arm/mach-exynos4/Makefile +0
-0@@ -13,7 +13,8 @@ obj- ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?:=?# Core support for EXYNOS4 system
?obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o -obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o pmu.o
arch/arm/mach-exynos4/Makefile +2
-0+obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o pmu.o +obj-$(CONFIG_EXYNOS4_DEV_DMA) ? ? ? ?+= dma.oDo we need _really_
EXYNOS4_DEV_DMAhere?
How about to use like following?
Quoted 1 line
+obj-$(!CONFIG_OF) ? ? ? ? ? ? ?+= dma.o
Thanks for the suggestion. I will try it and resubmit the patch.
Thanks,
Thomas.
Quoted 19 lines
If any problems, let me know.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.Quoted 5 lines
?obj-$(CONFIG_PM) ? ? ? ? ? ? += pm.o sleep.o ?obj-$(CONFIG_CPU_IDLE) ? ? ? ? ? ? ? += cpuidle.o
--
1.6.6.rc2
PATCH v2 6/6 ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build
In reply to Kukjin KimDear Mr. Kim,
Quoted 49 lines · Kukjin Kim
Quoted 1 line
Subject: [PATCH v2 6/6] ARM: EXYNOS4: Limit usage of pl330 device instance
to
Quoted 30 lines
non-dt build
The pl330 device instances and associated platform data is required only for non-device-tree builds. With device tree, all of this information is obtained from the device tree.
Signed-off-by Thomas Abraham <[email protected]>---
?arch/arm/mach-exynos4/Kconfig ?| ? ?7 +++++++
?arch/arm/mach-exynos4/Makefile | ? ?3 ++-
?2 files changed, 9 insertions(+), 1 deletions(-)arch/arm/mach-exynos4/Kconfig +0
-0@@ -21,6 +21,13 @@ config EXYNOS4_MCT? ? ? help
? ? ? ? Use MCT (Multi Core Timer) as kernel timersarch/arm/mach-exynos4/Kconfig +7
-0+config EXYNOS4_DEV_DMA + ? ? bool + ? ? default y if !OF + ? ? help + ? ? ? Compile in amba device definitions for DMA controller if OF + ? ? ? is not enabled. +?config
EXYNOS4_DEV_AHCI
? ? ? bool
? ? ? helpReview
Quoted 1 line
(quoted diff) +0
-0b/arch/arm/mach-exynos4/Makefile
arch/arm/mach-exynos4/Makefile
Quoted 11 lines
index d2bf5bf..a2f33dc 100644
arch/arm/mach-exynos4/Makefile +0
-0@@ -13,7 +13,8 @@ obj- ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?:=?# Core support for EXYNOS4 system
?obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o -obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o pmu.o
arch/arm/mach-exynos4/Makefile +2
-0+obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o pmu.o +obj-$(CONFIG_EXYNOS4_DEV_DMA) ? ? ? ?+= dma.oDo we need _really_
EXYNOS4_DEV_DMAhere?
How about to use like following?
Quoted 3 lines
+obj-$(!CONFIG_OF) ? ? ? ? ? ? ?+= dma.o
If any problems, let me know.
While trying out your suggestion, I found a issue with this patch related to compiling a kernel with both dt and non-dt board files included in the build.
When compiling a single kernel image with mach-smdkv310.c file and exynos4 device tree enabled machine file, since CONFIG_OF is enabled, dma platform data does not get compiled which is required for mach-smdkv310. So, I would like to resubmit this patch and the updated diff is listed below. Could you please review the following diff.
arch/arm/mach-exynos4/Kconfig +9 -0
@@ -21,6 +21,11 @@ config EXYNOS4_MCT help Use MCT (Multi Core Timer) as kernel timers +config EXYNOS4_DEV_DMA + bool + help + Compile in amba device definitions for DMA controller + config EXYNOS4_DEV_AHCI bool help
@@ -129,6 +134,7 @@ config MACH_SMDKC210 select EXYNOS4_SETUP_FIMD0 select EXYNOS4_SETUP_I2C1 select EXYNOS4_SETUP_SDHCI + select EXYNOS4_DEV_DMA help Machine support for Samsung SMDKC210
@@ -153,6 +159,7 @@ config MACH_SMDKV310 select EXYNOS4_SETUP_I2C1 select EXYNOS4_SETUP_KEYPAD select EXYNOS4_SETUP_SDHCI + select EXYNOS4_DEV_DMA help Machine support for Samsung SMDKV310
@@ -191,6 +198,7 @@ config MACH_UNIVERSAL_C210 select EXYNOS4_SETUP_I2C3 select EXYNOS4_SETUP_I2C5 select EXYNOS4_SETUP_SDHCI + select EXYNOS4_DEV_DMA help Machine support for Samsung Mobile Universal S5PC210 Reference Board.
@@ -215,6 +223,7 @@ config MACH_NURI select EXYNOS4_SETUP_USB_PHY select SAMSUNG_DEV_PWM select SAMSUNG_DEV_ADC + select EXYNOS4_DEV_DMA help Machine support for Samsung Mobile NURI Board.
arch/arm/mach-exynos4/Makefile +2 -1
@@ -14,7 +14,8 @@ obj- := obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o -obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o pmu.o +obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o pmu.o +obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o obj-$(CONFIG_PM) += pm.o sleep.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o
Thanks,
Thomas.
PATCH v2 6/6 ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build
Quoted 5 lines · Thomas Abraham
Dear Mr. Kim,
Quoted 1 line · Kukjin Kim
Quoted 1 line
Subject: [PATCH v2 6/6] ARM: EXYNOS4: Limit usage of pl330 device
instance
Quoted 4 lines
Quoted 4 lines
to
Quoted 3 lines
non-dt build
The pl330 device instances and associated platform data is required
only
Quoted 1 line
Quoted 1 line
Quoted 1 line
for non-device-tree builds. With device tree, all of this information
is
Quoted 9 lines
Quoted 9 lines
Review
Quoted 9 lines
obtained from the device tree.
Signed-off-by Thomas Abraham <[email protected]>---
?arch/arm/mach-exynos4/Kconfig ?| ? ?7 +++++++
?arch/arm/mach-exynos4/Makefile | ? ?3 ++-
?2 files changed, 9 insertions(+), 1 deletions(-)(quoted diff) +0
-0
b/arch/arm/mach-exynos4/Kconfig
Quoted 42 lines
Quoted 34 lines
Quoted 17 lines
index d4d401c..3edbf37 100644
arch/arm/mach-exynos4/Kconfig +0
-0@@ -21,6 +21,13 @@ config EXYNOS4_MCT? ? ? help
? ? ? ? Use MCT (Multi Core Timer) as kernel timersarch/arm/mach-exynos4/Kconfig +7
-0+config EXYNOS4_DEV_DMA + ? ? bool + ? ? default y if !OF + ? ? help + ? ? ? Compile in amba device definitions for DMA controller if OF + ? ? ? is not enabled. +?config
EXYNOS4_DEV_AHCI
? ? ? bool
? ? ? helpReview
Quoted 1 line
(quoted diff) +0
-0b/arch/arm/mach-exynos4/Makefile
arch/arm/mach-exynos4/Makefile
Quoted 11 lines
index d2bf5bf..a2f33dc 100644
arch/arm/mach-exynos4/Makefile +0
-0@@ -13,7 +13,8 @@ obj- ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?:=?# Core support for EXYNOS4 system
?obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o -obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o pmu.o
arch/arm/mach-exynos4/Makefile +2
-0+obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o pmu.o +obj-$(CONFIG_EXYNOS4_DEV_DMA) ? ? ? ?+= dma.oDo we need _really_
EXYNOS4_DEV_DMAhere?
How about to use like following?Quoted 3 lines
+obj-$(!CONFIG_OF) ? ? ? ? ? ? ?+= dma.o
If any problems, let me know.
While trying out your suggestion, I found a issue with this patch related to compiling a kernel with both dt and non-dt board files included in the build.
Quoted 6 lines
When compiling a single kernel image with
mach-smdkv310.cfile and exynos4 device tree enabled machine file, sinceCONFIG_OFis enabled, dma platform data does not get compiled which is required for mach-smdkv310. So, I would like to resubmit this patch and the updated diff is listed below. Could you please review the following diff.
Hi Thomas,
Oops, you're right...so following is ok to me but you need to rebase this based on latest my tree.
If any problems, please let me know.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.
Review
Quoted 50 lines
arch/arm/mach-exynos4/Kconfig +9
-0@@ -21,6 +21,11 @@ config EXYNOS4_MCT help Use MCT (Multi Core Timer) as kernel timers +config EXYNOS4_DEV_DMA + bool + help + Compile in amba device definitions for DMA controller + config EXYNOS4_DEV_AHCI bool help@@ -129,6 +134,7 @@ config MACH_SMDKC210 select EXYNOS4_SETUP_FIMD0 select EXYNOS4_SETUP_I2C1 select EXYNOS4_SETUP_SDHCI + select EXYNOS4_DEV_DMA help Machine support for Samsung SMDKC210@@ -153,6 +159,7 @@ config MACH_SMDKV310 select EXYNOS4_SETUP_I2C1 select EXYNOS4_SETUP_KEYPAD select EXYNOS4_SETUP_SDHCI + select EXYNOS4_DEV_DMA help Machine support for Samsung SMDKV310@@ -191,6 +198,7 @@ config MACH_UNIVERSAL_C210 select EXYNOS4_SETUP_I2C3 select EXYNOS4_SETUP_I2C5 select EXYNOS4_SETUP_SDHCI + select EXYNOS4_DEV_DMA help Machine support for Samsung Mobile Universal S5PC210 Reference Board.@@ -215,6 +223,7 @@ config MACH_NURI select EXYNOS4_SETUP_USB_PHY select SAMSUNG_DEV_PWM select SAMSUNG_DEV_ADC + select EXYNOS4_DEV_DMA help Machine support for Samsung Mobile NURI Board.(quoted diff) +0
-0
b/arch/arm/mach-exynos4/Makefile
Quoted 17 lines
index 929262a..a2f33dc 100644
arch/arm/mach-exynos4/Makefile +0
-1@@ -14,7 +14,8 @@ obj- := obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o -obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.opmu.o
arch/arm/mach-exynos4/Makefile +2
-0+obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o pmu.o +obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o obj-$(CONFIG_PM) += pm.o sleep.o obj-$(CONFIG_CPU_IDLE) += cpuidle.oThanks,
Thomas.
PATCH v2 4/6 DMA: PL330: Add device tree support
In reply to Thomas AbrahamQuoted 14 lines · Thomas Abraham
For PL330 dma controllers instantiated from device tree, the channel lookup is based on phandle of the dma controller and dma request id specified by the client node. During probe, the private data of each channel of the controller is set to point to the device node of the dma controller. The '
chan_id' of the each channel is used as the dma request id.Client driver requesting dma channels specify the phandle of the dma controller and the request id. The pl330 filter function converts the phandle to the device node pointer and matches that with channel's private data. If a match is found, the request id from the client node and the '
chan_id' of the channel is matched. A channel is found if both the values match.
Quoted 3 lines
Cc Jassi Brar <[email protected]>Cc Boojin Kim <[email protected]>Signed-off-by Thomas Abraham <[email protected]>
Looks good.
Quoted 114 lines
--- .../devicetree/bindings/dma/arm-pl330.txt | 29 ++++++++++++++++ drivers/dma/pl330.c | 35 +++++++++++++++++--- 2 files changed, 59 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/dma/arm-pl330.txtDocumentation/devicetree/bindings/dma/arm-pl330.txt new file +29
-0@@ -0,0 +1,29 @@ +* ARM PrimeCell PL330 DMA Controller + +The ARM PrimeCell PL330 DMA controller can move blocks of memory contents +between memory and peripherals or memory to memory. + +Required properties: + - compatible: should include both "arm,pl330" and "arm,primecell". + - reg: physical base address of the controller and length of memory mapped + region. + - interrupts: interrupt number to the cpu. + +Example: (from Samsung's Exynos4 processor dtsi file) + + pdma0: pdma at 12680000 { + compatible = "arm,pl330", "arm,primecell"; + reg = <0x12680000 0x1000>; + interrupts = <99>; + }; + +Client drivers (device nodes requiring dma transfers from dev-to-mem or +mem-to-dev) should specify the DMA channel numbers using a two-value pair +as shown below. + + [property name] = <[phandle of the dma controller] [dma request id]>; + + where 'dma request id' is the dma request number which is connected + to the client controller. + + Example: tx-dma-channel = <&pdma0 12>;drivers/dma/pl330.c +30
-5@@ -19,6 +19,7 @@#include <linux/amba/pl330.h> #include <linux/pm_runtime.h> #include <linux/scatterlist.h> +#include <linux/of.h> #define NR_DEFAULT_DESC 16@@ -277,6 +278,20 @@ bool pl330_filter(struct dma_chan *chan, void *param)if (chan->device->dev->driver != &pl330_driver.drv)return false; +#ifdef CONFIG_OF +if (chan->device->dev->of_node) { +const __be32 *prop_value; +phandle phandle; +struct device_node *node; + + prop_value = ((struct property *)param)->value; + phandle =be32_to_cpup (prop_value++); + node =of_find_node_by_phandle (phandle); +return ((chan->private == node) && + (chan->chan_id ==be32_to_cpup (prop_value))); + } +#endif + peri_id = chan->private;return *peri_id == (unsigned )param; }@@ -857,12 +872,17 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)INIT_LIST_HEAD (&pd->channels);/* Initialize channel parameters */ - num_chan =max (pdat ? pdat->nr_valid_peri :0 , (u8 )pi->pcfg.num_chan); + num_chan =max (pdat ? pdat->nr_valid_peri : (u8 )pi->pcfg.num_peri, + (u8 )pi->pcfg.num_chan); pdmac->peripherals =kzalloc (num_chan *sizeof (*pch),GFP_KERNEL );for (i =0 ; i < num_chan; i++) { pch = &pdmac->peripherals[i]; - pch->chan.private = pdat ? &pdat->peri_id[i] :NULL ; +if (!adev->dev.of_node) + pch->chan.private = pdat ? &pdat->peri_id[i] :NULL ; +else + pch->chan.private = adev->dev.of_node; +INIT_LIST_HEAD (&pch->work_list);spin_lock_init (&pch->lock); pch->pl330_chid =NULL ;@@ -876,11 +896,16 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id) } pd->dev = &adev->dev; -if (pdat) +if (pdat) { pd->cap_mask = pdat->cap_mask; -else + }else {dma_cap_set (DMA_MEMCPY , pd->cap_mask); - +if (pi->pcfg.num_peri) { +dma_cap_set (DMA_SLAVE , pd->cap_mask); +dma_cap_set (DMA_CYCLIC , pd->cap_mask); + } + } + pd->device_alloc_chan_resources = pl330_alloc_chan_resources; pd->device_free_chan_resources = pl330_free_chan_resources; pd->device_prep_dma_memcpy = pl330_prep_dma_memcpy;