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Move sdhci-s3c platform helper into driver

PATCH Superseded Thomas Abraham 3 participants 10 messages Sep 2, 2011 – Sep 21, 2011

Subsystems (6)
Arm (32-bit) Arm sub-architectures Arm Samsung Exynos MMC, SD and SDIO +2 more subsystems

v1 of 2 Superseded Latest is v2 →

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Thomas Abraham

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#0 lore raw

cover Move sdhci-s3c platform helper into driver

The platform helper that sets up the default sdhci-s3c controller configuration can be removed and moved into the sdhci-s3c driver. This platform helper is removed for s3c2416, s3c64xx, s5pc100, s5pv210 and Exynos4 platforms.

Since the platform helper function pointer was being passed in the platform data of sdhci-s3c driver, the removal of this pointer from the platform data is step closer to complete device tree support for sdhci-s3c driver.

This patchset has been tested on the following platforms. SMDK2416, SMDK6410, SMDKC100, SMDKV210 and SMDKV310.

Thomas Abraham (2):
mmc: sdhci-s3c: add default controller configuration
arm: samsung: remove sdhci default configuration setup platform helper

 arch/arm/mach-exynos4/setup-sdhci.c        |   47 -----------------------
 arch/arm/mach-s3c2416/setup-sdhci.c        |   37 ------------------
 arch/arm/mach-s3c64xx/setup-sdhci.c        |   48 -----------------------
 arch/arm/mach-s5pc100/setup-sdhci.c        |   42 --------------------
 arch/arm/mach-s5pv210/setup-sdhci.c        |   41 --------------------
 arch/arm/plat-samsung/dev-hsmmc.c          |    2 -
 arch/arm/plat-samsung/dev-hsmmc1.c         |    2 -
 arch/arm/plat-samsung/dev-hsmmc2.c         |    2 -
 arch/arm/plat-samsung/dev-hsmmc3.c         |    2 -
 arch/arm/plat-samsung/include/plat/sdhci.h |   57 ----------------------------
 drivers/mmc/host/sdhci-s3c.c               |   28 ++++++++-----
 11 files changed, 17 insertions(+), 291 deletions(-)
author
#1 lore raw

PATCH 1/2 mmc: sdhci-s3c: add default controller configuration

The default controller configuration which was previously setup by platform helper functions is moved into the driver.

Cc Ben Dooks <[email protected]>
Signed-off-by Thomas Abraham <[email protected]>
---
 drivers/mmc/host/sdhci-s3c.c |   28 +++++++++++++++++-----------
 1 files changed, 17 insertions(+), 11 deletions(-)
drivers/mmc/host/sdhci-s3c.c +17 -11
index 2bd7bf4..d891682 100644
@@ -203,17 +203,23 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
 		writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
 	}
 
-	/* reconfigure the hardware for new clock rate */
-
-	{
-		struct mmc_ios ios;
-
-		ios.clock = clock;
-
-		if (ourhost->pdata->cfg_card)
-			(ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr,
-						   &ios, NULL);
-	}
+	/* reprogram default hardware configuration */
+	writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
+		host->ioaddr + S3C64XX_SDHCI_CONTROL4);
+
+	ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
+	ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
+		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
+		  S3C_SDHCI_CTRL2_ENFBCLKRX |
+		  S3C_SDHCI_CTRL2_DFCNT_NONE |
+		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
+	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
+
+	/* reconfigure the controller for new clock rate */
+	ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
+	if (clock < 25 * 1000000)
+		ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);
+	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
 }
 
 /**
Signature · 1 line
1.6.6.rc2
author
#2 lore raw

PATCH 2/2 arm: samsung: remove sdhci default configuration setup platform helper

The sdhci platform helper function that sets up the default controller configuration is removed for all Samsung platforms since such default controller configuration can be handled by the driver.

Cc Ben Dooks <[email protected]>
Signed-off-by Thomas Abraham <[email protected]>
---
 arch/arm/mach-exynos4/setup-sdhci.c        |   47 -----------------------
 arch/arm/mach-s3c2416/setup-sdhci.c        |   37 ------------------
 arch/arm/mach-s3c64xx/setup-sdhci.c        |   48 -----------------------
 arch/arm/mach-s5pc100/setup-sdhci.c        |   42 --------------------
 arch/arm/mach-s5pv210/setup-sdhci.c        |   41 --------------------
 arch/arm/plat-samsung/dev-hsmmc.c          |    2 -
 arch/arm/plat-samsung/dev-hsmmc1.c         |    2 -
 arch/arm/plat-samsung/dev-hsmmc2.c         |    2 -
 arch/arm/plat-samsung/dev-hsmmc3.c         |    2 -
 arch/arm/plat-samsung/include/plat/sdhci.h |   57 ----------------------------
 10 files changed, 0 insertions(+), 280 deletions(-)
arch/arm/mach-exynos4/setup-sdhci.c +0 -47
index 1e83f8c..92937b4 100644
@@ -10,16 +10,7 @@
  * published by the Free Software Foundation.
 */
 
-#include <linux/kernel.h>
 #include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <linux/mmc/card.h>
-#include <linux/mmc/host.h>
-
-#include <plat/regs-sdhci.h>
 
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 

@@ -29,41 +20,3 @@ char *exynos4_hsmmc_clksrcs[4] = {
 	[2] = "sclk_mmc",	/* mmc_bus */
 	[3] = NULL,
 };
-
-void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r,
-				  struct mmc_ios *ios, struct mmc_card *card)
-{
-	u32 ctrl2, ctrl3;
-
-	/* don't need to alter anything according to card-type */
-
-	ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
-
-	/* select base clock source to HCLK */
-
-	ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
-
-	/*
-	 * clear async mode, enable conflict mask, rx feedback ctrl, SD
-	 * clk hold and no use debounce count
-	 */
-
-	ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
-		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
-		  S3C_SDHCI_CTRL2_ENFBCLKRX |
-		  S3C_SDHCI_CTRL2_DFCNT_NONE |
-		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
-
-	/* Tx and Rx feedback clock delay control */
-
-	if (ios->clock < 25 * 1000000)
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
-			 S3C_SDHCI_CTRL3_FCSEL2 |
-			 S3C_SDHCI_CTRL3_FCSEL1 |
-			 S3C_SDHCI_CTRL3_FCSEL0);
-	else
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
-
-	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
-	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
-}
arch/arm/mach-s3c2416/setup-sdhci.c +0 -37
index ed34fad..cee5395 100644
@@ -12,17 +12,7 @@
  * published by the Free Software Foundation.
 */
 
-#include <linux/kernel.h>
 #include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <linux/mmc/card.h>
-#include <linux/mmc/host.h>
-
-#include <plat/regs-sdhci.h>
-#include <plat/sdhci.h>
 
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 

@@ -32,30 +22,3 @@ char *s3c2416_hsmmc_clksrcs[4] = {
 	[2] = "hsmmc-if",
 	/* [3] = "48m", - note not successfully used yet */
 };
-
-void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev,
-				  void __iomem *r,
-				  struct mmc_ios *ios,
-				  struct mmc_card *card)
-{
-	u32 ctrl2, ctrl3;
-
-	ctrl2 = __raw_readl(r + S3C_SDHCI_CONTROL2);
-	ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
-	ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
-		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
-		  S3C_SDHCI_CTRL2_ENFBCLKRX |
-		  S3C_SDHCI_CTRL2_DFCNT_NONE |
-		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
-
-	if (ios->clock < 25 * 1000000)
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
-			 S3C_SDHCI_CTRL3_FCSEL2 |
-			 S3C_SDHCI_CTRL3_FCSEL1 |
-			 S3C_SDHCI_CTRL3_FCSEL0);
-	else
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
-
-	__raw_writel(ctrl2, r + S3C_SDHCI_CONTROL2);
-	__raw_writel(ctrl3, r + S3C_SDHCI_CONTROL3);
-}
arch/arm/mach-s3c64xx/setup-sdhci.c +0 -48

58 lines not on this page · raw message

arch/arm/mach-s5pc100/setup-sdhci.c +0 -42

52 lines not on this page · raw message

arch/arm/mach-s5pv210/setup-sdhci.c +0 -41

51 lines not on this page · raw message

arch/arm/plat-samsung/dev-hsmmc.c +0 -2
index db7a65c..5f15bf7 100644
@@ -70,8 +70,6 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->max_width = pd->max_width;
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;
-	if (pd->cfg_card)
-		set->cfg_card = pd->cfg_card;
 	if (pd->host_caps)
 		set->host_caps |= pd->host_caps;
 	if (pd->clk_type)
arch/arm/plat-samsung/dev-hsmmc1.c +0 -2
index 2497321..2249794 100644
@@ -70,8 +70,6 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->max_width = pd->max_width;
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;
-	if (pd->cfg_card)
-		set->cfg_card = pd->cfg_card;
 	if (pd->host_caps)
 		set->host_caps |= pd->host_caps;
 	if (pd->clk_type)
arch/arm/plat-samsung/dev-hsmmc2.c +0 -2
index f60aedb..58af1eb 100644
@@ -71,8 +71,6 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->max_width = pd->max_width;
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;
-	if (pd->cfg_card)
-		set->cfg_card = pd->cfg_card;
 	if (pd->host_caps)
 		set->host_caps |= pd->host_caps;
 	if (pd->clk_type)
arch/arm/plat-samsung/dev-hsmmc3.c +0 -2
index ede776f..bb44271 100644
@@ -74,8 +74,6 @@ void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
 		set->max_width = pd->max_width;
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;
-	if (pd->cfg_card)
-		set->cfg_card = pd->cfg_card;
 	if (pd->host_caps)
 		set->host_caps |= pd->host_caps;
 	if (pd->clk_type)
arch/arm/plat-samsung/include/plat/sdhci.h +0 -57

210 lines not on this page · raw message

Signature · 1 line
1.6.6.rc2
#3 lore raw

PATCH 2/2 arm: samsung: remove sdhci default configuration setup platform helper

Quoted 7 lines · Thomas Abraham

The sdhci platform helper function that sets up the default controller configuration is removed for all Samsung platforms since such default controller configuration can be handled by the driver.

Cc Ben Dooks <[email protected]>
Signed-off-by Thomas Abraham <[email protected]>
Quoted 11 lines
---
 arch/arm/mach-exynos4/setup-sdhci.c        |   47 -----------------------
 arch/arm/mach-s3c2416/setup-sdhci.c        |   37 ------------------
 arch/arm/mach-s3c64xx/setup-sdhci.c        |   48 -----------------------
 arch/arm/mach-s5pc100/setup-sdhci.c        |   42 --------------------
 arch/arm/mach-s5pv210/setup-sdhci.c        |   41 --------------------
 arch/arm/plat-samsung/dev-hsmmc.c          |    2 -
 arch/arm/plat-samsung/dev-hsmmc1.c         |    2 -
 arch/arm/plat-samsung/dev-hsmmc2.c         |    2 -
 arch/arm/plat-samsung/dev-hsmmc3.c         |    2 -
 arch/arm/plat-samsung/include/plat/sdhci.h |   57

----------------------------

Review

Quoted 3 lines
 10 files changed, 0 insertions(+), 280 deletions(-)
(quoted diff) +0 -0

b/arch/arm/mach-exynos4/setup-

Quoted 22 lines

sdhci.c
index 1e83f8c..92937b4 100644

arch/arm/mach-exynos4/setup-sdhci.c +0 -9
@@ -10,16 +10,7 @@
  * published by the Free Software Foundation.
 */
 
-#include <linux/kernel.h>
 #include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <linux/mmc/card.h>
-#include <linux/mmc/host.h>
-
-#include <plat/regs-sdhci.h>
 
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */

arch/arm/mach-exynos4/setup-sdhci.c char *exynos4_hsmmc_clksrcs[4] = { · line 33

Quoted 5 lines
arch/arm/mach-exynos4/setup-sdhci.c +0 -2
@@ -29,41 +20,3 @@ char *exynos4_hsmmc_clksrcs[4] = {
 	[2] = "sclk_mmc",	/* mmc_bus */
 	[3] = NULL,
 };
-
-void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void

__iomem

arch/arm/mach-exynos4/setup-sdhci.c

Quoted 2 lines

*r,

arch/arm/mach-exynos4/setup-sdhci.c +0 -1
-				  struct mmc_ios *ios, struct mmc_card

*card)

Review

Quoted 37 lines
arch/arm/mach-exynos4/setup-sdhci.c +0 -31
-{
-	u32 ctrl2, ctrl3;
-
-	/* don't need to alter anything according to card-type */
-
-	ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
-
-	/* select base clock source to HCLK */
-
-	ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
-
-	/*
-	 * clear async mode, enable conflict mask, rx feedback ctrl, SD
-	 * clk hold and no use debounce count
-	 */
-
-	ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
-		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
-		  S3C_SDHCI_CTRL2_ENFBCLKRX |
-		  S3C_SDHCI_CTRL2_DFCNT_NONE |
-		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
-
-	/* Tx and Rx feedback clock delay control */
-
-	if (ios->clock < 25 * 1000000)
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
-			 S3C_SDHCI_CTRL3_FCSEL2 |
-			 S3C_SDHCI_CTRL3_FCSEL1 |
-			 S3C_SDHCI_CTRL3_FCSEL0);
-	else
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 |

S3C_SDHCI_CTRL3_FCSEL0);

arch/arm/mach-exynos4/setup-sdhci.c +0 -4
-
-	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
-	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
-}
(quoted diff) +0 -0

b/arch/arm/mach-s3c2416/setup-

Review

Quoted 55 lines

sdhci.c
index ed34fad..cee5395 100644

arch/arm/mach-s3c2416/setup-sdhci.c +0 -33
@@ -12,17 +12,7 @@
  * published by the Free Software Foundation.
 */
 
-#include <linux/kernel.h>
 #include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <linux/mmc/card.h>
-#include <linux/mmc/host.h>
-
-#include <plat/regs-sdhci.h>
-#include <plat/sdhci.h>
 
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 

@@ -32,30 +22,3 @@ char *s3c2416_hsmmc_clksrcs[4] = {
 	[2] = "hsmmc-if",
 	/* [3] = "48m", - note not successfully used yet */
 };
-
-void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev,
-				  void __iomem *r,
-				  struct mmc_ios *ios,
-				  struct mmc_card *card)
-{
-	u32 ctrl2, ctrl3;
-
-	ctrl2 = __raw_readl(r + S3C_SDHCI_CONTROL2);
-	ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
-	ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
-		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
-		  S3C_SDHCI_CTRL2_ENFBCLKRX |
-		  S3C_SDHCI_CTRL2_DFCNT_NONE |
-		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
-
-	if (ios->clock < 25 * 1000000)
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
-			 S3C_SDHCI_CTRL3_FCSEL2 |
-			 S3C_SDHCI_CTRL3_FCSEL1 |
-			 S3C_SDHCI_CTRL3_FCSEL0);
-	else
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 |

S3C_SDHCI_CTRL3_FCSEL0);

arch/arm/mach-s3c2416/setup-sdhci.c +0 -4
-
-	__raw_writel(ctrl2, r + S3C_SDHCI_CONTROL2);
-	__raw_writel(ctrl3, r + S3C_SDHCI_CONTROL3);
-}
(quoted diff) +0 -0

b/arch/arm/mach-s3c64xx/setup-

Review

Quoted 67 lines

sdhci.c
index f344a22..c75a71b 100644

arch/arm/mach-s3c64xx/setup-sdhci.c +0 -33
@@ -12,17 +12,7 @@
  * published by the Free Software Foundation.
 */
 
-#include <linux/kernel.h>
 #include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <linux/mmc/card.h>
-#include <linux/mmc/host.h>
-
-#include <plat/regs-sdhci.h>
-#include <plat/sdhci.h>
 
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 

@@ -32,41 +22,3 @@ char *s3c64xx_hsmmc_clksrcs[4] = {
 	[2] = "mmc_bus",
 	/* [3] = "48m", - note not successfully used yet */
 };
-
-void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
-				  void __iomem *r,
-				  struct mmc_ios *ios,
-				  struct mmc_card *card)
-{
-	u32 ctrl2, ctrl3;
-
-	ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
-	ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
-	ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
-		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
-		  S3C_SDHCI_CTRL2_ENFBCLKRX |
-		  S3C_SDHCI_CTRL2_DFCNT_NONE |
-		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
-
-	if (ios->clock < 25 * 1000000)
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
-			 S3C_SDHCI_CTRL3_FCSEL2 |
-			 S3C_SDHCI_CTRL3_FCSEL1 |
-			 S3C_SDHCI_CTRL3_FCSEL0);
-	else
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 |

S3C_SDHCI_CTRL3_FCSEL0);

arch/arm/mach-s3c64xx/setup-sdhci.c +0 -12
-
-	pr_debug("%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
-	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
-	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
-}
-
-void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
-				  void __iomem *r,
-				  struct mmc_ios *ios,
-				  struct mmc_card *card)
-{
-	writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r +

S3C64XX_SDHCI_CONTROL4);

arch/arm/mach-s3c64xx/setup-sdhci.c +0 -3
-
-	s3c6400_setup_sdhci_cfg_card(dev, r, ios, card);
-}
(quoted diff) +0 -0

b/arch/arm/mach-s5pc100/setup-

Review

Quoted 61 lines

sdhci.c
index be25879..6418c6e 100644

arch/arm/mach-s5pc100/setup-sdhci.c +0 -22
@@ -11,17 +11,7 @@
  * published by the Free Software Foundation.
 */
 
-#include <linux/kernel.h>
 #include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <linux/mmc/card.h>
-#include <linux/mmc/host.h>
-
-#include <plat/regs-sdhci.h>
-#include <plat/sdhci.h>
 
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 

@@ -31,35 +21,3 @@ char *s5pc100_hsmmc_clksrcs[4] = {
 	[2] = "sclk_mmc",	/* mmc_bus */
 	/* [3] = "48m",		- note not successfully used yet */
 };
-
-
-void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev,
-				    void __iomem *r,
-				    struct mmc_ios *ios,
-				    struct mmc_card *card)
-{
-	u32 ctrl2, ctrl3;
-
-	/* don't need to alter anything according to card-type */
-
-	writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r +

S3C64XX_SDHCI_CONTROL4);

arch/arm/mach-s5pc100/setup-sdhci.c +0 -16
-
-	ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
-	ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
-	ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
-		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
-		  S3C_SDHCI_CTRL2_ENFBCLKRX |
-		  S3C_SDHCI_CTRL2_DFCNT_NONE |
-		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
-
-	if (ios->clock < 25 * 1000000)
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
-			 S3C_SDHCI_CTRL3_FCSEL2 |
-			 S3C_SDHCI_CTRL3_FCSEL1 |
-			 S3C_SDHCI_CTRL3_FCSEL0);
-	else
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 |

S3C_SDHCI_CTRL3_FCSEL0);

arch/arm/mach-s5pc100/setup-sdhci.c +0 -4
-
-	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
-	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
-}
(quoted diff) +0 -0

b/arch/arm/mach-s5pv210/setup-

Review

Quoted 60 lines

sdhci.c
index a83b6c9..6b8ccc4 100644

arch/arm/mach-s5pv210/setup-sdhci.c +0 -21
@@ -10,17 +10,7 @@
  * published by the Free Software Foundation.
 */
 
-#include <linux/kernel.h>
 #include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <linux/mmc/card.h>
-#include <linux/mmc/host.h>
-
-#include <plat/regs-sdhci.h>
-#include <plat/sdhci.h>
 
 /* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
 

@@ -30,34 +20,3 @@ char *s5pv210_hsmmc_clksrcs[4] = {
 	[2] = "sclk_mmc",	/* mmc_bus */
 	/* [3] = NULL,		- reserved */
 };
-
-void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
-				    void __iomem *r,
-				    struct mmc_ios *ios,
-				    struct mmc_card *card)
-{
-	u32 ctrl2, ctrl3;
-
-	/* don't need to alter anything according to card-type */
-
-	writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r +

S3C64XX_SDHCI_CONTROL4);

arch/arm/mach-s5pv210/setup-sdhci.c +0 -16
-
-	ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
-	ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
-	ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
-		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
-		  S3C_SDHCI_CTRL2_ENFBCLKRX |
-		  S3C_SDHCI_CTRL2_DFCNT_NONE |
-		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
-
-	if (ios->clock < 25 * 1000000)
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
-			 S3C_SDHCI_CTRL3_FCSEL2 |
-			 S3C_SDHCI_CTRL3_FCSEL1 |
-			 S3C_SDHCI_CTRL3_FCSEL0);
-	else
-		ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 |

S3C_SDHCI_CTRL3_FCSEL0);

arch/arm/mach-s5pv210/setup-sdhci.c +0 -4
-
-	writel(ctrl2, r + S3C_SDHCI_CONTROL2);
-	writel(ctrl3, r + S3C_SDHCI_CONTROL3);
-}
(quoted diff) +0 -0

b/arch/arm/plat-samsung/dev-

arch/arm/plat-samsung/dev-hsmmc.c void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata

Quoted 5 lines

hsmmc.c
index db7a65c..5f15bf7 100644

arch/arm/plat-samsung/dev-hsmmc.c +0 -0
@@ -70,8 +70,6 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata

*pd)

Review

Quoted 9 lines
arch/arm/plat-samsung/dev-hsmmc.c +0 -2
 		set->max_width = pd->max_width;
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;
-	if (pd->cfg_card)
-		set->cfg_card = pd->cfg_card;
 	if (pd->host_caps)
 		set->host_caps |= pd->host_caps;
 	if (pd->clk_type)
(quoted diff) +0 -0

b/arch/arm/plat-samsung/dev-

arch/arm/plat-samsung/dev-hsmmc1.c void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata

Quoted 5 lines

hsmmc1.c
index 2497321..2249794 100644

arch/arm/plat-samsung/dev-hsmmc1.c +0 -0
@@ -70,8 +70,6 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata

*pd)

Review

Quoted 9 lines
arch/arm/plat-samsung/dev-hsmmc1.c +0 -2
 		set->max_width = pd->max_width;
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;
-	if (pd->cfg_card)
-		set->cfg_card = pd->cfg_card;
 	if (pd->host_caps)
 		set->host_caps |= pd->host_caps;
 	if (pd->clk_type)
(quoted diff) +0 -0

b/arch/arm/plat-samsung/dev-

arch/arm/plat-samsung/dev-hsmmc2.c void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata

Quoted 5 lines

hsmmc2.c
index f60aedb..58af1eb 100644

arch/arm/plat-samsung/dev-hsmmc2.c +0 -0
@@ -71,8 +71,6 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata

*pd)

Review

Quoted 9 lines
arch/arm/plat-samsung/dev-hsmmc2.c +0 -2
 		set->max_width = pd->max_width;
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;
-	if (pd->cfg_card)
-		set->cfg_card = pd->cfg_card;
 	if (pd->host_caps)
 		set->host_caps |= pd->host_caps;
 	if (pd->clk_type)
(quoted diff) +0 -0

b/arch/arm/plat-samsung/dev-

arch/arm/plat-samsung/dev-hsmmc3.c void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata

Quoted 5 lines

hsmmc3.c
index ede776f..bb44271 100644

arch/arm/plat-samsung/dev-hsmmc3.c +0 -0
@@ -74,8 +74,6 @@ void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata

*pd)

Quoted 245 lines
arch/arm/plat-samsung/dev-hsmmc3.c +0 -2
 		set->max_width = pd->max_width;
 	if (pd->cfg_gpio)
 		set->cfg_gpio = pd->cfg_gpio;
-	if (pd->cfg_card)
-		set->cfg_card = pd->cfg_card;
 	if (pd->host_caps)
 		set->host_caps |= pd->host_caps;
 	if (pd->clk_type)
arch/arm/plat- renamed from arch/arm/plat-samsung/include/plat/sdhci.h +0 -0

samsung/include/plat/sdhci.h
index 058e096..7f57173 100644

arch/arm/plat-samsung/include/plat/sdhci.h +0 -58
@@ -55,10 +55,6 @@ enum clk_types {
  *		 cd_type == S3C_SDHCI_CD_GPIO
  * @ext_cd_gpio_invert: invert values for external CD gpio line
  * @cfg_gpio: Configure the GPIO for a specific card bit-width
- * @cfg_card: Configure the interface for a specific card and speed. This
- *            is necessary the controllers and/or GPIO blocks require the
- *	      changing of driver-strength and other controls dependent on
- *	      the card and speed of operation.
  *
  * Initialisation data specific to either the machine or the platform
  * for the device driver to use or call-back when configuring gpio or

@@ -80,10 +76,6 @@ struct s3c_sdhci_platdata {
 						      int state));
 
 	void	(*cfg_gpio)(struct platform_device *dev, int width);
-	void	(*cfg_card)(struct platform_device *dev,
-			    void __iomem *regbase,
-			    struct mmc_ios *ios,
-			    struct mmc_card *card);
 };
 
 /**

@@ -132,17 +124,11 @@ extern void exynos4_setup_sdhci3_cfg_gpio(struct
 platform_device *, int w);
 #ifdef CONFIG_S3C2416_SETUP_SDHCI
 extern char *s3c2416_hsmmc_clksrcs[4];
 
-extern void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev,
-					   void __iomem *r,
-					   struct mmc_ios *ios,
-					   struct mmc_card *card);
-
 static inline void s3c2416_default_sdhci0(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC
 	s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs;
 	s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio;
-	s3c_hsmmc0_def_platdata.cfg_card = s3c2416_setup_sdhci_cfg_card;
 #endif /* CONFIG_S3C_DEV_HSMMC */
 }

@@ -151,7 +137,6 @@ static inline void s3c2416_default_sdhci1(void)
 #ifdef CONFIG_S3C_DEV_HSMMC1
 	s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs;
 	s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio;
-	s3c_hsmmc1_def_platdata.cfg_card = s3c2416_setup_sdhci_cfg_card;
 #endif /* CONFIG_S3C_DEV_HSMMC1 */
 }
 

@@ -165,17 +150,11 @@ static inline void s3c2416_default_sdhci1(void) { }
 #ifdef CONFIG_S3C64XX_SETUP_SDHCI
 extern char *s3c64xx_hsmmc_clksrcs[4];
 
-extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
-					 void __iomem *r,
-					 struct mmc_ios *ios,
-					 struct mmc_card *card);
-
 static inline void s3c6400_default_sdhci0(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC
 	s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
 	s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
-	s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
 #endif
 }
 

@@ -184,7 +163,6 @@ static inline void s3c6400_default_sdhci1(void)
 #ifdef CONFIG_S3C_DEV_HSMMC1
 	s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
 	s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
-	s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
 #endif
 }
 

@@ -193,21 +171,14 @@ static inline void s3c6400_default_sdhci2(void)
 #ifdef CONFIG_S3C_DEV_HSMMC2
 	s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
 	s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
-	s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
 #endif
 }
 
-extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
-					 void __iomem *r,
-					 struct mmc_ios *ios,
-					 struct mmc_card *card);
-
 static inline void s3c6410_default_sdhci0(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC
 	s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
 	s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
-	s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
 #endif
 }
 

@@ -216,7 +187,6 @@ static inline void s3c6410_default_sdhci1(void)
 #ifdef CONFIG_S3C_DEV_HSMMC1
 	s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
 	s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
-	s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
 #endif
 }
 

@@ -225,7 +195,6 @@ static inline void s3c6410_default_sdhci2(void)
 #ifdef CONFIG_S3C_DEV_HSMMC2
 	s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
 	s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
-	s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
 #endif
 }
 

@@ -244,17 +213,11 @@ static inline void s3c6400_default_sdhci2(void) { }
 #ifdef CONFIG_S5PC100_SETUP_SDHCI
 extern char *s5pc100_hsmmc_clksrcs[4];
 
-extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev,
-					   void __iomem *r,
-					   struct mmc_ios *ios,
-					   struct mmc_card *card);
-
 static inline void s5pc100_default_sdhci0(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC
 	s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
 	s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio;
-	s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
 #endif
 }
 

@@ -263,7 +226,6 @@ static inline void s5pc100_default_sdhci1(void)
 #ifdef CONFIG_S3C_DEV_HSMMC1
 	s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
 	s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio;
-	s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
 #endif
 }
 

@@ -272,7 +234,6 @@ static inline void s5pc100_default_sdhci2(void)
 #ifdef CONFIG_S3C_DEV_HSMMC2
 	s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
 	s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio;
-	s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
 #endif
 }
 

@@ -288,17 +249,11 @@ static inline void s5pc100_default_sdhci2(void) { }
 #ifdef CONFIG_S5PV210_SETUP_SDHCI
 extern char *s5pv210_hsmmc_clksrcs[4];
 
-extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
-					   void __iomem *r,
-					   struct mmc_ios *ios,
-					   struct mmc_card *card);
-
 static inline void s5pv210_default_sdhci0(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC
 	s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
 	s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio;
-	s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
 #endif
 }
 

@@ -307,7 +262,6 @@ static inline void s5pv210_default_sdhci1(void)
 #ifdef CONFIG_S3C_DEV_HSMMC1
 	s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
 	s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio;
-	s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
 #endif
 }
 

@@ -316,7 +270,6 @@ static inline void s5pv210_default_sdhci2(void)
 #ifdef CONFIG_S3C_DEV_HSMMC2
 	s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
 	s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio;
-	s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
 #endif
 }
 

@@ -325,7 +278,6 @@ static inline void s5pv210_default_sdhci3(void)
 #ifdef CONFIG_S3C_DEV_HSMMC3
 	s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
 	s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
-	s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
 #endif
 }
 

@@ -341,17 +293,11 @@ static inline void s5pv210_default_sdhci3(void) { }
 #ifdef CONFIG_EXYNOS4_SETUP_SDHCI
 extern char *exynos4_hsmmc_clksrcs[4];
 
-extern void exynos4_setup_sdhci_cfg_card(struct platform_device *dev,
-					   void __iomem *r,
-					   struct mmc_ios *ios,
-					   struct mmc_card *card);
-
 static inline void exynos4_default_sdhci0(void)
 {
 #ifdef CONFIG_S3C_DEV_HSMMC
 	s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs;
 	s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio;
-	s3c_hsmmc0_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card;
 #endif
 }
 

@@ -360,7 +306,6 @@ static inline void exynos4_default_sdhci1(void)
 #ifdef CONFIG_S3C_DEV_HSMMC1
 	s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs;
 	s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio;
-	s3c_hsmmc1_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card;
 #endif
 }
 

@@ -369,7 +314,6 @@ static inline void exynos4_default_sdhci2(void)
 #ifdef CONFIG_S3C_DEV_HSMMC2
 	s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs;
 	s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio;
-	s3c_hsmmc2_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card;
 #endif
 }
 

@@ -378,7 +322,6 @@ static inline void exynos4_default_sdhci3(void)
 #ifdef CONFIG_S3C_DEV_HSMMC3
 	s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs;
 	s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio;
-	s3c_hsmmc3_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card;
 #endif
 }
 
--
Quoted 1 line

1.6.6.rc2

Hi Thomas,

The arch/arm/plat-samsung/dev-hsmmcX.c files have been changed due to commit 61e62fcb ("ARM: SAMSUNG: Consolidate common function to set SDHCI plat data"). So if possible please make your patch based on latest my for-next :)

If any problems, please let me know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

author
#4 lore raw

PATCH 2/2 arm: samsung: remove sdhci default configuration setup platform helper

Dear Mr. Kim,

Quoted 22 lines · Kukjin Kim
Quoted 8 lines · Thomas Abraham

The sdhci platform helper function that sets up the default controller configuration is removed for all Samsung platforms since such default controller configuration can be handled by the driver.

Cc Ben Dooks <[email protected]>
Signed-off-by Thomas Abraham <[email protected]>

---

Quoted 10 lines
?arch/arm/mach-exynos4/setup-sdhci.c ? ? ? ?| ? 47 -----------------------
?arch/arm/mach-s3c2416/setup-sdhci.c ? ? ? ?| ? 37 ------------------
?arch/arm/mach-s3c64xx/setup-sdhci.c ? ? ? ?| ? 48 -----------------------
?arch/arm/mach-s5pc100/setup-sdhci.c ? ? ? ?| ? 42 --------------------
?arch/arm/mach-s5pv210/setup-sdhci.c ? ? ? ?| ? 41 --------------------
?arch/arm/plat-samsung/dev-hsmmc.c ? ? ? ? ?| ? ?2 -
?arch/arm/plat-samsung/dev-hsmmc1.c ? ? ? ? | ? ?2 -
?arch/arm/plat-samsung/dev-hsmmc2.c ? ? ? ? | ? ?2 -
?arch/arm/plat-samsung/dev-hsmmc3.c ? ? ? ? | ? ?2 -
?arch/arm/plat-samsung/include/plat/sdhci.h | ? 57

----------------------------

Quoted 2 lines

?10 files changed, 0 insertions(+), 280 deletions(-)

[...]

Quoted 6 lines

Hi Thomas,

The arch/arm/plat-samsung/dev-hsmmcX.c files have been changed due to commit 61e62fcb ("ARM: SAMSUNG: Consolidate common function to set SDHCI plat data"). So if possible please make your patch based on latest my for-next :)

Sure. I will base these patches on your for-next, test and resubmit.

Thanks,
Thomas.

Quoted 12 lines

If any problems, please let me know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

#5 lore raw

PATCH 2/2 arm: samsung: remove sdhci default configuration setup platform helper

Quoted 14 lines · Thomas Abraham

Dear Mr. Kim,

Quoted 10 lines · Kukjin Kim
Quoted 9 lines · Thomas Abraham

The sdhci platform helper function that sets up the default controller configuration is removed for all Samsung platforms since such default controller configuration can be handled by the driver.

Cc Ben Dooks <[email protected]>
Signed-off-by Thomas Abraham <[email protected]>

---
?arch/arm/mach-exynos4/setup-sdhci.c ? ? ? ?| ? 47

-----------------------

Quoted 2 lines
Quoted 2 lines
Quoted 2 lines

?arch/arm/mach-s3c2416/setup-sdhci.c ? ? ? ?| ? 37 ------------------ ?arch/arm/mach-s3c64xx/setup-sdhci.c ? ? ? ?| ? 48

-----------------------

Quoted 11 lines
Quoted 10 lines
Quoted 7 lines
?arch/arm/mach-s5pc100/setup-sdhci.c ? ? ? ?| ? 42 --------------------
?arch/arm/mach-s5pv210/setup-sdhci.c ? ? ? ?| ? 41 --------------------
?arch/arm/plat-samsung/dev-hsmmc.c ? ? ? ? ?| ? ?2 -
?arch/arm/plat-samsung/dev-hsmmc1.c ? ? ? ? | ? ?2 -
?arch/arm/plat-samsung/dev-hsmmc2.c ? ? ? ? | ? ?2 -
?arch/arm/plat-samsung/dev-hsmmc3.c ? ? ? ? | ? ?2 -
?arch/arm/plat-samsung/include/plat/sdhci.h | ? 57

----------------------------

Quoted 2 lines

?10 files changed, 0 insertions(+), 280 deletions(-)

Quoted 9 lines

[...]

Quoted 4 lines

Hi Thomas,

The arch/arm/plat-samsung/dev-hsmmcX.c files have been changed due to

commit

Quoted 2 lines

61e62fcb ("ARM: SAMSUNG: Consolidate common function to set SDHCI plat data"). So if possible please make your patch based on latest my

for-next :)

Quoted 3 lines

Sure. I will base these patches on your for-next, test and resubmit.

Hi Thomas,

I missed? I didn't get your updated yet.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

maintainer
#6 lore raw

PATCH 1/2 mmc: sdhci-s3c: add default controller configuration

In reply to Thomas Abraham

Hi Thomas.

I have some question. This patch looks good.
Some names are used S3C_SDHCI_xxxx. but some names are used S3C64XX_SDHCI_xxxx. Do you know what differ them?

Thanks,
Jaehoon Chung

Quoted 48 lines · Thomas Abraham

The default controller configuration which was previously setup by platform helper functions is moved into the driver.

Cc Ben Dooks <[email protected]>
Signed-off-by Thomas Abraham <[email protected]>
---
 drivers/mmc/host/sdhci-s3c.c |   28 +++++++++++++++++-----------
 1 files changed, 17 insertions(+), 11 deletions(-)
drivers/mmc/host/sdhci-s3c.c +17 -11
index 2bd7bf4..d891682 100644
@@ -203,17 +203,23 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
 		writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
 	}
 
-	/* reconfigure the hardware for new clock rate */
-
-	{
-		struct mmc_ios ios;
-
-		ios.clock = clock;
-
-		if (ourhost->pdata->cfg_card)
-			(ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr,
-						   &ios, NULL);
-	}
+	/* reprogram default hardware configuration */
+	writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
+		host->ioaddr + S3C64XX_SDHCI_CONTROL4);
+
+	ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
+	ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
+		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
+		  S3C_SDHCI_CTRL2_ENFBCLKRX |
+		  S3C_SDHCI_CTRL2_DFCNT_NONE |
+		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
+	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
+
+	/* reconfigure the controller for new clock rate */
+	ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
+	if (clock < 25 * 1000000)
+		ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);
+	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
 }
 
 /**
author
#7 lore raw

PATCH 1/2 mmc: sdhci-s3c: add default controller configuration

Hi Jaehoon,

Quoted 5 lines · Jaehoon Chung

Hi Thomas.

I have some question. This patch looks good.
Some names are used S3C_SDHCI_xxxx. but some names are used S3C64XX_SDHCI_xxxx. Do you know what differ them?

I am not sure why there are S3C_SDHCI_xxx and S3C64XX_SDHCI_xxx macros. This patch reused the existing macros from regs-sdhci.h file. It should be possible to rename S3C64XX_SDHCI_xxx to S3C_SDHCI_xxx.

Thanks,
Thomas.

Quoted 4 lines

Thanks,
Jaehoon Chung

[...]

#8 lore raw

PATCH 1/2 mmc: sdhci-s3c: add default controller configuration

In reply to Thomas Abraham

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host

Quoted 15 lines · Thomas Abraham

The default controller configuration which was previously setup by platform helper functions is moved into the driver.

Cc Ben Dooks <[email protected]>
Signed-off-by Thomas Abraham <[email protected]>
---
 drivers/mmc/host/sdhci-s3c.c |   28 +++++++++++++++++-----------
 1 files changed, 17 insertions(+), 11 deletions(-)
drivers/mmc/host/sdhci-s3c.c +0 -0
index 2bd7bf4..d891682 100644
@@ -203,17 +203,23 @@ static void sdhci_s3c_set_clock(struct sdhci_host

*host,

Quoted 9 lines
drivers/mmc/host/sdhci-s3c.c +0 -5
 unsigned int clock)
 		writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
 	}
 
-	/* reconfigure the hardware for new clock rate */
-
-	{
-		struct mmc_ios ios;
-

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) · line 208

Quoted 10 lines
drivers/mmc/host/sdhci-s3c.c +3 -6
-		ios.clock = clock;
-
-		if (ourhost->pdata->cfg_card)
-			(ourhost->pdata->cfg_card)(ourhost->pdev, host-
 >ioaddr,
-						   &ios, NULL);
-	}
+	/* reprogram default hardware configuration */
+	writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
+		host->ioaddr + S3C64XX_SDHCI_CONTROL4);

Since there are above codes on only S5PC100 and S5PV210, I'm not sure above is needed on other Samsung SoCs.

I need to sort out checking.

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) · line 210

Quoted 2 lines
drivers/mmc/host/sdhci-s3c.c +2 -0
+
+	ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);

+ ctrl &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; ?

Quoted 15 lines
drivers/mmc/host/sdhci-s3c.c +12 -0
+	ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
+		  S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
+		  S3C_SDHCI_CTRL2_ENFBCLKRX |
+		  S3C_SDHCI_CTRL2_DFCNT_NONE |
+		  S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
+	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
+
+	/* reconfigure the controller for new clock rate */
+	ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
+	if (clock < 25 * 1000000)
+		ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 |
 S3C_SDHCI_CTRL3_FCSEL2);
+	writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);

}

Quoted 2 lines

/**
--

Basically, it's good to move common codes and to remove that. But I'm not sure we don't _really_ need to keep SoC specific control function such as cfg_card().

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.

author
#9 lore raw

PATCH 1/2 mmc: sdhci-s3c: add default controller configuration

Dear Mr. Kim,

Quoted 37 lines · Kukjin Kim

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host

Quoted 15 lines · Thomas Abraham

The default controller configuration which was previously setup by platform helper functions is moved into the driver.

Cc Ben Dooks <[email protected]>
Signed-off-by Thomas Abraham <[email protected]>

---
?drivers/mmc/host/sdhci-s3c.c | ? 28 +++++++++++++++++----------- ?1 files changed, 17 insertions(+), 11 deletions(-)

drivers/mmc/host/sdhci-s3c.c +0 -0
index 2bd7bf4..d891682 100644
@@ -203,17 +203,23 @@ static void sdhci_s3c_set_clock(struct sdhci_host

*host,

Quoted 9 lines
drivers/mmc/host/sdhci-s3c.c +0 -5
 unsigned int clock)
 ? ? ? ? ? ? ? writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
 ? ? ? }
 
- ? ? /* reconfigure the hardware for new clock rate */
-
- ? ? {
- ? ? ? ? ? ? struct mmc_ios ios;
-

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host · line 210

Quoted 10 lines
drivers/mmc/host/sdhci-s3c.c +3 -6
- ? ? ? ? ? ? ios.clock = clock;
-
- ? ? ? ? ? ? if (ourhost->pdata->cfg_card)
- ? ? ? ? ? ? ? ? ? ? (ourhost->pdata->cfg_card)(ourhost->pdev, host-
 >ioaddr,
- ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?&ios, NULL);
- ? ? }
+ ? ? /* reprogram default hardware configuration */
+ ? ? writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
+ ? ? ? ? ? ? host->ioaddr + S3C64XX_SDHCI_CONTROL4);
Quoted 4 lines

Since there are above codes on only S5PC100 and S5PV210, I'm not sure above is needed on other Samsung SoCs.

I need to sort out checking.

s3c6410, s5p6440, s5p6450 and s5pc110 SoC's include support for clock out pad driver strength. All other SoC's do not use and list the two bits as reserved. I do not know if there is any problem writing to these reserved bits. But I have tested this patch on all the boards that do not support this feature and it did not break anything.

Quoted 21 lines

drivers/mmc/host/sdhci-s3c.c static void sdhci_s3c_set_clock(struct sdhci_host · line 212

Quoted 3 lines
drivers/mmc/host/sdhci-s3c.c +2 -0
+
+ ? ? ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);

+ ? ? ? ctrl &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; ?

Quoted 15 lines
drivers/mmc/host/sdhci-s3c.c +12 -0
+ ? ? ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
+ ? ? ? ? ? ? ? S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
+ ? ? ? ? ? ? ? S3C_SDHCI_CTRL2_ENFBCLKRX |
+ ? ? ? ? ? ? ? S3C_SDHCI_CTRL2_DFCNT_NONE |
+ ? ? ? ? ? ? ? S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
+ ? ? writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
+
+ ? ? /* reconfigure the controller for new clock rate */
+ ? ? ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
+ ? ? if (clock < 25 * 1000000)
+ ? ? ? ? ? ? ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 |
 S3C_SDHCI_CTRL3_FCSEL2);
+ ? ? writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);

?}

Quoted 6 lines
Quoted 2 lines

?/**
--

Basically, it's good to move common codes and to remove that. But I'm not sure we don't _really_ need to keep SoC specific control function such as cfg_card().

The existing cfg_card callback functions have the same functionality except for setting the clock out drive strength on those SoC's which do not support this feature. If writing to those reserved bits does not cause any issues, then the cfg_card function can be made common to all Samsung SoC's.

Since the functionality of cfg_card callback is SoC specific and not board specific, there is another way of doing this. The id_table member could be added to the platform_driver structure in sdhci-s3c driver. Each SoC platform code could set the name of the sdhci device during initialization and there could be SoC specific cfg_card functions included in the sdhci-s3c driver itself. This would be required only if there is a problem by writing to the reserved bits in control4 register. But testing does not show any issues writing to these reserved bits.

The main intention of moving the cfg_card function from platform code to driver code is to remove the callback function pointer from the sdhci driver platform data which is very important to get full device tree support for sdhci-s3c driver.

Thanks for your review and comments.

Regards,
Thomas.

Quoted 10 lines

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd.