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Bottleneck of NAND copy speed

U-Boot Simon Schwarz 4 participants 6 messages Sep 12, 2011 – Sep 13, 2011

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#0 lore raw

Hi List,

ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in my SPL.

I?m searching for the speed bottleneck of the MT29F1G16ABBHC-ET NAND-Flash on the devkit8000 (OMAP3).

From the timings I set on the GPMC I calced a max. speed of around 26
MiB/s. In my measurements I have a speed of around 10 MiB/s.

Here is the image of my the calculation:
https://docs.google.com/leaf?id=0B_wpO5K0MQSlYTcxMWVlOGEtY2FmYy00ODMyLWE1MTUtN2ZiZGViOWVhMzYw&hl=en_US

tcmd: The time for the initial read command
twr: time to write the address
tDn: Time for a 16bit read of Data

Does anyone has an idea where the bottleneck could be? Is my calculation wrong?
(ecc is done parallel to the DMA transfer).

Regards
Simon

#1 lore raw

Dear Simon Schwarz,

Quoted 3 lines · In message <[email protected]> you wrote:

ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in my SPL.

...

Quoted 2 lines

Does anyone has an idea where the bottleneck could be? Is my calculation wrong?

Caches still turned off?

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"Anyone attempting to generate random numbers by deterministic  means
is, of course, living in a state of sin."          - John Von Neumann
#2 lore raw

Dear Wolfgang,

caches are on.

Regards
Simon

Quoted 16 lines · Wolfgang Denk

Dear Simon Schwarz,

Quoted 3 lines · In message<[email protected]> you wrote:

ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in my SPL.

...

Quoted 2 lines

Does anyone has an idea where the bottleneck could be? Is my calculation wrong?

Caches still turned off?

Best regards,

Wolfgang Denk

#3 lore raw
In reply to Simon Schwarz
Quoted 14 lines · Simon Schwarz

Hi List,

ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in my SPL.

I?m searching for the speed bottleneck of the MT29F1G16ABBHC-ET NAND-Flash on the devkit8000 (OMAP3).

From the timings I set on the GPMC I calced a max. speed of around 26
MiB/s. In my measurements I have a speed of around 10 MiB/s.

Here is the image of my the calculation:
https://docs.google.com/leaf?id=0B_wpO5K0MQSlYTcxMWVlOGEtY2FmYy00ODMyLWE1MTUtN2ZiZGViOWVhMzYw&hl=en_US

Quoted 7 lines

tcmd: The time for the initial read command
twr: time to write the address
tDn: Time for a 16bit read of Data

Does anyone has an idea where the bottleneck could be? Is my calculation wrong?
(ecc is done parallel to the DMA transfer).

I only had a quick look at your calculation, but didn't notice anything to account for the NAND copy to read cache (data ready) time of the NAND device.

Nick.

#4 lore raw
Quoted 19 lines · Nick Thompson
Quoted 18 lines · Simon Schwarz

Hi List,

ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in my SPL.

I?m searching for the speed bottleneck of the MT29F1G16ABBHC-ET NAND-Flash on the devkit8000 (OMAP3).

From the timings I set on the GPMC I calced a max. speed of around 26
MiB/s. In my measurements I have a speed of around 10 MiB/s.

Here is the image of my the calculation:
https://docs.google.com/leaf?id=0B_wpO5K0MQSlYTcxMWVlOGEtY2FmYy00ODMyLWE1MTUtN2ZiZGViOWVhMzYw&hl=en_US

tcmd: The time for the initial read command
twr: time to write the address
tDn: Time for a 16bit read of Data

Quoted 8 lines
Quoted 3 lines

Does anyone has an idea where the bottleneck could be? Is my calculation wrong?
(ecc is done parallel to the DMA transfer).

I only had a quick look at your calculation, but didn't notice anything to account for the NAND copy to read cache (data ready) time of the NAND device.

Nick.

Ahh you mean t_R (Page read time) right?

Taking this into account I would expect something around 19,45 MiB/s.

Thank you!
Simon

#5 lore raw
In reply to Simon Schwarz
Quoted 14 lines · Simon Schwarz

Hi List,

ATM I'm working on a DMA transfer from NAND to RAM of the Linux-image in my SPL.

I?m searching for the speed bottleneck of the MT29F1G16ABBHC-ET NAND-Flash on the devkit8000 (OMAP3).

From the timings I set on the GPMC I calced a max. speed of around 26
MiB/s. In my measurements I have a speed of around 10 MiB/s.

Here is the image of my the calculation:
https://docs.google.com/leaf?id=0B_wpO5K0MQSlYTcxMWVlOGEtY2FmYy00ODMyLWE1MTUtN2ZiZGViOWVhMzYw&hl=en_US

Quoted 7 lines

tcmd: The time for the initial read command
twr: time to write the address
tDn: Time for a 16bit read of Data

Does anyone has an idea where the bottleneck could be? Is my calculation wrong?
(ecc is done parallel to the DMA transfer).

Have you measured how much time is taken in software between each operation -- time when the NAND chip is idle and software is either processing the results of the last transaction or preparing for the next one?

-Scott