OMAP2+: id: cleanup for 3.2

PATCH Superseded Paul Walmsley 2 participants 14 messages Sep 13, 2011 – Sep 14, 2011

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Arm (32-bit) Arm sub-architectures OMAP2+ support

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Paul Walmsley

author

2011-09-13 21:28 UTC #0 lore raw

cover OMAP2+: id: cleanup for 3.2

Clean up the SoC detection code for some OMAP3 devices. The main goal is to make the AM3517 family detection code work like the rest of the OMAP3 SoCs, although this series does some other cleanup of this code at the same time. This patch series will be a prerequisite for the OMAP_CHIP removal series.

Tested on an OMAP3530ES2 BeagleBoard C2 and a OMAP3730ES1 BeagleBoard A2. These are the only OMAP3 boards I have access to right now - testing welcomed from people with other OMAP3 families or ES levels.

- Paul

---

Paul Walmsley (6):
OMAP3: id: remove identification codes that only correspond to marketing names
OMAP3: id: remove useless strcpy()s
OMAP3: id: use explicit omap_revision codes for 3505/3517 ES levels
OMAP3: id: add fallthrough warning; fix some CodingStyle issues
OMAP3: id: remove duplicate code for testing SoC ES level OMAP2+: id: remove OMAP_REVBITS_* macros

 arch/arm/mach-omap2/id.c              |  134 ++++++++++++---------------------
 arch/arm/plat-omap/include/plat/cpu.h |   41 +++-------
 2 files changed, 62 insertions(+), 113 deletions(-)

Paul Walmsley

author

2011-09-13 21:28 UTC #1 lore raw

PATCH 1/6 OMAP3: id: remove identification codes that only correspond to marketing names

The OMAP3505/AM3505 appears to be based on the same silicon as the OMAP3517/AM3517, with some features disabled via eFuse bits. Follow the same practice as OMAP3430 and identify these devices internally as part of the OMAP3517/AM3517 family.

The OMAP3503/3515/3525/3530 chips appear to be based on the same silicon as the OMAP3430, with some features disabled via eFuse bits. Identify these devices internally as part of the OMAP3430 family.

Remove the old OMAP35XX_CLASS, which actually covered two very different chip families. The OMAP3503/3515/3525/3530 chips will now be covered by OMAP343X_CLASS, since the silicon appears to be identical. For the OMAP3517/AM3517 family, create a new class, OMAP3517_CLASS.

Signed-off-by Paul Walmsley <[email protected]>

Cc Sanjeev Premi <[email protected]>

---
 arch/arm/mach-omap2/id.c              |   17 ++++++-----------
 arch/arm/plat-omap/include/plat/cpu.h |    9 ++-------
 2 files changed, 8 insertions(+), 18 deletions(-)

arch/arm/mach-omap2/id.c +6 ~~-11~~

index 37efb86..723e2f8 100644
@@ -304,14 +304,15 @@ static void __init omap3_check_revision(void)
 		}
 		break;
 	case 0xb868:
-		/* Handle OMAP35xx/AM35xx devices
+		/*
+		 * Handle OMAP/AM 3505/3517 devices
 		 *
-		 * Set the device to be OMAP3505 here. Actual device
+		 * Set the device to be OMAP3517 here. Actual device
 		 * is identified later based on the features.
 		 *
 		 * REVISIT: AM3505/AM3517 should have their own CHIP_IS
 		 */
-		omap_revision = OMAP3505_REV(rev);
+		omap_revision = OMAP3517_REV(rev);
 		omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 		break;
 	case 0xb891:

@@ -442,26 +443,20 @@ static void __init omap3_cpuinfo(void)
 		/*
 		 * AM35xx devices
 		 */
-		if (omap3_has_sgx()) {
-			omap_revision = OMAP3517_REV(rev);
+		if (omap3_has_sgx())
 			strcpy(cpu_name, "AM3517");
-		} else {
-			/* Already set in omap3_check_revision() */
+		else
 			strcpy(cpu_name, "AM3505");
-		}
 	} else if (cpu_is_ti816x()) {
 		strcpy(cpu_name, "TI816X");
 	} else if (omap3_has_iva() && omap3_has_sgx()) {
 		/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
 		strcpy(cpu_name, "OMAP3430/3530");
 	} else if (omap3_has_iva()) {
-		omap_revision = OMAP3525_REV(rev);
 		strcpy(cpu_name, "OMAP3525");
 	} else if (omap3_has_sgx()) {
-		omap_revision = OMAP3515_REV(rev);
 		strcpy(cpu_name, "OMAP3515");
 	} else {
-		omap_revision = OMAP3503_REV(rev);
 		strcpy(cpu_name, "OMAP3503");
 	}

arch/arm/plat-omap/include/plat/cpu.h +2 -7

index 67b3d75..b6bd8f7 100644
@@ -397,13 +397,8 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define OMAP3630_REV_ES1_1	(OMAP363X_CLASS | (OMAP_REVBITS_01 << 8))
 #define OMAP3630_REV_ES1_2	(OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
 
-#define OMAP35XX_CLASS		0x35000034
-#define OMAP3503_REV(v)		(OMAP35XX_CLASS | (0x3503 << 16) | (v << 8))
-#define OMAP3515_REV(v)		(OMAP35XX_CLASS | (0x3515 << 16) | (v << 8))
-#define OMAP3525_REV(v)		(OMAP35XX_CLASS | (0x3525 << 16) | (v << 8))
-#define OMAP3530_REV(v)		(OMAP35XX_CLASS | (0x3530 << 16) | (v << 8))
-#define OMAP3505_REV(v)		(OMAP35XX_CLASS | (0x3505 << 16) | (v << 8))
-#define OMAP3517_REV(v)		(OMAP35XX_CLASS | (0x3517 << 16) | (v << 8))
+#define OMAP3517_CLASS		0x35170000
+#define OMAP3517_REV(v)		(OMAP3517_CLASS | (v << 8))
 
 #define TI816X_CLASS		0x81600034
 #define TI8168_REV_ES1_0	TI816X_CLASS

Paul Walmsley

author

2011-09-14 11:39 UTC #2 lore raw

PATCH v2 1/6 OMAP3: id: remove identification codes that only correspond to marketing names

The OMAP3503/3515/3525/3530 chips appear to be based on the same silicon as the OMAP3430, with some features disabled via eFuse bits. Identify these devices internally as part of the OMAP3430 family.

Thanks to Tony Lindgren <[email protected]> for some help with the second revision of this patch.

Signed-off-by Paul Walmsley <[email protected]>

Cc Sanjeev Premi <[email protected]>

Cc Tony Lindgren <[email protected]>

---

This second version fixes a stupid bug that would have definitely caused problems with the first patch version on AM3517/3505 devices. Still not sure if it works correctly, though, since I don't have an AM3517/3505 board here to test. Testing help very welcome.

 arch/arm/mach-omap2/id.c              |   17 ++++++-----------
 arch/arm/plat-omap/include/plat/cpu.h |   14 +++++---------
 2 files changed, 11 insertions(+), 20 deletions(-)

arch/arm/mach-omap2/id.c +6 ~~-11~~

index 37efb86..723e2f8 100644
@@ -304,14 +304,15 @@ static void __init omap3_check_revision(void)
 		}
 		break;
 	case 0xb868:
-		/* Handle OMAP35xx/AM35xx devices
+		/*
+		 * Handle OMAP/AM 3505/3517 devices
 		 *
-		 * Set the device to be OMAP3505 here. Actual device
+		 * Set the device to be OMAP3517 here. Actual device
 		 * is identified later based on the features.
 		 *
 		 * REVISIT: AM3505/AM3517 should have their own CHIP_IS
 		 */
-		omap_revision = OMAP3505_REV(rev);
+		omap_revision = OMAP3517_REV(rev);
 		omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 		break;
 	case 0xb891:

@@ -442,26 +443,20 @@ static void __init omap3_cpuinfo(void)
 		/*
 		 * AM35xx devices
 		 */
-		if (omap3_has_sgx()) {
-			omap_revision = OMAP3517_REV(rev);
+		if (omap3_has_sgx())
 			strcpy(cpu_name, "AM3517");
-		} else {
-			/* Already set in omap3_check_revision() */
+		else
 			strcpy(cpu_name, "AM3505");
-		}
 	} else if (cpu_is_ti816x()) {
 		strcpy(cpu_name, "TI816X");
 	} else if (omap3_has_iva() && omap3_has_sgx()) {
 		/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
 		strcpy(cpu_name, "OMAP3430/3530");
 	} else if (omap3_has_iva()) {
-		omap_revision = OMAP3525_REV(rev);
 		strcpy(cpu_name, "OMAP3525");
 	} else if (omap3_has_sgx()) {
-		omap_revision = OMAP3515_REV(rev);
 		strcpy(cpu_name, "OMAP3515");
 	} else {
-		omap_revision = OMAP3503_REV(rev);
 		strcpy(cpu_name, "OMAP3503");
 	}

arch/arm/plat-omap/include/plat/cpu.h +5 -9

index 67b3d75..34df171 100644
@@ -262,7 +262,7 @@ IS_OMAP_TYPE(2422, 0x2422)
 IS_OMAP_TYPE(2423, 0x2423)
 IS_OMAP_TYPE(2430, 0x2430)
 IS_OMAP_TYPE(3430, 0x3430)
-IS_OMAP_TYPE(3505, 0x3505)
+IS_OMAP_TYPE(3505, 0x3517)
 IS_OMAP_TYPE(3517, 0x3517)
 
 #define cpu_is_omap310()		0

@@ -354,8 +354,9 @@ IS_OMAP_TYPE(3517, 0x3517)
 						(!omap3_has_sgx()) &&	\
 						(omap3_has_iva()))
 # define cpu_is_omap3530()		(cpu_is_omap3430())
-# define cpu_is_omap3505()		is_omap3505()
 # define cpu_is_omap3517()		is_omap3517()
+# define cpu_is_omap3505()		(cpu_is_omap3517() &&		\
+						!omap3_has_sgx())
 # undef cpu_is_omap3630
 # define cpu_is_omap3630()		is_omap363x()
 # define cpu_is_ti816x()		is_ti816x()

@@ -397,13 +398,8 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define OMAP3630_REV_ES1_1	(OMAP363X_CLASS | (OMAP_REVBITS_01 << 8))
 #define OMAP3630_REV_ES1_2	(OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
 
-#define OMAP35XX_CLASS		0x35000034
-#define OMAP3503_REV(v)		(OMAP35XX_CLASS | (0x3503 << 16) | (v << 8))
-#define OMAP3515_REV(v)		(OMAP35XX_CLASS | (0x3515 << 16) | (v << 8))
-#define OMAP3525_REV(v)		(OMAP35XX_CLASS | (0x3525 << 16) | (v << 8))
-#define OMAP3530_REV(v)		(OMAP35XX_CLASS | (0x3530 << 16) | (v << 8))
-#define OMAP3505_REV(v)		(OMAP35XX_CLASS | (0x3505 << 16) | (v << 8))
-#define OMAP3517_REV(v)		(OMAP35XX_CLASS | (0x3517 << 16) | (v << 8))
+#define OMAP3517_CLASS		0x35170034
+#define OMAP3517_REV(v)		(OMAP3517_CLASS | (v << 8))
 
 #define TI816X_CLASS		0x81600034
 #define TI8168_REV_ES1_0	TI816X_CLASS

Signature · 1 line

1.7.5.4

Paul Walmsley

author

2011-09-13 21:28 UTC #3 lore raw

PATCH 2/6 OMAP3: id: remove useless strcpy()s

In reply to Paul Walmsley

omap3_cpuinfo() is filled with useless strcpy() calls; remove them.

Signed-off-by Paul Walmsley <[email protected]>

Cc Sanjeev Premi <[email protected]>

---
 arch/arm/mach-omap2/id.c |   48 +++++++++++++++++++++-------------------------
 1 files changed, 22 insertions(+), 26 deletions(-)

arch/arm/mach-omap2/id.c +22 ~~-26~~

index 723e2f8..46bc2f9 100644
@@ -429,84 +429,80 @@ static void __init omap4_check_revision(void)
 static void __init omap3_cpuinfo(void)
 {
 	u8 rev = GET_OMAP_REVISION();
-	char cpu_name[16], cpu_rev[16];
+	const char *cpu_name, *cpu_rev;
 
-	/* OMAP3430 and OMAP3530 are assumed to be same.
+	/*
+	 * OMAP3430 and OMAP3530 are assumed to be same.
 	 *
 	 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
 	 * on available features. Upon detection, update the CPU id
 	 * and CPU class bits.
 	 */
 	if (cpu_is_omap3630()) {
-		strcpy(cpu_name, "OMAP3630");
+		cpu_name = "OMAP3630";
 	} else if (cpu_is_omap3505()) {
-		/*
-		 * AM35xx devices
-		 */
-		if (omap3_has_sgx())
-			strcpy(cpu_name, "AM3517");
-		else
-			strcpy(cpu_name, "AM3505");
+		/* AM35xx devices */
+		cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
 	} else if (cpu_is_ti816x()) {
-		strcpy(cpu_name, "TI816X");
+		cpu_name = "TI816X";
 	} else if (omap3_has_iva() && omap3_has_sgx()) {
 		/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
-		strcpy(cpu_name, "OMAP3430/3530");
+		cpu_name = "OMAP3430/3530";
 	} else if (omap3_has_iva()) {
-		strcpy(cpu_name, "OMAP3525");
+		cpu_name = "OMAP3525";
 	} else if (omap3_has_sgx()) {
-		strcpy(cpu_name, "OMAP3515");
+		cpu_name = "OMAP3515";
 	} else {
-		strcpy(cpu_name, "OMAP3503");
+		cpu_name = "OMAP3503";
 	}
 
 	if (cpu_is_omap3630() || cpu_is_ti816x()) {
 		switch (rev) {
 		case OMAP_REVBITS_00:
-			strcpy(cpu_rev, "1.0");
+			cpu_rev = "1.0";
 			break;
 		case OMAP_REVBITS_01:
-			strcpy(cpu_rev, "1.1");
+			cpu_rev = "1.1";
 			break;
 		case OMAP_REVBITS_02:
 			/* FALLTHROUGH */
 		default:
 			/* Use the latest known revision as default */
-			strcpy(cpu_rev, "1.2");
+			cpu_rev = "1.2";
 		}
 	} else if (cpu_is_omap3505() || cpu_is_omap3517()) {
 		switch (rev) {
 		case OMAP_REVBITS_00:
-			strcpy(cpu_rev, "1.0");
+			cpu_rev = "1.0";
 			break;
 		case OMAP_REVBITS_01:
 			/* FALLTHROUGH */
 		default:
 			/* Use the latest known revision as default */
-			strcpy(cpu_rev, "1.1");
+			cpu_rev = "1.1";
 		}
 	} else {
 		switch (rev) {
 		case OMAP_REVBITS_00:
-			strcpy(cpu_rev, "1.0");
+			cpu_rev = "1.0";
 			break;
 		case OMAP_REVBITS_01:
-			strcpy(cpu_rev, "2.0");
+			cpu_rev = "2.0";
 			break;
 		case OMAP_REVBITS_02:
-			strcpy(cpu_rev, "2.1");
+			cpu_rev = "2.1";
 			break;
 		case OMAP_REVBITS_03:
-			strcpy(cpu_rev, "3.0");
+			cpu_rev = "3.0";
 			break;
 		case OMAP_REVBITS_04:
-			strcpy(cpu_rev, "3.1");
+			cpu_rev = "3.1";
 			break;
 		case OMAP_REVBITS_05:
 			/* FALLTHROUGH */
 		default:
 			/* Use the latest known revision as default */
-			strcpy(cpu_rev, "3.1.2");
+			cpu_rev = "3.1.2";
 		}
 	}

Paul Walmsley

author

2011-09-13 21:28 UTC #4 lore raw

PATCH 3/6 OMAP3: id: use explicit omap_revision codes for 3505/3517 ES levels

In reply to Paul Walmsley

Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest of the OMAP2+ SoCs do in mach-omap2/cpu.c.

Signed-off-by Paul Walmsley <[email protected]>

Cc Sanjeev Premi <[email protected]>

---
 arch/arm/mach-omap2/id.c              |   10 +++++++++-
 arch/arm/plat-omap/include/plat/cpu.h |    3 ++-
 2 files changed, 11 insertions(+), 2 deletions(-)

arch/arm/mach-omap2/id.c +9 -1

index 46bc2f9..6810c52 100644
@@ -312,7 +312,15 @@ static void __init omap3_check_revision(void)
 		 *
 		 * REVISIT: AM3505/AM3517 should have their own CHIP_IS
 		 */
-		omap_revision = OMAP3517_REV(rev);
+		switch (rev) {
+		case 0:
+			omap_revision = OMAP3517_REV_ES1_0;
+			break;
+		case 1:
+		/* FALLTHROUGH */
+		default:
+			omap_revision = OMAP3517_REV_ES1_1;
+		}
 		omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 		break;
 	case 0xb891:

arch/arm/plat-omap/include/plat/cpu.h +2 -1

index b6bd8f7..566975c 100644
@@ -398,7 +398,8 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define OMAP3630_REV_ES1_2	(OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
 
 #define OMAP3517_CLASS		0x35170000
-#define OMAP3517_REV(v)		(OMAP3517_CLASS | (v << 8))
+#define OMAP3517_REV_ES1_0	OMAP3517_CLASS
+#define OMAP3517_REV_ES1_1	(OMAP3517_CLASS | (OMAP_REVBITS_01 << 8))
 
 #define TI816X_CLASS		0x81600034
 #define TI8168_REV_ES1_0	TI816X_CLASS

Igor Grinberg

2011-09-14 12:23 UTC #5 lore raw

PATCH 3/6 OMAP3: id: use explicit omap_revision codes for 3505/3517 ES levels

Hi Paul,

This patch does not apply, after the v2 of 1_6, see below:

Quoted 36 lines · Paul Walmsley

Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest of the OMAP2+ SoCs do in mach-omap2/cpu.c.

Signed-off-by Paul Walmsley <[email protected]>

Cc Sanjeev Premi <[email protected]>

---
 arch/arm/mach-omap2/id.c              |   10 +++++++++-
 arch/arm/plat-omap/include/plat/cpu.h |    3 ++-
 2 files changed, 11 insertions(+), 2 deletions(-)

arch/arm/mach-omap2/id.c +9 -1

index 46bc2f9..6810c52 100644
@@ -312,7 +312,15 @@ static void __init omap3_check_revision(void)
 		 *
 		 * REVISIT: AM3505/AM3517 should have their own CHIP_IS
 		 */
-		omap_revision = OMAP3517_REV(rev);
+		switch (rev) {
+		case 0:
+			omap_revision = OMAP3517_REV_ES1_0;
+			break;
+		case 1:
+		/* FALLTHROUGH */
+		default:
+			omap_revision = OMAP3517_REV_ES1_1;
+		}
 		omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 		break;
 	case 0xb891:

arch/arm/plat-omap/include/plat/cpu.h +0 -0

index b6bd8f7..566975c 100644

arch/arm/plat-omap/include/plat/cpu.h IS_OMAP_TYPE(3517, 0x3517) · line 400

Quoted 3 lines

arch/arm/plat-omap/include/plat/cpu.h +0 -0

@@ -398,7 +398,8 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define OMAP3630_REV_ES1_2	(OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
 
 #define OMAP3517_CLASS		0x35170000

After applying the v2 of 1_6, the above value should be 0x35170034

Quoted 13 lines

arch/arm/plat-omap/include/plat/cpu.h +2 -2
-#define OMAP3517_REV(v)		(OMAP3517_CLASS | (v << 8))
+#define OMAP3517_REV_ES1_0	OMAP3517_CLASS
+#define OMAP3517_REV_ES1_1	(OMAP3517_CLASS | (OMAP_REVBITS_01 << 8))
 
 #define TI816X_CLASS		0x81600034
 #define TI8168_REV_ES1_0	TI816X_CLASS
 
 
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Signature · 2 lines

Regards,
Igor.

Paul Walmsley

author

2011-09-13 21:28 UTC #6 lore raw

PATCH 4/6 OMAP3: id: add fallthrough warning; fix some CodingStyle issues

In reply to Paul Walmsley

Emit a warning to the console in omap3_check_revision() if that code cannot determine what type of SoC the system is currently running on.

Remove some extra whitespace, remove some duplicate code, and add an appropriate comment to a fallthrough case.

Signed-off-by Paul Walmsley <[email protected]>

Cc Hemant Pedanekar <[email protected]>

---
 arch/arm/mach-omap2/id.c |   11 ++++++-----
 1 files changed, 6 insertions(+), 5 deletions(-)

arch/arm/mach-omap2/id.c +6 -5

index 6810c52..18c3797 100644
@@ -336,8 +336,9 @@ static void __init omap3_check_revision(void)
 			omap_chip.oc |= CHIP_IS_OMAP3630ES1_1;
 			break;
 		case 2:
+		/* FALLTHROUGH */
 		default:
-			omap_revision =  OMAP3630_REV_ES1_2;
+			omap_revision = OMAP3630_REV_ES1_2;
 			omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
 		}
 		break;

@@ -349,16 +350,16 @@ static void __init omap3_check_revision(void)
 			omap_revision = TI8168_REV_ES1_0;
 			break;
 		case 1:
-			omap_revision = TI8168_REV_ES1_1;
-			break;
+		/* FALLTHROUGH */
 		default:
-			omap_revision =  TI8168_REV_ES1_1;
+			omap_revision = TI8168_REV_ES1_1;
 		}
 		break;
 	default:
-		/* Unknown default to latest silicon rev as default*/
+		/* Unknown default to latest silicon rev as default */
 		omap_revision =  OMAP3630_REV_ES1_2;
 		omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
+		pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
 	}
 }

Paul Walmsley

author

2011-09-13 21:28 UTC #7 lore raw

PATCH 5/6 OMAP3: id: remove duplicate code for testing SoC ES level

In reply to Paul Walmsley

omap3_cpuinfo() contains essentially duplicated code from omap3_check_revision(), just for the purpose of determining the chip ES level. Set the cpu_rev char array pointer in omap3_check_revision() instead, and drop the now-useless code from omap3_cpuinfo().

Signed-off-by Paul Walmsley <[email protected]>

---
 arch/arm/mach-omap2/id.c |   80 +++++++++++++---------------------------------
 1 files changed, 23 insertions(+), 57 deletions(-)

arch/arm/mach-omap2/id.c +23 ~~-57~~

index 18c3797..307e186 100644
@@ -242,7 +242,7 @@ static void __init ti816x_check_features(void)
 	omap_features = OMAP3_HAS_NEON;
 }
 
-static void __init omap3_check_revision(void)
+static void __init omap3_check_revision(const char **cpu_rev)
 {
 	u32 cpuid, idcode;
 	u16 hawkeye;

@@ -259,6 +259,7 @@ static void __init omap3_check_revision(void)
 	if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
 		omap_revision = OMAP3430_REV_ES1_0;
 		omap_chip.oc |= CHIP_IS_OMAP3430ES1;
+		*cpu_rev = "1.0";
 		return;
 	}

@@ -280,18 +281,22 @@ static void __init omap3_check_revision(void)
 		case 1:
 			omap_revision = OMAP3430_REV_ES2_0;
 			omap_chip.oc |= CHIP_IS_OMAP3430ES2;
+			*cpu_rev = "2.0";
 			break;
 		case 2:
 			omap_revision = OMAP3430_REV_ES2_1;
 			omap_chip.oc |= CHIP_IS_OMAP3430ES2;
+			*cpu_rev = "2.1";
 			break;
 		case 3:
 			omap_revision = OMAP3430_REV_ES3_0;
 			omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
+			*cpu_rev = "3.0";
 			break;
 		case 4:
 			omap_revision = OMAP3430_REV_ES3_1;
 			omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
+			*cpu_rev = "3.1";
 			break;
 		case 7:
 		/* FALLTHROUGH */

@@ -301,6 +306,7 @@ static void __init omap3_check_revision(void)
 
 			/* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
 			omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
+			*cpu_rev = "3.1.2";
 		}
 		break;
 	case 0xb868:

@@ -315,11 +321,13 @@ static void __init omap3_check_revision(void)
 		switch (rev) {
 		case 0:
 			omap_revision = OMAP3517_REV_ES1_0;
+			*cpu_rev = "1.0";
 			break;
 		case 1:
 		/* FALLTHROUGH */
 		default:
 			omap_revision = OMAP3517_REV_ES1_1;
+			*cpu_rev = "1.1";
 		}
 		omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 		break;

@@ -330,16 +338,19 @@ static void __init omap3_check_revision(void)
 		switch(rev) {
 		case 0: /* Take care of early samples */
 			omap_revision = OMAP3630_REV_ES1_0;
+			*cpu_rev = "1.0";
 			break;
 		case 1:
 			omap_revision = OMAP3630_REV_ES1_1;
 			omap_chip.oc |= CHIP_IS_OMAP3630ES1_1;
+			*cpu_rev = "1.1";
 			break;
 		case 2:
 		/* FALLTHROUGH */
 		default:
 			omap_revision = OMAP3630_REV_ES1_2;
 			omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
+			*cpu_rev = "1.2";
 		}
 		break;
 	case 0xb81e:

@@ -348,17 +359,21 @@ static void __init omap3_check_revision(void)
 		switch (rev) {
 		case 0:
 			omap_revision = TI8168_REV_ES1_0;
+			*cpu_rev = "1.0";
 			break;
 		case 1:
 		/* FALLTHROUGH */
 		default:
 			omap_revision = TI8168_REV_ES1_1;
+			*cpu_rev = "1.1";
+			break;
 		}
 		break;
 	default:
 		/* Unknown default to latest silicon rev as default */
-		omap_revision =  OMAP3630_REV_ES1_2;
+		omap_revision = OMAP3630_REV_ES1_2;
 		omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
+		*cpu_rev = "1.2";
 		pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
 	}
 }

@@ -435,10 +450,9 @@ static void __init omap4_check_revision(void)
 	if (omap3_has_ ##feat())		\
 		printk(#feat" ");
 
-static void __init omap3_cpuinfo(void)
+static void __init omap3_cpuinfo(const char *cpu_rev)
 {
-	u8 rev = GET_OMAP_REVISION();
-	const char *cpu_name, *cpu_rev;
+	const char *cpu_name;
 
 	/*
 	 * OMAP3430 and OMAP3530 are assumed to be same.

@@ -465,56 +479,6 @@ static void __init omap3_cpuinfo(void)
 		cpu_name = "OMAP3503";
 	}
 
-	if (cpu_is_omap3630() || cpu_is_ti816x()) {
-		switch (rev) {
-		case OMAP_REVBITS_00:
-			cpu_rev = "1.0";
-			break;
-		case OMAP_REVBITS_01:
-			cpu_rev = "1.1";
-			break;
-		case OMAP_REVBITS_02:
-			/* FALLTHROUGH */
-		default:
-			/* Use the latest known revision as default */
-			cpu_rev = "1.2";
-		}
-	} else if (cpu_is_omap3505() || cpu_is_omap3517()) {
-		switch (rev) {
-		case OMAP_REVBITS_00:
-			cpu_rev = "1.0";
-			break;
-		case OMAP_REVBITS_01:
-			/* FALLTHROUGH */
-		default:
-			/* Use the latest known revision as default */
-			cpu_rev = "1.1";
-		}
-	} else {
-		switch (rev) {
-		case OMAP_REVBITS_00:
-			cpu_rev = "1.0";
-			break;
-		case OMAP_REVBITS_01:
-			cpu_rev = "2.0";
-			break;
-		case OMAP_REVBITS_02:
-			cpu_rev = "2.1";
-			break;
-		case OMAP_REVBITS_03:
-			cpu_rev = "3.0";
-			break;
-		case OMAP_REVBITS_04:
-			cpu_rev = "3.1";
-			break;
-		case OMAP_REVBITS_05:
-			/* FALLTHROUGH */
-		default:
-			/* Use the latest known revision as default */
-			cpu_rev = "3.1.2";
-		}
-	}
-
 	/* Print verbose information */
 	pr_info("%s ES%s (", cpu_name, cpu_rev);

@@ -533,6 +497,8 @@ static void __init omap3_cpuinfo(void)
  */
 void __init omap2_check_revision(void)
 {
+	const char *cpu_rev;
+
 	/*
 	 * At this point we have an idea about the processor revision set
 	 * earlier with omap2_set_globals_tap().

@@ -540,7 +506,7 @@ void __init omap2_check_revision(void)
 	if (cpu_is_omap24xx()) {
 		omap24xx_check_revision();
 	} else if (cpu_is_omap34xx()) {
-		omap3_check_revision();
+		omap3_check_revision(&cpu_rev);
 
 		/* TI816X doesn't have feature register */
 		if (!cpu_is_ti816x())

@@ -548,7 +514,7 @@ void __init omap2_check_revision(void)
 		else
 			ti816x_check_features();
 
-		omap3_cpuinfo();
+		omap3_cpuinfo(cpu_rev);
 		return;
 	} else if (cpu_is_omap44xx()) {
 		omap4_check_revision();

Paul Walmsley

author

2011-09-13 21:28 UTC #8 lore raw

PATCH 6/6 OMAP2+: id: remove OMAP_REVBITS_* macros

In reply to Paul Walmsley

The OMAP_REVBITS_* macros are just used as otherwise meaningless aliases for the numbers zero through five, so remove these macros.

Signed-off-by Paul Walmsley <[email protected]>

---
 arch/arm/plat-omap/include/plat/cpu.h |   33 ++++++++++-----------------------
 1 files changed, 10 insertions(+), 23 deletions(-)

arch/arm/plat-omap/include/plat/cpu.h +10 ~~-23~~

index 566975c..0ec90cf 100644
@@ -60,19 +60,6 @@ struct omap_chip_id {
 unsigned int omap_rev(void);
 
 /*
- * Define CPU revision bits
- *
- * Verbose meaning of the revision bits may be different for a silicon
- * family. This difference can be handled separately.
- */
-#define OMAP_REVBITS_00		0x00
-#define OMAP_REVBITS_01		0x01
-#define OMAP_REVBITS_02		0x02
-#define OMAP_REVBITS_03		0x03
-#define OMAP_REVBITS_04		0x04
-#define OMAP_REVBITS_05		0x05
-
-/*
  * Get the CPU revision for OMAP devices
  */
 #define GET_OMAP_REVISION()	((omap_rev() >> 8) & 0xff)

@@ -379,31 +366,31 @@ IS_OMAP_TYPE(3517, 0x3517)
 /* Various silicon revisions for omap2 */
 #define OMAP242X_CLASS		0x24200024
 #define OMAP2420_REV_ES1_0	OMAP242X_CLASS
-#define OMAP2420_REV_ES2_0	(OMAP242X_CLASS | (OMAP_REVBITS_01 << 8))
+#define OMAP2420_REV_ES2_0	(OMAP242X_CLASS | (0x1 << 8))
 
 #define OMAP243X_CLASS		0x24300024
 #define OMAP2430_REV_ES1_0	OMAP243X_CLASS
 
 #define OMAP343X_CLASS		0x34300034
 #define OMAP3430_REV_ES1_0	OMAP343X_CLASS
-#define OMAP3430_REV_ES2_0	(OMAP343X_CLASS | (OMAP_REVBITS_01 << 8))
-#define OMAP3430_REV_ES2_1	(OMAP343X_CLASS | (OMAP_REVBITS_02 << 8))
-#define OMAP3430_REV_ES3_0	(OMAP343X_CLASS | (OMAP_REVBITS_03 << 8))
-#define OMAP3430_REV_ES3_1	(OMAP343X_CLASS | (OMAP_REVBITS_04 << 8))
-#define OMAP3430_REV_ES3_1_2	(OMAP343X_CLASS | (OMAP_REVBITS_05 << 8))
+#define OMAP3430_REV_ES2_0	(OMAP343X_CLASS | (0x1 << 8))
+#define OMAP3430_REV_ES2_1	(OMAP343X_CLASS | (0x2 << 8))
+#define OMAP3430_REV_ES3_0	(OMAP343X_CLASS | (0x3 << 8))
+#define OMAP3430_REV_ES3_1	(OMAP343X_CLASS | (0x4 << 8))
+#define OMAP3430_REV_ES3_1_2	(OMAP343X_CLASS | (0x5 << 8))
 
 #define OMAP363X_CLASS		0x36300034
 #define OMAP3630_REV_ES1_0	OMAP363X_CLASS
-#define OMAP3630_REV_ES1_1	(OMAP363X_CLASS | (OMAP_REVBITS_01 << 8))
-#define OMAP3630_REV_ES1_2	(OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
+#define OMAP3630_REV_ES1_1	(OMAP363X_CLASS | (0x1 << 8))
+#define OMAP3630_REV_ES1_2	(OMAP363X_CLASS | (0x2 << 8))
 
 #define OMAP3517_CLASS		0x35170000
 #define OMAP3517_REV_ES1_0	OMAP3517_CLASS
-#define OMAP3517_REV_ES1_1	(OMAP3517_CLASS | (OMAP_REVBITS_01 << 8))
+#define OMAP3517_REV_ES1_1	(OMAP3517_CLASS | (0x1 << 8))
 
 #define TI816X_CLASS		0x81600034
 #define TI8168_REV_ES1_0	TI816X_CLASS
-#define TI8168_REV_ES1_1	(TI816X_CLASS | (OMAP_REVBITS_01 << 8))
+#define TI8168_REV_ES1_1	(TI816X_CLASS | (0x1 << 8))
 
 #define OMAP443X_CLASS		0x44300044
 #define OMAP4430_REV_ES1_0	(OMAP443X_CLASS | (0x10 << 8))

Igor Grinberg

2011-09-14 12:24 UTC #9 lore raw

PATCH 6/6 OMAP2+: id: remove OMAP_REVBITS_* macros

Hi Paul,

Same problem (as with 3_6) here...

Quoted 81 lines · Paul Walmsley

The OMAP_REVBITS_* macros are just used as otherwise meaningless aliases for the numbers zero through five, so remove these macros.

Signed-off-by Paul Walmsley <[email protected]>

---
 arch/arm/plat-omap/include/plat/cpu.h |   33 ++++++++++-----------------------
 1 files changed, 10 insertions(+), 23 deletions(-)

arch/arm/plat-omap/include/plat/cpu.h +10 ~~-24~~

index 566975c..0ec90cf 100644
@@ -60,19 +60,6 @@ struct omap_chip_id {
 unsigned int omap_rev(void);
 
 /*
- * Define CPU revision bits
- *
- * Verbose meaning of the revision bits may be different for a silicon
- * family. This difference can be handled separately.
- */
-#define OMAP_REVBITS_00		0x00
-#define OMAP_REVBITS_01		0x01
-#define OMAP_REVBITS_02		0x02
-#define OMAP_REVBITS_03		0x03
-#define OMAP_REVBITS_04		0x04
-#define OMAP_REVBITS_05		0x05
-
-/*
  * Get the CPU revision for OMAP devices
  */
 #define GET_OMAP_REVISION()	((omap_rev() >> 8) & 0xff)

@@ -379,31 +366,31 @@ IS_OMAP_TYPE(3517, 0x3517)
 /* Various silicon revisions for omap2 */
 #define OMAP242X_CLASS		0x24200024
 #define OMAP2420_REV_ES1_0	OMAP242X_CLASS
-#define OMAP2420_REV_ES2_0	(OMAP242X_CLASS | (OMAP_REVBITS_01 << 8))
+#define OMAP2420_REV_ES2_0	(OMAP242X_CLASS | (0x1 << 8))
 
 #define OMAP243X_CLASS		0x24300024
 #define OMAP2430_REV_ES1_0	OMAP243X_CLASS
 
 #define OMAP343X_CLASS		0x34300034
 #define OMAP3430_REV_ES1_0	OMAP343X_CLASS
-#define OMAP3430_REV_ES2_0	(OMAP343X_CLASS | (OMAP_REVBITS_01 << 8))
-#define OMAP3430_REV_ES2_1	(OMAP343X_CLASS | (OMAP_REVBITS_02 << 8))
-#define OMAP3430_REV_ES3_0	(OMAP343X_CLASS | (OMAP_REVBITS_03 << 8))
-#define OMAP3430_REV_ES3_1	(OMAP343X_CLASS | (OMAP_REVBITS_04 << 8))
-#define OMAP3430_REV_ES3_1_2	(OMAP343X_CLASS | (OMAP_REVBITS_05 << 8))
+#define OMAP3430_REV_ES2_0	(OMAP343X_CLASS | (0x1 << 8))
+#define OMAP3430_REV_ES2_1	(OMAP343X_CLASS | (0x2 << 8))
+#define OMAP3430_REV_ES3_0	(OMAP343X_CLASS | (0x3 << 8))
+#define OMAP3430_REV_ES3_1	(OMAP343X_CLASS | (0x4 << 8))
+#define OMAP3430_REV_ES3_1_2	(OMAP343X_CLASS | (0x5 << 8))
 
 #define OMAP363X_CLASS		0x36300034
 #define OMAP3630_REV_ES1_0	OMAP363X_CLASS
-#define OMAP3630_REV_ES1_1	(OMAP363X_CLASS | (OMAP_REVBITS_01 << 8))
-#define OMAP3630_REV_ES1_2	(OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
+#define OMAP3630_REV_ES1_1	(OMAP363X_CLASS | (0x1 << 8))
+#define OMAP3630_REV_ES1_2	(OMAP363X_CLASS | (0x2 << 8))
 
 #define OMAP3517_CLASS		0x35170000
 #define OMAP3517_REV_ES1_0	OMAP3517_CLASS
-#define OMAP3517_REV_ES1_1	(OMAP3517_CLASS | (OMAP_REVBITS_01 << 8))
+#define OMAP3517_REV_ES1_1	(OMAP3517_CLASS | (0x1 << 8))
 
 #define TI816X_CLASS		0x81600034
 #define TI8168_REV_ES1_0	TI816X_CLASS
-#define TI8168_REV_ES1_1	(TI816X_CLASS | (OMAP_REVBITS_01 << 8))
+#define TI8168_REV_ES1_1	(TI816X_CLASS | (0x1 << 8))
 
 #define OMAP443X_CLASS		0x44300044
 #define OMAP4430_REV_ES1_0	(OMAP443X_CLASS | (0x10 << 8))
 
 
--

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Signature · 2 lines

Regards,
Igor.

Paul Walmsley

author

2011-09-14 12:29 UTC #10 lore raw

PATCH 6/6 OMAP2+: id: remove OMAP_REVBITS_* macros

Quoted 3 lines · Igor Grinberg

Hi Paul,
Same problem (as with 3_6) here...

Thanks, I'll repost those. In the meantime, maybe try pulling the branch 'id_3517_cleanup_3.2' from git://git.pwsan.com/linux-2.6 ?

- Paul

Igor Grinberg

2011-09-14 12:51 UTC #11 lore raw

PATCH 6/6 OMAP2+: id: remove OMAP_REVBITS_* macros

Quoted 8 lines · Paul Walmsley

Quoted 3 lines · Igor Grinberg
Hi Paul,
Same problem (as with 3_6) here...
Thanks, I'll repost those. In the meantime, maybe try pulling the branch 'id_3517_cleanup_3.2' from git://git.pwsan.com/linux-2.6 ?

I've applied those manually on top of v3.1-rc3:

--------------cut--------------------

[    0.000000] Linux version 3.1.0-rc3-00006-ga942f6de (grinberg at grinberg-linux) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #1 SMP Wed Sep 14 15:35:32 IDT 2011
[    0.000000] CPU: ARMv7 Processor [411fc087] revision 7 (ARMv7), cr=10c53c7f
[    0.000000] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
[    0.000000] Machine: Compulab CM-T3517
[    0.000000] Reserving 8388608 bytes SDRAM for VRAM
[    0.000000] Memory policy: ECC disabled, Data cache writeback
[    0.000000] OMAP3430/3530 ES1.0 (l2cache iva sgx neon isp )
----------cut----------------------------
               ^^^^^^^^^^^^^^^^^^^

While U-Boot says:

------------cut--------------------- U-Boot 2009.11-cm-t3517-1 (Dec 10 2010 - 23:25:02)

AM35xx-GP ES1.0, L3-165MHz
------------cut---------------------

Do I miss something, that should be in your tree? Pulling it in right now, should be available shortly...

Signature · 2 lines

Regards,
Igor.

Paul Walmsley

author

2011-09-14 13:10 UTC #12 lore raw

PATCH 6/6 OMAP2+: id: remove OMAP_REVBITS_* macros

Hi Igor,

Quoted 15 lines · Igor Grinberg

I've applied those manually on top of v3.1-rc3:

--------------cut--------------------

[    0.000000] Linux version 3.1.0-rc3-00006-ga942f6de (grinberg at grinberg-linux) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #1 SMP Wed Sep 14 15:35:32 IDT 2011
[    0.000000] CPU: ARMv7 Processor [411fc087] revision 7 (ARMv7), cr=10c53c7f
[    0.000000] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
[    0.000000] Machine: Compulab CM-T3517
[    0.000000] Reserving 8388608 bytes SDRAM for VRAM
[    0.000000] Memory policy: ECC disabled, Data cache writeback
[    0.000000] OMAP3430/3530 ES1.0 (l2cache iva sgx neon isp )
----------cut----------------------------
               ^^^^^^^^^^^^^^^^^^^

While U-Boot says:

Quoted 8 lines

------------cut--------------------- U-Boot 2009.11-cm-t3517-1 (Dec 10 2010 - 23:25:02)
AM35xx-GP ES1.0, L3-165MHz
------------cut---------------------
Do I miss something, that should be in your tree? Pulling it in right now, should be available shortly...

Could you try this patch on top of the ones that you are testing?

thanks for the testing help,

- Paul

Igor Grinberg

2011-09-14 13:30 UTC #13 lore raw

PATCH 6/6 OMAP2+: id: remove OMAP_REVBITS_* macros

Quoted 3 lines · Paul Walmsley

Hi Igor,
Could you try this patch on top of the ones that you are testing?

After applying the patch to your id_3517_cleanup_3.2 branch:
--------------cut-------------------

[    0.000000] Linux version 3.1.0-rc4-00014-gbe89163 (grinberg at grinberg-linux) (gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202) ) #2 SMP Wed Sep 14 16:21:47 IDT 2011
[    0.000000] CPU: ARMv7 Processor [411fc087] revision 7 (ARMv7), cr=10c53c7f
[    0.000000] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
[    0.000000] Machine: Compulab CM-T3517
[    0.000000] Reserving 8388608 bytes SDRAM for VRAM
[    0.000000] Memory policy: ECC disabled, Data cache writeback
[    0.000000] AM3517 ES1.0 (l2cache iva sgx neon isp )

-------------cut--------------------

The SoC is really AM3517. I have no AM3505 available right now, sorry...

Feel free to add:

Tested-by Igor Grinberg <[email protected]>

Quoted 2 lines

thanks for the testing help,

No problem ;)

Signature · 2 lines

Regards,
Igor.