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OMAP3/4: Misc fixes and clean-up

PATCH New Santosh Shilimkar 6 participants 26 messages Sep 8, 2011 – Dec 12, 2011

Subsystems (5)
Arm (32-bit) Arm sub-architectures OMAP2+ support OMAP clock framework support +1 more subsystems
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Santosh Shilimkar

author
#0 lore raw

cover OMAP3/4: Misc fixes and clean-up

The series contains few fixes and clean-up for OMAP. Briefly,
- HWMOD fix for the address space count
- Improving the L3 register accesses
- Bug fix in the L3 error handler
- Sparce warning and indentation fixes in L3 error handler
- Print master id in case of L3 custom errors for better debug.
- Adding local time clock node for the CPUfreq and time re-calibration
- Fix in the address overlap for emif and emulation domain.

The series is tested on OMAP4430 SDP and OMAP4430 beagle and SDP.

The following changes since commit c6a389f123b9f68d605bb7e0f9b32ec1e3e14132:

Linux 3.1-rc4 (2011-08-28 21:16:01 -0700)

are available in the git repository at:
git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-rc4-omap-misc

Santosh Shilimkar (2):
OMAP4: clock: Add CPU local timer clock node.
OMAP4: Fix the emif and dmm virtual mapping

Todd Poynor (2):
OMAP: Improve register access in L3 Error handler.
OMAP: Fix a BUG in l3 error handler.

sricharan (4):
OMAP: hwmod: Fix the addr spaces count API.
OMAP: Fix indentation issues in l3 error handler.
OMAP: Fix sparse warnings in l3 error handler.
OMAP: Print Initiator name for l3 custom error.

 arch/arm/mach-omap2/clock44xx_data.c |    9 ++
 arch/arm/mach-omap2/omap_hwmod.c     |    8 +-
 arch/arm/mach-omap2/omap_l3_noc.c    |  130 ++++++++++----------
 arch/arm/mach-omap2/omap_l3_noc.h    |  224 +++++++++++++++++++---------------
 arch/arm/mach-omap2/omap_l3_smx.c    |   91 +++++++-------
 arch/arm/mach-omap2/omap_l3_smx.h    |  164 ++++++++++++------------
 arch/arm/plat-omap/include/plat/io.h |    4 +-
 7 files changed, 336 insertions(+), 294 deletions(-)
author
#1 lore raw

PATCH 1/8 OMAP: hwmod: Fix the addr spaces count API.

From: sricharan <[email protected]>

The address space count API returns the number of address space entries for a hwmod including a additional null value present in the address space structure introduced recently. The devices which have multiple hwmods and use device_build_ss are broken with this, as their address resources are populated with a extra null value, subsequently the probe fails. So fix the API not to add the null value.

Signed-off-by sricharan <[email protected]>
Signed-off-by Santosh Shilimkar <[email protected]>
Cc Benoit Cousson <[email protected]>
Cc Paul Walmsley <[email protected]>
Cc Kevin Hilman <[email protected]>
---
 arch/arm/mach-omap2/omap_hwmod.c |    8 +++++---
 1 files changed, 5 insertions(+), 3 deletions(-)
arch/arm/mach-omap2/omap_hwmod.c +5 -3
index 84cc0bd..32a0f48a 100644
@@ -791,9 +791,11 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
 	if (!os || !os->addr)
 		return 0;
 
-	do {
-		mem = &os->addr[i++];
-	} while (mem->pa_start != mem->pa_end);
+	mem = &os->addr[i];
+
+	while (mem->pa_start != mem->pa_end) {
+		mem = &os->addr[++i];
+	};
 
 	return i;
 }
Signature · 1 line
1.7.4.1
#2 lore raw

PATCH 1/8 OMAP: hwmod: Fix the addr spaces count API.

Hi Sricharan,

Quoted 5 lines · Santosh

From: sricharan<[email protected]>

The address space count API returns the number of address space entries for a hwmod including a additional null value present in the address space structure introduced recently.

That's a minor nit, but you might give the commit you are referencing here.

Quoted 4 lines

The devices which
have multiple hwmods and use device_build_ss are broken with this, as their address resources are populated with a extra null value, subsequently the probe fails. So fix the API not to add the null value.

It seems that in every cases, we are adding an extra null resource for nothing. But it is true that will not crash if the driver is just expecting an unique entry.
What is happening with multiple hwmods is probably the introduction of that extra null resource in the middle of the real ones, hence shifting the resource index?
You might give more details here.

Quoted 17 lines
Signed-off-by sricharan<[email protected]>
Signed-off-by Santosh Shilimkar<[email protected]>
Cc Benoit Cousson<[email protected]>
Cc Paul Walmsley<[email protected]>
Cc Kevin Hilman<[email protected]>
---
  arch/arm/mach-omap2/omap_hwmod.c |    8 +++++---
  1 files changed, 5 insertions(+), 3 deletions(-)
arch/arm/mach-omap2/omap_hwmod.c +0 -0
index 84cc0bd..32a0f48a 100644
@@ -791,9 +791,11 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  	if (!os || !os->addr)
  		return 0;

arch/arm/mach-omap2/omap_hwmod.c static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) · line 800

Quoted 10 lines
arch/arm/mach-omap2/omap_hwmod.c +5 -3
-	do {
-		mem =&os->addr[i++];
-	} while (mem->pa_start != mem->pa_end);
+	mem =&os->addr[i];
+
+	while (mem->pa_start != mem->pa_end) {
+		mem =&os->addr[++i];
+	};
 
  	return i;

Cannot you just do "return i - 1"?

Regards,
Benoit

author
#3 lore raw

PATCH 2/8 OMAP: Improve register access in L3 Error handler.

In reply to Santosh Shilimkar

From: Todd Poynor <[email protected]>

* Changed the way of accessing L3 target
registers from standard base rather
than relative to STDERRLOG_MAIN.

* Use ffs() to find error source from
the L3_FLAGMUX_REGERRn register.

* Remove extra l3_base[] entry.

* Modified L3 custom error message.

Signed-off-by Todd Poynor <[email protected]>
Signed-off-by sricharan <[email protected]>
Signed-off-by Santosh Shilimkar <[email protected]>
---
 arch/arm/mach-omap2/omap_l3_noc.c |   43 +++++++++---------
 arch/arm/mach-omap2/omap_l3_noc.h |   86 +++++++++++++++++-------------------
 arch/arm/mach-omap2/omap_l3_smx.c |    5 +-
 arch/arm/mach-omap2/omap_l3_smx.h |    2 +-
 4 files changed, 65 insertions(+), 71 deletions(-)
arch/arm/mach-omap2/omap_l3_noc.c +21 -22
index 7b9f190..d560c88 100644
@@ -56,10 +56,9 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 {
 
 	struct omap4_l3		*l3 = _l3;
-	int inttype, i, j;
+	int inttype, i;
 	int err_src = 0;
-	u32 std_err_main_addr, std_err_main, err_reg;
-	u32 base, slave_addr, clear;
+	u32 std_err_main, err_reg, clear, base, l3_targ_base;
 	char *source_name;
 
 	/* Get the Type of interrupt */

@@ -71,42 +70,43 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 		 * to determine the source
 		 */
 		base = (u32)l3->l3_base[i];
-		err_reg =  readl(base + l3_flagmux[i] + (inttype << 3));
+		err_reg = readl(base + l3_flagmux[i] +
+					+ L3_FLAGMUX_REGERR0 + (inttype << 3));
 
 		/* Get the corresponding error and analyse */
 		if (err_reg) {
 			/* Identify the source from control status register */
-			for (j = 0; !(err_reg & (1 << j)); j++)
-									;
+			err_src = __ffs(err_reg);
 
-			err_src = j;
 			/* Read the stderrlog_main_source from clk domain */
-			std_err_main_addr = base + *(l3_targ[i] + err_src);
-			std_err_main = readl(std_err_main_addr);
+			l3_targ_base = base + *(l3_targ[i] + err_src);
+			std_err_main =  readl(l3_targ_base +
+					L3_TARG_STDERRLOG_MAIN);
 
 			switch (std_err_main & CUSTOM_ERROR) {
 			case STANDARD_ERROR:
 				source_name =
-				l3_targ_stderrlog_main_name[i][err_src];
-
-				slave_addr = std_err_main_addr +
-						L3_SLAVE_ADDRESS_OFFSET;
+					l3_targ_inst_name[i][err_src];
 				WARN(true, "L3 standard error: SOURCE:%s@address 0x%x\n",
-					source_name, readl(slave_addr));
+					source_name,
+					readl(l3_targ_base +
+						L3_TARG_STDERRLOG_SLVOFSLSB));
 				/* clear the std error log*/
 				clear = std_err_main | CLEAR_STDERR_LOG;
-				writel(clear, std_err_main_addr);
+				writel(clear, l3_targ_base +
+					L3_TARG_STDERRLOG_MAIN);
 				break;
 
 			case CUSTOM_ERROR:
 				source_name =
-				l3_targ_stderrlog_main_name[i][err_src];
+					l3_targ_inst_name[i][err_src];
 
-				WARN(true, "CUSTOM SRESP error with SOURCE:%s\n",
-							source_name);
+				WARN(true, "L3 custom error: SOURCE:%s\n",
+					source_name);
 				/* clear the std error log*/
 				clear = std_err_main | CLEAR_STDERR_LOG;
-				writel(clear, std_err_main_addr);
+				writel(clear, l3_targ_base +
+					L3_TARG_STDERRLOG_MAIN);
 				break;
 
 			default:

@@ -123,9 +123,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 static int __init omap4_l3_probe(struct platform_device *pdev)
 {
 	static struct omap4_l3		*l3;
-	struct resource		*res;
-	int			ret;
-	int			irq;
+	struct resource	*res;
+	int ret, irq;
 
 	l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
 	if (!l3)
arch/arm/mach-omap2/omap_l3_noc.h +41 -45

123 lines not on this page · raw message

arch/arm/mach-omap2/omap_l3_smx.c +2 -3
index 873c0e3..fa07edf 100644
@@ -191,10 +191,9 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
 	}
 
 	/* identify the error source */
-	for (err_source = 0; !(status & (1 << err_source)); err_source++)
-									;
+	err_source = __ffs(status);
 
-	base = l3->rt + *(omap3_l3_bases[int_type] + err_source);
+	base = l3->rt + omap3_l3_bases[int_type][err_source];
 	error = omap3_l3_readll(base, L3_ERROR_LOG);
 	if (error) {
 		error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR);
arch/arm/mach-omap2/omap_l3_smx.h +1 -1
index ba2ed9a..185d77a 100644
@@ -40,7 +40,7 @@
 #define L3_SI_CONTROL			0x020
 #define L3_SI_FLAG_STATUS_0		0x510
 
-const u64 shift = 1;
+static const u64 shift = 1;
 
 #define L3_STATUS_0_MPUIA_BRST		(shift << 0)
 #define L3_STATUS_0_MPUIA_RSP		(shift << 1)
Signature · 1 line
1.7.4.1
author
#4 lore raw

PATCH 3/8 OMAP: Fix a BUG in l3 error handler.

In reply to Santosh Shilimkar

From: Todd Poynor <[email protected]>

With the current sequence of registering the irq and assigning it to the app_irq, debug_irq driver variables, there can be corner cases where the pending irq gets triggered immediately after registering, handler gets called resulting in a crash. So changed this sequence.

Signed-off-by sricharan <[email protected]>
Signed-off-by Todd Poynor <[email protected]>
Signed-off-by Santosh Shilimkar <[email protected]>
---
 arch/arm/mach-omap2/omap_l3_noc.c |   12 +++++-------
 1 files changed, 5 insertions(+), 7 deletions(-)
arch/arm/mach-omap2/omap_l3_noc.c +5 -7
index d560c88..cf237dd 100644
@@ -124,7 +124,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
 {
 	static struct omap4_l3		*l3;
 	struct resource	*res;
-	int ret, irq;
+	int ret;
 
 	l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
 	if (!l3)

@@ -176,8 +176,8 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
 	/*
 	 * Setup interrupt Handlers
 	 */
-	irq = platform_get_irq(pdev, 0);
-	ret = request_irq(irq,
+	l3->debug_irq = platform_get_irq(pdev, 0);
+	ret = request_irq(l3->debug_irq,
 			l3_interrupt_handler,
 			IRQF_DISABLED, "l3-dbg-irq", l3);
 	if (ret) {

@@ -185,10 +185,9 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
 					 OMAP44XX_IRQ_L3_DBG);
 		goto err3;
 	}
-	l3->debug_irq = irq;
 
-	irq = platform_get_irq(pdev, 1);
-	ret = request_irq(irq,
+	l3->app_irq = platform_get_irq(pdev, 1);
+	ret = request_irq(l3->app_irq,
 			l3_interrupt_handler,
 			IRQF_DISABLED, "l3-app-irq", l3);
 	if (ret) {

@@ -196,7 +195,6 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
 					 OMAP44XX_IRQ_L3_APP);
 		goto err4;
 	}
-	l3->app_irq = irq;
 
 	return 0;
Signature · 1 line
1.7.4.1
author
#5 lore raw

PATCH 4/8 OMAP: Fix indentation issues in l3 error handler.

In reply to Santosh Shilimkar

From: sricharan <[email protected]>

The indentation problems in the l3 noc and smx
error handler files are fixed.

Signed-off-by sricharan <[email protected]>
Signed-off-by Santosh Shilimkar <[email protected]>
Reported-by Paul Walmsley <[email protected]>
Cc Paul Walmsley <[email protected]>
---
 arch/arm/mach-omap2/omap_l3_noc.c |   58 +++++++-------
 arch/arm/mach-omap2/omap_l3_noc.h |  106 +++++++++++++-------------
 arch/arm/mach-omap2/omap_l3_smx.c |   86 ++++++++++----------
 arch/arm/mach-omap2/omap_l3_smx.h |  156 ++++++++++++++++++------------------
 4 files changed, 202 insertions(+), 204 deletions(-)
arch/arm/mach-omap2/omap_l3_noc.c +29 -29
index cf237dd..1f68e95 100644
@@ -1,25 +1,25 @@
 /*
-  * OMAP4XXX L3 Interconnect error handling driver
-  *
-  * Copyright (C) 2011 Texas Corporation
-  *	Santosh Shilimkar <[email protected]>
-  *	Sricharan <[email protected]>
-  *
-  * This program is free software; you can redistribute it and/or modify
-  * it under the terms of the GNU General Public License as published by
-  * the Free Software Foundation; either version 2 of the License, or
-  * (at your option) any later version.
-  *
-  * This program is distributed in the hope that it will be useful,
-  * but WITHOUT ANY WARRANTY; without even the implied warranty of
-  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-  * GNU General Public License for more details.
-  *
-  * You should have received a copy of the GNU General Public License
-  * along with this program; if not, write to the Free Software
-  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
-  * USA
-  */
+ * OMAP4XXX L3 Interconnect error handling driver
+ *
+ * Copyright (C) 2011 Texas Corporation
+ *	Santosh Shilimkar <[email protected]>
+ *	Sricharan <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ */
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/platform_device.h>

@@ -55,7 +55,7 @@
 static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 {
 
-	struct omap4_l3		*l3 = _l3;
+	struct omap4_l3 *l3 = _l3;
 	int inttype, i;
 	int err_src = 0;
 	u32 std_err_main, err_reg, clear, base, l3_targ_base;

@@ -122,7 +122,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 
 static int __init omap4_l3_probe(struct platform_device *pdev)
 {
-	static struct omap4_l3		*l3;
+	static struct omap4_l3 *l3;
 	struct resource	*res;
 	int ret;
 

@@ -182,7 +182,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
 			IRQF_DISABLED, "l3-dbg-irq", l3);
 	if (ret) {
 		pr_crit("L3: request_irq failed to register for 0x%x\n",
-					 OMAP44XX_IRQ_L3_DBG);
+						OMAP44XX_IRQ_L3_DBG);
 		goto err3;
 	}
 

@@ -192,7 +192,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
 			IRQF_DISABLED, "l3-app-irq", l3);
 	if (ret) {
 		pr_crit("L3: request_irq failed to register for 0x%x\n",
-					 OMAP44XX_IRQ_L3_APP);
+						OMAP44XX_IRQ_L3_APP);
 		goto err4;
 	}
 

@@ -213,7 +213,7 @@ err0:
 
 static int __exit omap4_l3_remove(struct platform_device *pdev)
 {
-	struct omap4_l3         *l3 = platform_get_drvdata(pdev);
+	struct omap4_l3 *l3 = platform_get_drvdata(pdev);
 
 	free_irq(l3->app_irq, l3);
 	free_irq(l3->debug_irq, l3);

@@ -226,9 +226,9 @@ static int __exit omap4_l3_remove(struct platform_device *pdev)
 }
 
 static struct platform_driver omap4_l3_driver = {
-	.remove		= __exit_p(omap4_l3_remove),
-	.driver		= {
-	.name		= "omap_l3_noc",
+	.remove	= __exit_p(omap4_l3_remove),
+	.driver	= {
+	.name = "omap_l3_noc",
 	},
 };
arch/arm/mach-omap2/omap_l3_noc.h +53 -53

134 lines not on this page · raw message

arch/arm/mach-omap2/omap_l3_smx.c +42 -44

121 lines not on this page · raw message

arch/arm/mach-omap2/omap_l3_smx.h +78 -78

197 lines not on this page · raw message

Signature · 1 line
1.7.4.1
author
#6 lore raw

PATCH 5/8 OMAP: Fix sparse warnings in l3 error handler.

In reply to Santosh Shilimkar

From: sricharan <[email protected]>

Fix below sparse warnings from the l3-noc and l3-smx error handlers files.

arch/arm/mach-omap2/omap_l3_smx.h:209:22: warning: symbol 'omap3_l3_app_bases' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_smx.h:308:22: warning: symbol 'omap3_l3_debug_bases' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_smx.h:325:2: warning: incorrect type in initializer (different address spaces)
arch/arm/mach-omap2/omap_l3_smx.h:325:2: expected unsigned int [usertype] *
arch/arm/mach-omap2/omap_l3_smx.h:325:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_smx.h:326:2: warning: incorrect type in initializer (different address spaces)
arch/arm/mach-omap2/omap_l3_smx.h:326:2: expected unsigned int [usertype] *
arch/arm/mach-omap2/omap_l3_smx.h:326:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_smx.h:324:5: warning: symbol 'omap3_l3_bases' was not declared. Should it be static?
CC arch/arm/mach-omap2/omap_l3_smx.o
CHECK arch/arm/mach-omap2/omap_l3_noc.c
arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:73:13: originally declared here arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:83:20: originally declared here arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:90:5: originally declared here arch/arm/mach-omap2/omap_l3_noc.h:39:5: warning: symbol 'l3_flagmux' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:46:5: warning: symbol 'l3_targ_inst_clk1' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:54:5: warning: symbol 'l3_targ_inst_clk2' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:75:5: warning: symbol 'l3_targ_inst_clk3' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:79:6: warning: symbol 'l3_targ_inst_name' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:112:5: warning: symbol 'l3_targ' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.c:72:11: warning: cast removes address space of expression arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:73:13: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:73:13: got unsigned int
arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:83:20: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:83:20: got unsigned int
arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:90:5: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:90:5: got unsigned int
arch/arm/mach-omap2/omap_l3_noc.c:96:5: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:96:5: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:96:5: got unsigned int
arch/arm/mach-omap2/omap_l3_noc.c:108:5: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:108:5: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:108:5: got unsigned int

Signed-off-by sricharan <[email protected]>
Signed-off-by Santosh Shilimkar <[email protected]>
Reported-by Paul Walmsley <[email protected]>
Cc Paul Walmsley <[email protected]>
---
 arch/arm/mach-omap2/omap_l3_noc.c |   11 ++++++-----
 arch/arm/mach-omap2/omap_l3_noc.h |   12 ++++++------
 arch/arm/mach-omap2/omap_l3_smx.h |    6 +++---
 3 files changed, 15 insertions(+), 14 deletions(-)
arch/arm/mach-omap2/omap_l3_noc.c +6 -5
index 1f68e95..8f18357 100644
@@ -58,7 +58,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 	struct omap4_l3 *l3 = _l3;
 	int inttype, i;
 	int err_src = 0;
-	u32 std_err_main, err_reg, clear, base, l3_targ_base;
+	u32 std_err_main, err_reg, clear;
+	void __iomem *base, *l3_targ_base;
 	char *source_name;
 
 	/* Get the Type of interrupt */

@@ -69,8 +70,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 		 * Read the regerr register of the clock domain
 		 * to determine the source
 		 */
-		base = (u32)l3->l3_base[i];
-		err_reg = readl(base + l3_flagmux[i] +
+		base = l3->l3_base[i];
+		err_reg = __raw_readl(base + l3_flagmux[i] +
 					+ L3_FLAGMUX_REGERR0 + (inttype << 3));
 
 		/* Get the corresponding error and analyse */

@@ -80,7 +81,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 
 			/* Read the stderrlog_main_source from clk domain */
 			l3_targ_base = base + *(l3_targ[i] + err_src);
-			std_err_main =  readl(l3_targ_base +
+			std_err_main =  __raw_readl(l3_targ_base +
 					L3_TARG_STDERRLOG_MAIN);
 
 			switch (std_err_main & CUSTOM_ERROR) {

@@ -89,7 +90,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 					l3_targ_inst_name[i][err_src];
 				WARN(true, "L3 standard error: SOURCE:%s@address 0x%x\n",
 					source_name,
-					readl(l3_targ_base +
+					__raw_readl(l3_targ_base +
 						L3_TARG_STDERRLOG_SLVOFSLSB));
 				/* clear the std error log*/
 				clear = std_err_main | CLEAR_STDERR_LOG;
arch/arm/mach-omap2/omap_l3_noc.h +6 -6
index 9120e70..74c1643 100644
@@ -36,14 +36,14 @@
 #define L3_TARG_STDERRLOG_SLVOFSLSB	0x5c
 #define L3_FLAGMUX_REGERR0		0xc
 
-u32 l3_flagmux[L3_MODULES] = {
+static u32 l3_flagmux[L3_MODULES] = {
 	0x500,
 	0x1000,
 	0X0200
 };
 
 /* L3 Target standard Error register offsets */
-u32 l3_targ_inst_clk1[] = {
+static u32 l3_targ_inst_clk1[] = {
 	0x100, /* DMM1 */
 	0x200, /* DMM2 */
 	0x300, /* ABE */

@@ -51,7 +51,7 @@ u32 l3_targ_inst_clk1[] = {
 	0x600  /* CLK2 PWR DISC */
 };
 
-u32 l3_targ_inst_clk2[] = {
+static u32 l3_targ_inst_clk2[] = {
 	0x500, /* CORTEX M3 */
 	0x300, /* DSS */
 	0x100, /* GPMC */

@@ -72,11 +72,11 @@ u32 l3_targ_inst_clk2[] = {
 	0xB00 /* L4 PER2*/
 };
 
-u32 l3_targ_inst_clk3[] = {
+static u32 l3_targ_inst_clk3[] = {
 	0x0100	/* EMUSS */
 };
 
-char *l3_targ_inst_name[L3_MODULES][18] = {
+static char *l3_targ_inst_name[L3_MODULES][18] = {
 	{
 		"DMM1",
 		"DMM2",

@@ -109,7 +109,7 @@ char *l3_targ_inst_name[L3_MODULES][18] = {
 	},
 };
 
-u32 *l3_targ[L3_MODULES] = {
+static u32 *l3_targ[L3_MODULES] = {
 	l3_targ_inst_clk1,
 	l3_targ_inst_clk2,
 	l3_targ_inst_clk3,
arch/arm/mach-omap2/omap_l3_smx.h +3 -3
index 18e5ec2..4f3cebc 100644
@@ -206,7 +206,7 @@ struct omap3_l3 {
 };
 
 /* offsets for l3 agents in order with the Flag status register */
-unsigned int __iomem omap3_l3_app_bases[] = {
+static unsigned int omap3_l3_app_bases[] = {
 	/* MPU IA */
 	0x1400,
 	0x1400,

@@ -305,7 +305,7 @@ unsigned int __iomem omap3_l3_app_bases[] = {
 	0,
 };
 
-unsigned int __iomem omap3_l3_debug_bases[] = {
+static unsigned int omap3_l3_debug_bases[] = {
 	/* MPU DATA IA */
 	0x1400,
 	/* RESERVED */

@@ -321,7 +321,7 @@ unsigned int __iomem omap3_l3_debug_bases[] = {
 	/* REST RESERVED */
 };
 
-u32 *omap3_l3_bases[] = {
+static u32 *omap3_l3_bases[] = {
 	omap3_l3_app_bases,
 	omap3_l3_debug_bases,
 };
Signature · 1 line
1.7.4.1
author
#7 lore raw

PATCH 6/8 OMAP: Print Initiator name for l3 custom error.

In reply to Santosh Shilimkar

From: sricharan <[email protected]>

The initiator id gets logged in the l3 target registers for custom error. So print it to aid debugging.

Based on a internal patch by Devaraj Rangasamy <[email protected]>

Signed-off-by sricharan <[email protected]>
Signed-off-by Santosh Shilimkar <[email protected]>
---
 arch/arm/mach-omap2/omap_l3_noc.c |   26 ++++++++++++++++----------
 arch/arm/mach-omap2/omap_l3_noc.h |   34 ++++++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+), 10 deletions(-)
arch/arm/mach-omap2/omap_l3_noc.c +16 -10
index 8f18357..07a3d3e 100644
@@ -56,11 +56,11 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 {
 
 	struct omap4_l3 *l3 = _l3;
-	int inttype, i;
+	int inttype, i, k;
 	int err_src = 0;
-	u32 std_err_main, err_reg, clear;
+	u32 std_err_main, err_reg, clear, masterid;
 	void __iomem *base, *l3_targ_base;
-	char *source_name;
+	char *target_name, *master_name = "UN IDENTIFIED";
 
 	/* Get the Type of interrupt */
 	inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;

@@ -83,13 +83,15 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 			l3_targ_base = base + *(l3_targ[i] + err_src);
 			std_err_main =  __raw_readl(l3_targ_base +
 					L3_TARG_STDERRLOG_MAIN);
+			masterid = __raw_readl(l3_targ_base +
+					L3_TARG_STDERRLOG_MSTADDR);
 
 			switch (std_err_main & CUSTOM_ERROR) {
 			case STANDARD_ERROR:
-				source_name =
+				target_name =
 					l3_targ_inst_name[i][err_src];
-				WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n",
-					source_name,
+				WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n",
+					target_name,
 					__raw_readl(l3_targ_base +
 						L3_TARG_STDERRLOG_SLVOFSLSB));
 				/* clear the std error log*/

@@ -99,11 +101,15 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 				break;
 
 			case CUSTOM_ERROR:
-				source_name =
+				target_name =
 					l3_targ_inst_name[i][err_src];
-
-				WARN(true, "L3 custom error: SOURCE:%s\n",
-					source_name);
+				for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
+					if (masterid == l3_masters[k].id)
+						master_name =
+							l3_masters[k].name;
+				}
+				WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
+					master_name, target_name);
 				/* clear the std error log*/
 				clear = std_err_main | CLEAR_STDERR_LOG;
 				writel(clear, l3_targ_base +
arch/arm/mach-omap2/omap_l3_noc.h +34 -0
index 74c1643..90b5098 100644
@@ -34,8 +34,11 @@
 /* L3 TARG register offsets */
 #define L3_TARG_STDERRLOG_MAIN		0x48
 #define L3_TARG_STDERRLOG_SLVOFSLSB	0x5c
+#define L3_TARG_STDERRLOG_MSTADDR	0x68
 #define L3_FLAGMUX_REGERR0		0xc
 
+#define NUM_OF_L3_MASTERS	(sizeof(l3_masters)/sizeof(l3_masters[0]))
+
 static u32 l3_flagmux[L3_MODULES] = {
 	0x500,
 	0x1000,

@@ -76,6 +79,37 @@ static u32 l3_targ_inst_clk3[] = {
 	0x0100	/* EMUSS */
 };
 
+static struct l3_masters_data {
+	u32 id;
+	char name[10];
+} l3_masters[] = {
+	{ 0x0 , "MPU"},
+	{ 0x10, "CS_ADP"},
+	{ 0x14, "xxx"},
+	{ 0x20, "DSP"},
+	{ 0x30, "IVAHD"},
+	{ 0x40, "ISS"},
+	{ 0x44, "DucatiM3"},
+	{ 0x48, "FaceDetect"},
+	{ 0x50, "SDMA_Rd"},
+	{ 0x54, "SDMA_Wr"},
+	{ 0x58, "xxx"},
+	{ 0x5C, "xxx"},
+	{ 0x60, "SGX"},
+	{ 0x70, "DSS"},
+	{ 0x80, "C2C"},
+	{ 0x88, "xxx"},
+	{ 0x8C, "xxx"},
+	{ 0x90, "HSI"},
+	{ 0xA0, "MMC1"},
+	{ 0xA4, "MMC2"},
+	{ 0xA8, "MMC6"},
+	{ 0xB0, "UNIPRO1"},
+	{ 0xC0, "USBHOSTHS"},
+	{ 0xC4, "USBOTGHS"},
+	{ 0xC8, "USBHOSTFS"}
+};
+
 static char *l3_targ_inst_name[L3_MODULES][18] = {
 	{
 		"DMM1",
Signature · 1 line
1.7.4.1
author
#8 lore raw

PATCH 7/8 OMAP4: clock: Add CPU local timer clock node.

In reply to Santosh Shilimkar

Local timer clock is sourced from the CPU clock and hence changes along with CPU clock. These per CPU local timers are used as clock-events, so they need to be reconfigured on CPU frequency change as part of CPUfreq governor.

Newly introduced clockevents_reconfigure() needs to know the twd clock-rate. Provide a clock-node to make clk_get_rate() work for TWD.

Signed-off-by Santosh Shilimkar <[email protected]>
Cc Paul Walmsley <[email protected]>
Cc Kevin Hilman <[email protected]>
---
 arch/arm/mach-omap2/clock44xx_data.c |    9 +++++++++
 1 files changed, 9 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/clock44xx_data.c +9 -0
index 2af0e3f..8c981ab 100644
@@ -3091,6 +3091,14 @@ static struct clk auxclkreq5_ck = {
 	.recalc		= &omap2_clksel_recalc,
 };
 
+static struct clk smp_twd = {
+	.name		= "smp_twd",
+	.parent		= &dpll_mpu_ck,
+	.ops		= &clkops_null,
+	.fixed_div	= 2,
+	.recalc		= &omap_fixed_divisor_recalc,
+};
+
 /*
  * clkdev
  */

@@ -3363,6 +3371,7 @@ static struct omap_clk omap44xx_clks[] = {
 	CLK("usbhs-omap.0",	"usbhost_ick",		&dummy_ck,		CK_443X),
 	CLK("usbhs-omap.0",	"usbtll_fck",		&dummy_ck,	CK_443X),
 	CLK("omap_wdt",	"ick",				&dummy_ck,	CK_443X),
+	CLK(NULL,	"smp_twd",			&smp_twd,	CK_443X),
 };
 
 int __init omap4xxx_clk_init(void)
Signature · 1 line
1.7.4.1
maintainer
#9 lore raw

PATCH 7/8 OMAP4: clock: Add CPU local timer clock node.

Hi Santosh,

Quoted 5 lines · Santosh Shilimkar

Local timer clock is sourced from the CPU clock and hence changes along with CPU clock. These per CPU local timers are used as clock-events, so they need to be reconfigured on CPU frequency change as part of CPUfreq governor.

Quoted 7 lines

Newly introduced clockevents_reconfigure() needs to know the twd clock-rate. Provide a clock-node to make clk_get_rate() work for TWD.

Signed-off-by Santosh Shilimkar <[email protected]>
Cc Paul Walmsley <[email protected]>
Cc Kevin Hilman <[email protected]>

This clock looks like the ARM Cortex-A9 MPCore PERIPHCLK, correct? From ARM Cortex-A9 MPCore Technical Reference Manual (DDI 0407G) Section 5.1 "Clocks"?

Assuming that is so, I've modified this patch appropriately, and added support to the autogeneration script to generate this clock node. Care to take a quick look at it to make sure it's okay?

- Paul

From: Santosh Shilimkar <[email protected]>
Date: Thu, 8 Sep 2011 10:52:06 +0530
Subject: [PATCH] ARM: OMAP4: clock: Add CPU local timer clock node.

Local timer clock is sourced from the CPU clock and hence changes along with CPU clock. These per CPU local timers are used as clock-events, so they need to be reconfigured on CPU frequency change as part of CPUfreq governor.

Newly introduced clockevents_reconfigure() needs to know the twd clock-rate. Provide a clock-node to make clk_get_rate() work for TWD.

Signed-off-by Santosh Shilimkar <[email protected]>
Cc Paul Walmsley <[email protected]>
Cc Kevin Hilman <[email protected]>

[paul at pwsan.com: renamed clock node to 'mpu_periphclk' to indicate that this
is the Cortex-A9 MPCore subsystem clock PERIPHCLK (DDI 0407G); moved clock and clkdev entries to match the autogenerated script output]

Signed-off-by Paul Walmsley <[email protected]>
---
 arch/arm/mach-omap2/clock44xx_data.c |    9 +++++++++
 1 files changed, 9 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/clock44xx_data.c +9 -0
index 4873c00..9684233 100644
@@ -1195,6 +1195,14 @@ static struct clk l4_wkup_clk_mux_ck = {
 	.recalc		= &omap2_clksel_recalc,
 };
 
+static struct clk mpu_periphclk = {
+	.name		= "mpu_periphclk",
+	.parent		= &dpll_mpu_ck,
+	.ops		= &clkops_null,
+	.fixed_div	= 2,
+	.recalc		= &omap_fixed_divisor_recalc,
+};
+
 static const struct clksel_rate div2_2to1_rates[] = {
 	{ .div = 1, .val = 1, .flags = RATE_IN_4430 },
 	{ .div = 2, .val = 0, .flags = RATE_IN_4430 },

@@ -3189,6 +3197,7 @@ static struct omap_clk omap44xx_clks[] = {
 	CLK(NULL,	"l4_div_ck",			&l4_div_ck,	CK_443X),
 	CLK(NULL,	"lp_clk_div_ck",		&lp_clk_div_ck,	CK_443X),
 	CLK(NULL,	"l4_wkup_clk_mux_ck",		&l4_wkup_clk_mux_ck,	CK_443X),
+	CLK(NULL,	"smp_twd",			&mpu_periphclk,	CK_443X),
 	CLK(NULL,	"ocp_abe_iclk",			&ocp_abe_iclk,	CK_443X),
 	CLK(NULL,	"per_abe_24m_fclk",		&per_abe_24m_fclk,	CK_443X),
 	CLK(NULL,	"per_abe_nc_fclk",		&per_abe_nc_fclk,	CK_443X),
Signature · 1 line
1.7.6.3
author
#10 lore raw

PATCH 7/8 OMAP4: clock: Add CPU local timer clock node.

Quoted 13 lines · Paul Walmsley

Hi Santosh,

Quoted 9 lines · Santosh Shilimkar

Local timer clock is sourced from the CPU clock and hence changes along with CPU clock. These per CPU local timers are used as clock-events, so they need to be reconfigured on CPU frequency change as part of CPUfreq governor.

Newly introduced clockevents_reconfigure() needs to know the twd clock-rate. Provide a clock-node to make clk_get_rate() work for TWD.

Quoted 8 lines
Quoted 3 lines
Signed-off-by Santosh Shilimkar <[email protected]>
Cc Paul Walmsley <[email protected]>
Cc Kevin Hilman <[email protected]>

This clock looks like the ARM Cortex-A9 MPCore PERIPHCLK, correct? ?From ARM Cortex-A9 MPCore Technical Reference Manual (DDI 0407G) Section 5.1 "Clocks"?

Yes. Peripheral clock/2

Quoted 4 lines

Assuming that is so, I've modified this patch appropriately, and added support to the autogeneration script to generate this clock node. Care to take a quick look at it to make sure it's okay?

Thanks a lot Paul. It looks good.

Regards
Santosh

#11 lore raw

PATCH 7/8 OMAP4: clock: Add CPU local timer clock node.

In reply to Santosh Shilimkar

2011/9/8 Santosh Shilimkar <[email protected]>:

Quoted 4 lines

Local timer clock is sourced from the CPU clock and hence changes along with CPU clock. These per CPU local timers are used as clock-events, so they need to be reconfigured on CPU frequency change as part of CPUfreq governor.

This requires patch 6956/2 right?
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2

Can I add your Tested-by: to the patch as well?

Yours,
Linus Walleij

author
#12 lore raw

PATCH 7/8 OMAP4: clock: Add CPU local timer clock node.

Quoted 7 lines · Linus Walleij

2011/9/8 Santosh Shilimkar <[email protected]>:

Quoted 4 lines

Local timer clock is sourced from the CPU clock and hence changes along with CPU clock. These per CPU local timers are used as clock-events, so they need to be reconfigured on CPU frequency change as part of CPUfreq governor.

Quoted 5 lines

This requires patch 6956/2 right?
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2

Can I add your Tested-by: to the patch as well?

Sure.

#13 lore raw

PATCH 7/8 OMAP4: clock: Add CPU local timer clock node.

Quoted 8 lines · Santosh
Quoted 7 lines · Linus Walleij

2011/9/8 Santosh Shilimkar <[email protected]>:

Quoted 4 lines

Local timer clock is sourced from the CPU clock and hence changes along with CPU clock. These per CPU local timers are used as clock-events, so they need to be reconfigured on CPU frequency change as part of CPUfreq governor.

Quoted 6 lines
Quoted 5 lines

This requires patch 6956/2 right?
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2

Can I add your Tested-by: to the patch as well?

Sure.

Santosh,

I've taken in Linus' patch as well as this patch while testing clk notifiers (part of common clk framework code).

Linus' patch matches the clk based on dev_id, but the clkdev entry in your patch populated dev_id with NULL and con_id with "smp_twd" so things never worked correctly. Below changed fixed it for me:

(quoted diff) +0 -0

b/arch/arm/mach-omap2/clock44xx_data.c
index ae8c292..0f8cf68 100644

arch/arm/mach-omap2/clock44xx_data.c +0 -0
@@ -4114,7 +4114,7 @@ static struct omap_clk omap44xx_clks[] = {
        CLK(NULL,       "l4_div_ck",

&l4_div_ck_hw.clk,      CK_443X),
        CLK(NULL,       "lp_clk_div_ck",
&lp_clk_div_ck_hw.clk,  CK_443X),
        CLK(NULL,       "l4_wkup_clk_mux_ck",
&l4_wkup_clk_mux_ck_hw.clk,     CK_443X),
-       CLK(NULL,       "smp_twd",
&mpu_periphclk_hw.clk,  CK_443X),
+       CLK("smp_twd",  NULL,                   &mpu_periphclk_hw.clk,
 CK_443X),
        CLK(NULL,       "ocp_abe_iclk",
&ocp_abe_iclk_hw.clk,   CK_443X),
        CLK(NULL,       "per_abe_24m_fclk",

&per_abe_24m_fclk_hw.clk, CK_443X),
CLK(NULL, "per_abe_nc_fclk",
&per_abe_nc_fclk_hw.clk, CK_443X),

A better change might be for the code in smp_twd.c to match on con_id but I'll let you guys sort that out.

Regards,
Mike

author
#14 lore raw

PATCH 7/8 OMAP4: clock: Add CPU local timer clock node.

Quoted 17 lines · Mike
Quoted 8 lines · Santosh
Quoted 7 lines · Linus Walleij

2011/9/8 Santosh Shilimkar <[email protected]>:

Quoted 4 lines

Local timer clock is sourced from the CPU clock and hence changes along with CPU clock. These per CPU local timers are used as clock-events, so they need to be reconfigured on CPU frequency change as part of CPUfreq governor.

Quoted 6 lines
Quoted 5 lines

This requires patch 6956/2 right?
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2

Can I add your Tested-by: to the patch as well?

Sure.

Quoted 9 lines

Santosh,

I've taken in Linus' patch as well as this patch while testing clk notifiers (part of common clk framework code).

Linus' patch matches the clk based on dev_id, but the clkdev entry in your patch populated dev_id with NULL and con_id with "smp_twd" so things never worked correctly. ?Below changed fixed it for me:

You are right.
When I picked up the patch while changing the OMAP44XX stuff to OMAP4430, looks like I miss-placed it.

Quoted 23 lines
arch/arm/mach-omap2/clock44xx_data.c +0 -1
index ae8c292..0f8cf68 100644
@@ -4114,7 +4114,7 @@ static struct omap_clk omap44xx_clks[] = {
 ? ? ? ?CLK(NULL, ? ? ? "l4_div_ck",
 &l4_div_ck_hw.clk, ? ? ?CK_443X),
 ? ? ? ?CLK(NULL, ? ? ? "lp_clk_div_ck",
 &lp_clk_div_ck_hw.clk, ?CK_443X),
 ? ? ? ?CLK(NULL, ? ? ? "l4_wkup_clk_mux_ck",
 &l4_wkup_clk_mux_ck_hw.clk, ? ? CK_443X),
- ? ? ? CLK(NULL, ? ? ? "smp_twd",

&mpu_periphclk_hw.clk, ?CK_443X),
+ ? ? ? CLK("smp_twd", ?NULL, ? ? ? ? ? ? ? ? ? &mpu_periphclk_hw.clk, ?CK_443X),
? ? ? ?CLK(NULL, ? ? ? "ocp_abe_iclk", &ocp_abe_iclk_hw.clk, ? CK_443X),
? ? ? ?CLK(NULL, ? ? ? "per_abe_24m_fclk", &per_abe_24m_fclk_hw.clk, ? ? ? CK_443X),
? ? ? ?CLK(NULL, ? ? ? "per_abe_nc_fclk", &per_abe_nc_fclk_hw.clk, ? ? ? ?CK_443X),

Quoted 2 lines

A better change might be for the code in smp_twd.c to match on con_id but I'll let you guys sort that out.

I guess we can stick to what Linus and others have followed. Will post an updated patch. Thanks for catch.

Regards
Santosh

author
#15 lore raw

PATCH 8/8 OMAP4: Fix the emif and dmm virtual mapping

In reply to Santosh Shilimkar

Fix the address overlap with Emulation domain (EMU).

The previous mapping was entering into EMU mapping and was not as per comments. Fix the mapping accordingly.

[girishsg at ti.com: Helped fixing comments.]
Signed-off-by Girish S G <[email protected]>
Signed-off-by Santosh Shilimkar <[email protected]>
---
 arch/arm/plat-omap/include/plat/io.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/plat-omap/include/plat/io.h +2 -2
index d72ec85..a2f7d31 100644
@@ -228,12 +228,12 @@
 
 #define OMAP44XX_EMIF2_PHYS	OMAP44XX_EMIF2_BASE
 						/* 0x4d000000 --> 0xfd200000 */
-#define OMAP44XX_EMIF2_VIRT	(OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_EMIF2_VIRT	(OMAP44XX_EMIF1_VIRT + SZ_1M)
 #define OMAP44XX_EMIF2_SIZE	SZ_1M
 
 #define OMAP44XX_DMM_PHYS	OMAP44XX_DMM_BASE
 						/* 0x4e000000 --> 0xfd300000 */
-#define OMAP44XX_DMM_VIRT	(OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_DMM_VIRT	(OMAP44XX_EMIF2_VIRT + SZ_1M)
 #define OMAP44XX_DMM_SIZE	SZ_1M
 /*
  * ----------------------------------------------------------------------------
Signature · 1 line
1.7.4.1
#16 lore raw

PATCH 8/8 OMAP4: Fix the emif and dmm virtual mapping

Quoted 17 lines · Santosh Shilimkar

Fix the address overlap with Emulation domain (EMU).

The previous mapping was entering into EMU mapping and was not as per comments. Fix the mapping accordingly.

[girishsg at ti.com: Helped fixing comments.]
Signed-off-by Girish S G <[email protected]>
Signed-off-by Santosh Shilimkar <[email protected]>
---
 arch/arm/plat-omap/include/plat/io.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/plat-omap/include/plat/io.h +0 -0
index d72ec85..a2f7d31 100644

arch/arm/plat-omap/include/plat/io.h line 231

Quoted 5 lines
arch/arm/plat-omap/include/plat/io.h +1 -1
@@ -228,12 +228,12 @@
 
 #define OMAP44XX_EMIF2_PHYS	OMAP44XX_EMIF2_BASE
 						/* 0x4d000000 --> 0xfd200000 */
-#define OMAP44XX_EMIF2_VIRT	(OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_EMIF2_VIRT	(OMAP44XX_EMIF1_VIRT + SZ_1M)

IMO, this would be much clearer (and future proof) if you used '+ OMAP44XX_EMIF1_SIZE' instead of SZ_1M.

arch/arm/plat-omap/include/plat/io.h line 236

Quoted 6 lines
arch/arm/plat-omap/include/plat/io.h +1 -1
 #define OMAP44XX_EMIF2_SIZE	SZ_1M
 
 #define OMAP44XX_DMM_PHYS	OMAP44XX_DMM_BASE
 						/* 0x4e000000 --> 0xfd300000 */
-#define OMAP44XX_DMM_VIRT	(OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_DMM_VIRT	(OMAP44XX_EMIF2_VIRT + SZ_1M)

and '+ OMAP44XX_EMIF2_SIZE' here.

arch/arm/plat-omap/include/plat/io.h line 239

Quoted 3 lines
arch/arm/plat-omap/include/plat/io.h +0 -0
 #define OMAP44XX_DMM_SIZE	SZ_1M
 /*
  * ----------------------------------------------------------------------------

Kevin

author
#17 lore raw

PATCH 8/8 OMAP4: Fix the emif and dmm virtual mapping

Quoted 20 lines · Kevin Hilman
Quoted 18 lines · Santosh Shilimkar

Fix the address overlap with Emulation domain (EMU).

The previous mapping was entering into EMU mapping and was not as per comments. Fix the mapping accordingly.

[girishsg at ti.com: Helped fixing comments.]
Signed-off-by Girish S G <[email protected]>
Signed-off-by Santosh Shilimkar <[email protected]>
---
 arch/arm/plat-omap/include/plat/io.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/plat-omap/include/plat/io.h +0 -0
index d72ec85..a2f7d31 100644
@@ -228,12 +228,12 @@
Quoted 8 lines

arch/arm/plat-omap/include/plat/io.h line 231

Quoted 4 lines
arch/arm/plat-omap/include/plat/io.h +1 -1
 #define OMAP44XX_EMIF2_PHYS	OMAP44XX_EMIF2_BASE
 						/* 0x4d000000 --> 0xfd200000 */
-#define OMAP44XX_EMIF2_VIRT	(OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_EMIF2_VIRT	(OMAP44XX_EMIF1_VIRT + SZ_1M)

IMO, this would be much clearer (and future proof) if you used '+ OMAP44XX_EMIF1_SIZE' instead of SZ_1M.

ok.

Quoted 9 lines

arch/arm/plat-omap/include/plat/io.h line 236

Quoted 6 lines
arch/arm/plat-omap/include/plat/io.h +1 -1
 #define OMAP44XX_EMIF2_SIZE	SZ_1M
 
 #define OMAP44XX_DMM_PHYS	OMAP44XX_DMM_BASE
 						/* 0x4e000000 --> 0xfd300000 */
-#define OMAP44XX_DMM_VIRT	(OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_DMM_VIRT	(OMAP44XX_EMIF2_VIRT + SZ_1M)

and '+ OMAP44XX_EMIF2_SIZE' here.

Will add OMAP44XX_EMIF_SIZE since 2 EMIFs instaces are and suppose to be identical.Almost missed this email in other traffic.

Regards
Santosh

author
#18 lore raw

PATCH 8/8 OMAP4: Fix the emif and dmm virtual mapping

Quoted 3 lines · Santosh Shilimkar
Quoted 2 lines · Kevin Hilman

Santosh Shilimkar <[email protected]> writes:

[...]

Quoted 10 lines
Quoted 10 lines

Review

Quoted 7 lines

#define OMAP44XX_EMIF2_SIZE SZ_1M

#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE

(quoted diff) +1 -1
 						/* 0x4e000000 --> 0xfd300000 */
-#define OMAP44XX_DMM_VIRT	(OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_DMM_VIRT	(OMAP44XX_EMIF2_VIRT + SZ_1M)

and '+ OMAP44XX_EMIF2_SIZE' here.

Quoted 2 lines

Will add OMAP44XX_EMIF_SIZE since 2 EMIFs instaces are and suppose to be identical.Almost missed this email in other traffic.

OPPs. It was already there. Dumb of me not using it. Below is the update what I will do.

(quoted diff) +0 -0

b/arch/arm/plat-omap/include/plat/io.h
index d72ec85..db36292 100644

arch/arm/plat-omap/include/plat/io.h +2 -3
@@ -228,13 +228,13 @@
 
 #define OMAP44XX_EMIF2_PHYS	OMAP44XX_EMIF2_BASE
 						/* 0x4d000000 --> 0xfd200000 */
-#define OMAP44XX_EMIF2_VIRT	(OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
 #define OMAP44XX_EMIF2_SIZE	SZ_1M
+#define OMAP44XX_EMIF2_VIRT	(OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF2_SIZE)
 
 #define OMAP44XX_DMM_PHYS	OMAP44XX_DMM_BASE
 						/* 0x4e000000 --> 0xfd300000 */
-#define OMAP44XX_DMM_VIRT	(OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
 #define OMAP44XX_DMM_SIZE	SZ_1M
+#define OMAP44XX_DMM_VIRT	(OMAP44XX_EMIF2_VIRT + OMAP44XX_DMM_SIZE)
 /*
  *
----------------------------------------------------------------------------

* Omap specific register access

Signature · 1 line
1.7.4.1
#19 lore raw

PATCH 8/8 OMAP4: Fix the emif and dmm virtual mapping

Quoted 29 lines · Santosh Shilimkar
Quoted 3 lines · Santosh Shilimkar
Quoted 2 lines · Kevin Hilman

Santosh Shilimkar <[email protected]> writes:

[...]

Quoted 10 lines
Quoted 10 lines

arch/arm/plat-omap/include/plat/io.h

Quoted 7 lines

#define OMAP44XX_EMIF2_SIZE SZ_1M

#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE

arch/arm/plat-omap/include/plat/io.h +1 -1
 						/* 0x4e000000 --> 0xfd300000 */
-#define OMAP44XX_DMM_VIRT	(OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_DMM_VIRT	(OMAP44XX_EMIF2_VIRT + SZ_1M)

and '+ OMAP44XX_EMIF2_SIZE' here.

Quoted 2 lines

Will add OMAP44XX_EMIF_SIZE since 2 EMIFs instaces are and suppose to be identical.Almost missed this email in other traffic.

OPPs. It was already there. Dumb of me not using it. Below is the update what I will do.

arch/arm/plat-omap/include/plat/io.h +0 -0
index d72ec85..db36292 100644

arch/arm/plat-omap/include/plat/io.h line 232

Quoted 6 lines
arch/arm/plat-omap/include/plat/io.h +1 -1
@@ -228,13 +228,13 @@
 
 #define OMAP44XX_EMIF2_PHYS	OMAP44XX_EMIF2_BASE
 						/* 0x4d000000 --> 0xfd200000 */
-#define OMAP44XX_EMIF2_VIRT	(OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
 #define OMAP44XX_EMIF2_SIZE	SZ_1M
+#define OMAP44XX_EMIF2_VIRT	(OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF2_SIZE)

This doesn't look right either.

This #define is for the *start* of EMIF2 virtual address space, so assuming the start address of EMIF2 is immediatly after EMIF1, it should be EMIF1_VIRT + EMIF1_SIZE (not EMIF2_SIZE.)

arch/arm/plat-omap/include/plat/io.h line 237

Quoted 5 lines
arch/arm/plat-omap/include/plat/io.h +1 -1
 #define OMAP44XX_DMM_PHYS	OMAP44XX_DMM_BASE
 						/* 0x4e000000 --> 0xfd300000 */
-#define OMAP44XX_DMM_VIRT	(OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
 #define OMAP44XX_DMM_SIZE	SZ_1M
+#define OMAP44XX_DMM_VIRT	(OMAP44XX_EMIF2_VIRT + OMAP44XX_DMM_SIZE)

And here, assuming DMM range is immediately after EMIF2, this should be EMIF2_VIRT + EMFI2_SIZE)

Kevin

author
#20 lore raw

PATCH 8/8 OMAP4: Fix the emif and dmm virtual mapping

Quoted 44 lines · Kevin Hilman
Quoted 30 lines · Santosh Shilimkar
Quoted 3 lines · Santosh Shilimkar
Quoted 2 lines · Kevin Hilman

Santosh Shilimkar <[email protected]> writes:

[...]

Quoted 10 lines
Quoted 10 lines

Review

Quoted 7 lines

?#define OMAP44XX_EMIF2_SIZE ? ? ? SZ_1M

?#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?/* 0x4e000000 --> 0xfd300000 */

(quoted diff) +1 -1
-#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)

and '+ OMAP44XX_EMIF2_SIZE' here.

Quoted 2 lines

Will add OMAP44XX_EMIF_SIZE since 2 EMIFs instaces are and suppose to be identical.Almost missed this email in other traffic.

OPPs. It was already there. Dumb of me not using it. Below is the update what I will do.

arch/arm/plat-omap/include/plat/io.h +0 -0
index d72ec85..db36292 100644
@@ -228,13 +228,13 @@
Quoted 5 lines

?#define OMAP44XX_EMIF2_PHYS ?OMAP44XX_EMIF2_BASE
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? /* 0x4d000000 --> 0xfd200000 */ -#define OMAP44XX_EMIF2_VIRT ?(OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET) ?#define OMAP44XX_EMIF2_SIZE ?SZ_1M
+#define OMAP44XX_EMIF2_VIRT ?(OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF2_SIZE)

This doesn't look right either.

This #define is for the *start* of EMIF2 virtual address space, so assuming the start address of EMIF2 is immediatly after EMIF1, it should be EMIF1_VIRT + EMIF1_SIZE (not EMIF2_SIZE.)

Quoted 9 lines
Quoted 5 lines

?#define OMAP44XX_DMM_PHYS ? ?OMAP44XX_DMM_BASE
? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? /* 0x4e000000 --> 0xfd300000 */ -#define OMAP44XX_DMM_VIRT ? ?(OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET) ?#define OMAP44XX_DMM_SIZE ? ?SZ_1M
+#define OMAP44XX_DMM_VIRT ? ?(OMAP44XX_EMIF2_VIRT + OMAP44XX_DMM_SIZE)

And here, assuming DMM range is immediately after EMIF2, this should be EMIF2_VIRT + EMFI2_SIZE)

I agree.

Regards
Santosh

author
#21 lore raw

cover OMAP3/4: Misc fixes and clean-up

In reply to Santosh Shilimkar

Paul,

Quoted 10 lines · Santosh Shilimkar

The series contains few fixes and clean-up for OMAP. Briefly,
- HWMOD fix for the address space count
- Improving the L3 register accesses
- Bug fix in the L3 error handler
- Sparce warning and indentation fixes in L3 error handler
- Print master id in case of L3 custom errors for better debug.
- Adding local time clock node for the CPUfreq and time re-calibration
- Fix in the address overlap for emif and emulation domain.

Quoted 9 lines

The series is tested on OMAP4430 SDP and OMAP4430 beagle and SDP.

The following changes since commit c6a389f123b9f68d605bb7e0f9b32ec1e3e14132:

Linux 3.1-rc4 (2011-08-28 21:16:01 -0700)

are available in the git repository at:
git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-rc4-omap-misc

I need your ack on below two patches so that I can re-base them and send a pull request to Tony.

OMAP4: clock: Add CPU local timer clock node.
OMAP: Fix sparse warnings in l3 error handler.

Regards
Santosh

maintainer
#22 lore raw

cover OMAP3/4: Misc fixes and clean-up

Hi Santosh

Quoted 17 lines · Santosh Shilimkar
Quoted 16 lines · Santosh Shilimkar

The series contains few fixes and clean-up for OMAP. Briefly,
- HWMOD fix for the address space count
- Improving the L3 register accesses
- Bug fix in the L3 error handler
- Sparce warning and indentation fixes in L3 error handler
- Print master id in case of L3 custom errors for better debug.
- Adding local time clock node for the CPUfreq and time re-calibration
- Fix in the address overlap for emif and emulation domain.

The series is tested on OMAP4430 SDP and OMAP4430 beagle and SDP.

The following changes since commit c6a389f123b9f68d605bb7e0f9b32ec1e3e14132:

Linux 3.1-rc4 (2011-08-28 21:16:01 -0700)

Quoted 8 lines
Quoted 3 lines

are available in the git repository at:
git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-rc4-omap-misc

I need your ack on below two patches so that I can re-base them and send a pull request to Tony.

OMAP4: clock: Add CPU local timer clock node.
OMAP: Fix sparse warnings in l3 error handler.

Are you targeting these for 3.1-rc ?

- Paul

author
#23 lore raw

cover OMAP3/4: Misc fixes and clean-up

Quoted 24 lines · Paul Walmsley

Hi Santosh

Quoted 20 lines · Santosh Shilimkar
Quoted 19 lines · Santosh Shilimkar

The series contains few fixes and clean-up for OMAP. Briefly,
- HWMOD fix for the address space count
- Improving the L3 register accesses
- Bug fix in the L3 error handler
- Sparce warning and indentation fixes in L3 error handler
- Print master id in case of L3 custom errors for better debug.
- Adding local time clock node for the CPUfreq and time re-calibration
- Fix in the address overlap for emif and emulation domain.

The series is tested on OMAP4430 SDP and OMAP4430 beagle and SDP.

The following changes since commit c6a389f123b9f68d605bb7e0f9b32ec1e3e14132:

Linux 3.1-rc4 (2011-08-28 21:16:01 -0700)

are available in the git repository at:
git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-rc4-omap-misc

Quoted 8 lines
Quoted 5 lines

I need your ack on below two patches so that I can re-base them and send a pull request to Tony.

OMAP4: clock: Add CPU local timer clock node.
OMAP: Fix sparse warnings in l3 error handler.

Are you targeting these for 3.1-rc ?

Nope. It's for 3.2 merge window.
As such, the series doesn't have any major regression fixes which should make it before 3.2

Regards
Santosh

maintainer
#24 lore raw

cover OMAP3/4: Misc fixes and clean-up

Hi

Quoted 10 lines · Santosh Shilimkar
Quoted 9 lines · Paul Walmsley

Hi Santosh

Quoted 5 lines · Santosh Shilimkar
Quoted 1 line · Santosh Shilimkar

I need your ack on below two patches so that I can re-base them and send a pull request to Tony.

Quoted 8 lines
Quoted 5 lines
Quoted 2 lines

OMAP4: clock: Add CPU local timer clock node.
OMAP: Fix sparse warnings in l3 error handler.

Are you targeting these for 3.1-rc ?

Nope. It's for 3.2 merge window.
As such, the series doesn't have any major regression fixes which should make it before 3.2

In that case, patches 1 and 7 should go in through me. The rest should go via Tony. So you can just drop 1 and 7 from your branch, I'll pull those off the list.

Some comments though: Looks like you need to repost patch 1 due to comments from Beno?t? Also, have the autogeneration scripts been updated for patch 7?

...

As far as patch 5 goes, you don't need my ack on that one, since I'm not the maintainer or original author of that code. But feel free to add a Reviewed-by:. I also tested the two L3 files with sparse and they are clean now. Thanks very much for taking the initiative on this; I personally appreciate it quite a bit, and I think having clean code increases our credibility with upstream maintainers.

- Paul

author
#25 lore raw

cover OMAP3/4: Misc fixes and clean-up

Quoted 19 lines · Paul Walmsley

Hi

Quoted 15 lines · Santosh Shilimkar
Quoted 14 lines · Paul Walmsley

Hi Santosh

Quoted 7 lines · Santosh Shilimkar
Quoted 1 line · Santosh Shilimkar

I need your ack on below two patches so that I can re-base them and send a pull request to Tony.

OMAP4: clock: Add CPU local timer clock node.
OMAP: Fix sparse warnings in l3 error handler.

Are you targeting these for 3.1-rc ?

Quoted 8 lines
Quoted 3 lines

Nope. It's for 3.2 merge window.
As such, the series doesn't have any major regression fixes which should make it before 3.2

In that case, patches 1 and 7 should go in through me. The rest should go via Tony. So you can just drop 1 and 7 from your branch, I'll pull those off the list.

Will do.

Quoted 4 lines

Some comments though: Looks like you need to repost patch 1 due to comments from Beno?t? Also, have the autogeneration scripts been updated for patch 7?

Ok. Will post updated patch1.
For the patch 7, I will align with Benoit on the autogen script. It has some differences with mainline OMAP4 clock data file.

Quoted 9 lines

...

As far as patch 5 goes, you don't need my ack on that one, since I'm not the maintainer or original author of that code. But feel free to add a Reviewed-by:. I also tested the two L3 files with sparse and they are clean now. Thanks very much for taking the initiative on this; I personally appreciate it quite a bit, and I think having clean code increases our credibility with upstream maintainers.

Actually I wanted you to have a look to ensure that we addressed the all sparce warnings. Will add your reviewed by on that patch.

Couldn't agree more on the clean code remark.

Regards
Santosh