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pcnet: Move BCR defines to header

PATCH Applied Jan Kiszka 2 participants 2 messages Sep 26, 2011 – Nov 1, 2011

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Jan Kiszka

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#0 lore raw

PATCH 1/2 pcnet: Move BCR defines to header

This moves BCR defines to the common header and immediately makes use of them to add BCR_APROMWE, replacing the open-coded write check in pcnet_aprom_writeb.

Signed-off-by Jan Kiszka <[email protected]>
---
 hw/pcnet-pci.c |    4 ++--
 hw/pcnet.c     |   18 ------------------
 hw/pcnet.h     |   19 +++++++++++++++++++
 3 files changed, 21 insertions(+), 20 deletions(-)
hw/pcnet-pci.c +2 -2
index fb2a00c..ca548bd 100644
@@ -55,9 +55,9 @@ static void pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val)
 #ifdef PCNET_DEBUG
     printf("pcnet_aprom_writeb addr=0x%08x val=0x%02x\n", addr, val);
 #endif
-    /* Check APROMWE bit to enable write access */
-    if (pcnet_bcr_readw(s,2) & 0x100)
+    if (BCR_APROMWE(s)) {
         s->prom[addr & 15] = val;
+    }
 }
 
 static uint32_t pcnet_aprom_readb(void *opaque, uint32_t addr)
hw/pcnet.c +0 -18
index cf16fd4..add3ec2 100644
@@ -58,24 +58,6 @@ struct qemu_ether_header {
     uint16_t ether_type;
 };
 
-/* BUS CONFIGURATION REGISTERS */
-#define BCR_MSRDA    0
-#define BCR_MSWRA    1
-#define BCR_MC       2
-#define BCR_LNKST    4
-#define BCR_LED1     5
-#define BCR_LED2     6
-#define BCR_LED3     7
-#define BCR_FDC      9
-#define BCR_BSBC     18
-#define BCR_EECAS    19
-#define BCR_SWS      20
-#define BCR_PLAT     22
-
-#define BCR_DWIO(S)      !!((S)->bcr[BCR_BSBC] & 0x0080)
-#define BCR_SSIZE32(S)   !!((S)->bcr[BCR_SWS ] & 0x0100)
-#define BCR_SWSTYLE(S)     ((S)->bcr[BCR_SWS ] & 0x00FF)
-
 #define CSR_INIT(S)      !!(((S)->csr[0])&0x0001)
 #define CSR_STRT(S)      !!(((S)->csr[0])&0x0002)
 #define CSR_STOP(S)      !!(((S)->csr[0])&0x0004)
hw/pcnet.h +19 -0
index cd86bde..52cc52e 100644
@@ -6,6 +6,25 @@
 
 #include "memory.h"
 
+/* BUS CONFIGURATION REGISTERS */
+#define BCR_MSRDA    0
+#define BCR_MSWRA    1
+#define BCR_MC       2
+#define BCR_LNKST    4
+#define BCR_LED1     5
+#define BCR_LED2     6
+#define BCR_LED3     7
+#define BCR_FDC      9
+#define BCR_BSBC     18
+#define BCR_EECAS    19
+#define BCR_SWS      20
+#define BCR_PLAT     22
+
+#define BCR_APROMWE(S)   !!((S)->bcr[BCR_MC  ] & 0x0100)
+#define BCR_DWIO(S)      !!((S)->bcr[BCR_BSBC] & 0x0080)
+#define BCR_SSIZE32(S)   !!((S)->bcr[BCR_SWS ] & 0x0100)
+#define BCR_SWSTYLE(S)     ((S)->bcr[BCR_SWS ] & 0x00FF)
+
 typedef struct PCNetState_st PCNetState;
 
 struct PCNetState_st {
Signature · 1 line
1.7.3.4
Applied
#1 lore raw
Quoted 5 lines · Jan Kiszka

This moves BCR defines to the common header and immediately makes use of them to add BCR_APROMWE, replacing the open-coded write check in pcnet_aprom_writeb.

Signed-off-by Jan Kiszka<[email protected]>

Applied both. Thanks.

Regards,

Anthony Liguori

Quoted 81 lines
---
  hw/pcnet-pci.c |    4 ++--
  hw/pcnet.c     |   18 ------------------
  hw/pcnet.h     |   19 +++++++++++++++++++
  3 files changed, 21 insertions(+), 20 deletions(-)
hw/pcnet-pci.c +2 -2
index fb2a00c..ca548bd 100644
@@ -55,9 +55,9 @@ static void pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val)
  #ifdef PCNET_DEBUG
      printf("pcnet_aprom_writeb addr=0x%08x val=0x%02x\n", addr, val);
  #endif
-    /* Check APROMWE bit to enable write access */
-    if (pcnet_bcr_readw(s,2)&  0x100)
+    if (BCR_APROMWE(s)) {
          s->prom[addr&  15] = val;
+    }
  }
 
  static uint32_t pcnet_aprom_readb(void *opaque, uint32_t addr)
hw/pcnet.c +0 -18
index cf16fd4..add3ec2 100644
@@ -58,24 +58,6 @@ struct qemu_ether_header {
      uint16_t ether_type;
  };
 
-/* BUS CONFIGURATION REGISTERS */
-#define BCR_MSRDA    0
-#define BCR_MSWRA    1
-#define BCR_MC       2
-#define BCR_LNKST    4
-#define BCR_LED1     5
-#define BCR_LED2     6
-#define BCR_LED3     7
-#define BCR_FDC      9
-#define BCR_BSBC     18
-#define BCR_EECAS    19
-#define BCR_SWS      20
-#define BCR_PLAT     22
-
-#define BCR_DWIO(S)      !!((S)->bcr[BCR_BSBC]&  0x0080)
-#define BCR_SSIZE32(S)   !!((S)->bcr[BCR_SWS ]&  0x0100)
-#define BCR_SWSTYLE(S)     ((S)->bcr[BCR_SWS ]&  0x00FF)
-
  #define CSR_INIT(S)      !!(((S)->csr[0])&0x0001)
  #define CSR_STRT(S)      !!(((S)->csr[0])&0x0002)
  #define CSR_STOP(S)      !!(((S)->csr[0])&0x0004)
hw/pcnet.h +19 -0
index cd86bde..52cc52e 100644
@@ -6,6 +6,25 @@
 
  #include "memory.h"
 
+/* BUS CONFIGURATION REGISTERS */
+#define BCR_MSRDA    0
+#define BCR_MSWRA    1
+#define BCR_MC       2
+#define BCR_LNKST    4
+#define BCR_LED1     5
+#define BCR_LED2     6
+#define BCR_LED3     7
+#define BCR_FDC      9
+#define BCR_BSBC     18
+#define BCR_EECAS    19
+#define BCR_SWS      20
+#define BCR_PLAT     22
+
+#define BCR_APROMWE(S)   !!((S)->bcr[BCR_MC  ]&  0x0100)
+#define BCR_DWIO(S)      !!((S)->bcr[BCR_BSBC]&  0x0080)
+#define BCR_SSIZE32(S)   !!((S)->bcr[BCR_SWS ]&  0x0100)
+#define BCR_SWSTYLE(S)     ((S)->bcr[BCR_SWS ]&  0x00FF)
+
  typedef struct PCNetState_st PCNetState;
 
  struct PCNetState_st {