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davinci: addition of emac features

PATCH New nagabhushana.netagunte at ti.com 6 participants 14 messages Sep 30, 2011 – Oct 11, 2011

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#0 lore raw

cover davinci: addition of emac features

From: Nagabhushana Netagunte <[email protected]>

These patches add features relating davinci emac driver.

First patch adds more features for EMAC-PHY auto-negotiation. Second patch adds support for RMII in da830. Patch no.3 adds support in emac driver to work with any of the active PHYs. Last patch removes config CONFIG_EMAC_MDIO_PHY_NUM which becomes obsolete due to patch number 3.

Nagabhushana Netagunte (4):
davinci: emac: add new features to autonegotiate for EMAC
da830: emac: add support for RMII
davinci: emac: add support for more than 1 PHYs
davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM

 arch/arm/cpu/arm926ejs/davinci/et1011c.c      |    6 +-
 arch/arm/include/asm/arch-davinci/emac_defs.h |    4 -
 drivers/net/davinci_emac.c                    |  206 ++++++++++++++++---------
 include/configs/da830evm.h                    |    2 +-
 include/configs/da850_am18xxevm.h             |    2 +-
 include/configs/da850_l138evm.h               |    2 +-
 include/configs/davinci_dm365evm.h            |    1 -
 include/configs/davinci_dm6467Tevm.h          |    1 -
 include/configs/davinci_dm6467evm.h           |    1 -
 include/configs/davinci_dvevm.h               |    1 -
 include/configs/davinci_schmoogie.h           |    1 -
 include/configs/davinci_sffsdr.h              |    1 -
 include/configs/davinci_sonata.h              |    1 -
 include/configs/ea20.h                        |    1 -
 include/configs/hawkboard.h                   |    1 -
 include/miiphy.h                              |   67 ++++++++-
 16 files changed, 203 insertions(+), 95 deletions(-)
#1 lore raw

PATCH 1/4 davinci: emac: add new features to autonegotiate for EMAC

From: Nagabhushana Netagunte <[email protected]>

add more features like DUPLEX, 100MB link speed etc to auto negotiate in EMAC driver. EMAC controller autonegotiates for these features with PHYs which are on the board.

---
 drivers/net/davinci_emac.c |   38 +++++++++++++++++++++----
 include/miiphy.h           |   67 +++++++++++++++++++++++++++++++++++++++++++-
 2 files changed, 98 insertions(+), 7 deletions(-)
drivers/net/davinci_emac.c +32 -6
index c0b8929..be3aabf 100644
@@ -279,20 +279,46 @@ static int gen_get_link_speed(int phy_addr)
 static int gen_auto_negotiate(int phy_addr)
 {
 	u_int16_t	tmp;
+	u_int16_t	val;
+	unsigned long	cntr = 0;
 
-	if (!davinci_eth_phy_read(phy_addr, MII_BMCR, &tmp))
+	if (!davinci_eth_phy_read(phy_addr, PHY_BMCR, &tmp))
+		return 0;
+
+	val = tmp | PHY_BMCR_DPLX | PHY_BMCR_AUTON |
+						PHY_BMCR_100MB;
+	davinci_eth_phy_write(phy_addr, PHY_BMCR, val);
+
+	if (!davinci_eth_phy_read(phy_addr, PHY_ANAR, &val))
+		return 0;
+
+	val |= (PHY_ANLPAR_TXFD | PHY_ANLPAR_TX | PHY_ANLPAR_10FD |
+							PHY_ANLPAR_10);
+	davinci_eth_phy_write(phy_addr, PHY_ANAR, val);
+
+	if (!davinci_eth_phy_read(phy_addr, PHY_BMCR, &tmp))
 		return(0);
 
 	/* Restart Auto_negotiation  */
-	tmp |= BMCR_ANENABLE;
-	davinci_eth_phy_write(phy_addr, MII_BMCR, tmp);
+	tmp |= PHY_BMCR_RST_NEG;
+	davinci_eth_phy_write(phy_addr, PHY_BMCR, tmp);
 
 	/*check AutoNegotiate complete */
-	udelay (10000);
-	if (!davinci_eth_phy_read(phy_addr, MII_BMSR, &tmp))
+	do {
+		udelay(40000);
+		if (!davinci_eth_phy_read(phy_addr, PHY_BMSR, &tmp))
+			return 0;
+
+		if (tmp & PHY_BMSR_AUTN_COMP)
+			break;
+
+		cntr++;
+	} while (cntr < 200);
+
+	if (!davinci_eth_phy_read(phy_addr, PHY_BMSR, &tmp))
 		return(0);
 
-	if (!(tmp & BMSR_ANEGCOMPLETE))
+	if (!(tmp & PHY_BMSR_AUTN_COMP))
 		return(0);
 
 	return(gen_get_link_speed(phy_addr));
include/miiphy.h +66 -1

73 lines not on this page · raw message

Signature · 1 line
1.6.2.4
#2 lore raw

PATCH 1/4 davinci: emac: add new features to autonegotiate for EMAC

Quoted 8 lines · nagabhushana.netagunte at ti.com

From: Nagabhushana Netagunte <[email protected]>

add more features like DUPLEX, 100MB link speed etc to auto negotiate in EMAC driver. EMAC controller autonegotiates for these features with PHYs which are on the board.

I tried this on a board I am developing with an OMAP-L138. I have a managed switch and tried a few different port settings (auto negotiate enabled and disabled etc.) with no problems at all. If you like, please feel free to add:

Bye for now,

Signature · 3 lines
Laurence Withers, <[email protected]>                http://www.guralp.com/
Direct tel:+447753988197 or tel:+443333408643               Software Engineer
General support queries: <[email protected]>         CMG-DCM CMG-EAM CMG-NAM
#3 lore raw

PATCH 1/4 davinci: emac: add new features to autonegotiate for EMAC

Laurence,

Quoted 7 lines · Laurence Withers
Quoted 6 lines · nagabhushana.netagunte at ti.com

From: Nagabhushana Netagunte <[email protected]>

add more features like DUPLEX, 100MB link speed etc to auto negotiate in EMAC driver. EMAC controller autonegotiates for these features with PHYs which are on the board.

Quoted 6 lines
Quoted 2 lines

I tried this on a board I am developing with an OMAP-L138. I have a managed switch and tried a few different port settings (auto negotiate enabled and disabled etc.) with no problems at all. If you like, please feel free to add:

Thank you for testing!
-Nag

Quoted 7 lines

Bye for now,

Signature · 3 lines
Laurence Withers, <[email protected]>                http://www.guralp.com/
Direct tel:+447753988197 or tel:+443333408643               Software Engineer
General support queries: <[email protected]>         CMG-DCM CMG-EAM CMG-NAM
#4 lore raw

PATCH 1/4 davinci: emac: add new features to autonegotiate for EMAC

In reply to Laurence Withers

Laurence,

Quoted 7 lines · Laurence Withers
Quoted 6 lines · nagabhushana.netagunte at ti.com

From: Nagabhushana Netagunte <[email protected]>

add more features like DUPLEX, 100MB link speed etc to auto negotiate in EMAC driver. EMAC controller autonegotiates for these features with PHYs which are on the board.

Quoted 7 lines
Quoted 2 lines

I tried this on a board I am developing with an OMAP-L138. I have a managed switch and tried a few different port settings (auto negotiate enabled and disabled etc.) with no problems at all. If you like, please feel free to add:

Thank you!
-Manju

Quoted 6 lines

Bye for now,

Signature · 3 lines
Laurence Withers, <[email protected]>                http://www.guralp.com/
Direct tel:+447753988197 or tel:+443333408643               Software Engineer
General support queries: <[email protected]>         CMG-DCM CMG-EAM CMG-NAM
#5 lore raw

PATCH 2/4 da830: emac: add support for RMII

In reply to nagabhushana.netagunte at ti.com

From: Nagabhushana Netagunte <[email protected]>

add support for RMII in davinci EMAC driver for da830. da850 RMII support existed already in the driver. New configs are added to extend this support for da830.

---
 drivers/net/davinci_emac.c        |    6 +++---
 include/configs/da830evm.h        |    1 +
 include/configs/da850_am18xxevm.h |    1 +
 include/configs/da850_l138evm.h   |    1 +
 4 files changed, 6 insertions(+), 3 deletions(-)
drivers/net/davinci_emac.c +3 -3
index be3aabf..0d67a06 100644
@@ -246,7 +246,7 @@ static int gen_get_link_speed(int phy_addr)
 	if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) &&
 			(tmp & 0x04)) {
 #if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \
-		defined(CONFIG_MACH_DAVINCI_DA850_EVM)
+		defined(CONFIG_MACH_DAVINCI_DA8XX_EVM)
 		davinci_eth_phy_read(phy_addr, MII_LPA, &tmp);
 
 		/* Speed doesn't matter, there is no setting for it in EMAC. */
@@ -381,7 +381,7 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis)
 #endif
 
 #if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \
-	defined(CONFIG_MACH_DAVINCI_DA850_EVM)
+	defined(CONFIG_MACH_DAVINCI_DA8XX_EVM)
 	adap_ewrap->c0rxen = adap_ewrap->c1rxen = adap_ewrap->c2rxen = 0;
 	adap_ewrap->c0txen = adap_ewrap->c1txen = adap_ewrap->c2txen = 0;
 	adap_ewrap->c0miscen = adap_ewrap->c1miscen = adap_ewrap->c2miscen = 0;
@@ -541,7 +541,7 @@ static void davinci_eth_close(struct eth_device *dev)
 #endif
 
 #if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \
-	defined(CONFIG_MACH_DAVINCI_DA850_EVM)
+	defined(CONFIG_MACH_DAVINCI_DA8XX_EVM)
 	adap_ewrap->c0rxen = adap_ewrap->c1rxen = adap_ewrap->c2rxen = 0;
 	adap_ewrap->c0txen = adap_ewrap->c1txen = adap_ewrap->c2txen = 0;
 	adap_ewrap->c0miscen = adap_ewrap->c1miscen = adap_ewrap->c2miscen = 0;
include/configs/da830evm.h +1 -0
index a451513..b61443a 100644
@@ -36,6 +36,7 @@
 #define CONFIG_MACH_DAVINCI_DA830_EVM
 #define CONFIG_ARM926EJS		/* arm926ejs CPU core */
 #define CONFIG_SOC_DA8XX		/* TI DA8xx SoC */
+#define CONFIG_MACH_DAVINCI_DA8XX_EVM
 #define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
 #define CONFIG_SYS_OSCIN_FREQ		24000000
 #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
include/configs/da850_am18xxevm.h +1 -0
index b525f14..8a65956 100644
@@ -36,6 +36,7 @@
 #define CONFIG_MACH_DAVINCI_DA850_EVM
 #define CONFIG_ARM926EJS		/* arm926ejs CPU core */
 #define CONFIG_SOC_DA8XX		/* TI DA8xx SoC */
+#define CONFIG_MACH_DAVINCI_DA8XX_EVM
 #define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
 #define CONFIG_SYS_OSCIN_FREQ		24000000
 #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
include/configs/da850_l138evm.h +1 -0
index 9e4a652..afe00e8 100644
@@ -36,6 +36,7 @@
 #define CONFIG_MACH_DAVINCI_DA850_EVM
 #define CONFIG_ARM926EJS		/* arm926ejs CPU core */
 #define CONFIG_SOC_DA8XX		/* TI DA8xx SoC */
+#define CONFIG_MACH_DAVINCI_DA8XX_EVM
 #define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
 #define CONFIG_SYS_OSCIN_FREQ		24000000
 #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
Signature · 1 line
1.6.2.4
#6 lore raw

PATCH 2/4 da830: emac: add support for RMII

drivers/net/davinci_emac.c static int gen_get_link_speed(int phy_addr) · line 248

Quoted 6 lines · On Friday, September 30, 2011 07:57:10 nagabhushana.netagunte at ti.com wrote:
drivers/net/davinci_emac.c +0 -0
@@ -246,7 +246,7 @@ static int gen_get_link_speed(int phy_addr)
 	if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) &&
 			(tmp & 0x04)) {
 #if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \

there's a common CONFIG_RMII symbol already ...

drivers/net/davinci_emac.c static int gen_get_link_speed(int phy_addr) · line 249

Quoted 2 lines
drivers/net/davinci_emac.c +1 -1
-		defined(CONFIG_MACH_DAVINCI_DA850_EVM)
+		defined(CONFIG_MACH_DAVINCI_DA8XX_EVM)

maybe it's just me, but board level defines in an emac driver make no sense -mike

#7 lore raw

PATCH 2/4 da830: emac: add support for RMII

Quoted 10 lines · Mike Frysinger

drivers/net/davinci_emac.c static int gen_get_link_speed(int phy_addr) · line 248

Quoted 6 lines · On Friday, September 30, 2011 07:57:10 nagabhushana.netagunte at ti.com wrote:
drivers/net/davinci_emac.c +0 -0
@@ -246,7 +246,7 @@ static int gen_get_link_speed(int phy_addr)
 	if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) &&
 			(tmp & 0x04)) {
 #if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \

there's a common CONFIG_RMII symbol already ...

Quoted 4 lines

drivers/net/davinci_emac.c static int gen_get_link_speed(int phy_addr) · line 249

Quoted 2 lines
drivers/net/davinci_emac.c +1 -1
-		defined(CONFIG_MACH_DAVINCI_DA850_EVM)
+		defined(CONFIG_MACH_DAVINCI_DA8XX_EVM)

maybe it's just me, but board level defines in an emac driver make no sense

No, it is not just you ;)
Davinci EMAC is used also in non davinci SoCs and restricting its features to some board (or family of boards) indeed makes no sense. There must be a good reason for doing so, otherwise that board specific config should be removed.

Signature · 2 lines
Regards,
Igor.
#8 lore raw

PATCH 2/4 da830: emac: add support for RMII

In reply to Mike Frysinger
Quoted 10 lines · Mike Frysinger

drivers/net/davinci_emac.c static int gen_get_link_speed(int phy_addr) · line 248

Quoted 6 lines · On Friday, September 30, 2011 07:57:10 nagabhushana.netagunte at ti.com wrote:
drivers/net/davinci_emac.c +0 -0
@@ -246,7 +246,7 @@ static int gen_get_link_speed(int phy_addr)
 	if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) &&
 			(tmp & 0x04)) {
 #if defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \

there's a common CONFIG_RMII symbol already ...

Quoted 4 lines

drivers/net/davinci_emac.c static int gen_get_link_speed(int phy_addr) · line 249

Quoted 2 lines
drivers/net/davinci_emac.c +1 -1
-		defined(CONFIG_MACH_DAVINCI_DA850_EVM)
+		defined(CONFIG_MACH_DAVINCI_DA8XX_EVM)

maybe it's just me, but board level defines in an emac driver make no sense

This led me to look a bit more closely at this code, and I think there is something wrong with it. Under Linux, I am able to run in RMII mode at either 10BASE-T or 100BASE-TX, either by forcing it on the board with ethtool or by forcing it on the managed switch.

However, the driver in U-Boot fails to work with 10BASE-T altogether. A simple change to #if defined(CONFIG_SOC_DA8XX) doesn't seem to resolve the situation so it would appear there are some bugs in the TI EMAC driver. I also note it doesn't reset the PHY properly as if I reboot from Linux with the PHY forced to 10BASE-T then U-Boot is no longer able to get the link up.

Bye for now,

Signature · 3 lines
Laurence Withers, <[email protected]>                http://www.guralp.com/
Direct tel:+447753988197 or tel:+443333408643               Software Engineer
General support queries: <[email protected]>         CMG-DCM CMG-EAM CMG-NAM
#9 lore raw

PATCH 3/4 davinci: emac: add support for more than 1 PHYs

In reply to nagabhushana.netagunte at ti.com

From: Nagabhushana Netagunte <[email protected]>

add support for more than 1 PHYs. Many of the davinci platforms have more than 1 PHYs on thier board. This patch extends support in davinci emac driver for upto 3 PHYs.

---
 drivers/net/davinci_emac.c |  148 +++++++++++++++++++++++++++-----------------
 1 files changed, 90 insertions(+), 58 deletions(-)
drivers/net/davinci_emac.c +90 -58
index 0d67a06..ed8fbfe 100644
@@ -81,9 +81,12 @@ static int			emac_rx_queue_active = 0;
 static unsigned char		emac_rx_buffers[EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)];
 
 /* PHY address for a discovered PHY (0xff - not found) */
-static volatile u_int8_t	active_phy_addr = 0xff;
+static volatile u_int8_t	active_phy_addr[3] = { 0xff, 0xff, 0xff };
 
-phy_t				phy;
+/* number of PHY found active */
+static volatile u_int8_t	num_phy;
+
+phy_t				phy[3];
 
 static int davinci_eth_set_mac_addr(struct eth_device *dev)
 {
@@ -147,27 +150,30 @@ static int davinci_eth_phy_detect(void)
 {
 	u_int32_t	phy_act_state;
 	int		i;
+	int		j;
+	unsigned int	count = 0;
+
+	active_phy_addr[0] = 0xff;
+	active_phy_addr[1] = 0xff;
+	active_phy_addr[2] = 0xff;
 
-	active_phy_addr = 0xff;
+	udelay(1000);
+	phy_act_state = readl(&adap_mdio->ALIVE);
 
-	phy_act_state = readl(&adap_mdio->ALIVE) & EMAC_MDIO_PHY_MASK;
 	if (phy_act_state == 0)
-		return(0);				/* No active PHYs */
+		return 0;		/* No active PHYs */
 
 	debug_emac("davinci_eth_phy_detect(), ALIVE = 0x%08x\n", phy_act_state);
 
-	for (i = 0; i < 32; i++) {
+	for (i = 0, j = 0; i < 32; i++)
 		if (phy_act_state & (1 << i)) {
-			if (phy_act_state & ~(1 << i))
-				return(0);		/* More than one PHY */
-			else {
-				active_phy_addr = i;
-				return(1);
-			}
+			count++;
+			active_phy_addr[j++] = i;
 		}
-	}
 
-	return(0);	/* Just to make GCC happy */
+	num_phy = count;
+
+	return count;
 }
 
 
@@ -236,7 +242,18 @@ static int gen_is_phy_connected(int phy_addr)
 {
 	u_int16_t	dummy;
 
-	return(davinci_eth_phy_read(phy_addr, MII_PHYSID1, &dummy));
+	return davinci_eth_phy_read(phy_addr, PHY_PHYIDR1, &dummy);
+}
+
+static int get_active_phy(void)
+{
+	int i;
+
+	for (i = 0; i < num_phy; i++)
+		if (phy[i].get_link_speed(active_phy_addr[i]))
+			return i;
+
+	return -1;	/* Return error if no link */
 }
 
 static int gen_get_link_speed(int phy_addr)
@@ -362,6 +379,7 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis)
 	dv_reg_p		addr;
 	u_int32_t		clkdiv, cnt;
 	volatile emac_desc	*rx_desc;
+	int			index;
 
 	debug_emac("+ emac_open\n");
 
@@ -460,7 +478,8 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis)
 	/* We need to wait for MDIO to start */
 	udelay(1000);
 
-	if (!phy.get_link_speed(active_phy_addr))
+	index = get_active_phy();
+	if (index == -1)
 		return(0);
 
 	emac_gigabit_enable();
@@ -559,12 +578,12 @@ static int davinci_eth_send_packet (struct eth_device *dev,
 					volatile void *packet, int length)
 {
 	int ret_status = -1;
-
+	int index;
 	tx_send_loop = 0;
 
-	/* Return error if no link */
-	if (!phy.get_link_speed (active_phy_addr)) {
-		printf ("WARN: emac_send_packet: No link\n");
+	index = get_active_phy();
+	if (index == -1) {
+		printf(" WARN: emac_send_packet: No link\n");
 		return (ret_status);
 	}
 
@@ -588,7 +607,7 @@ static int davinci_eth_send_packet (struct eth_device *dev,
 
 	/* Wait for packet to complete or link down */
 	while (1) {
-		if (!phy.get_link_speed (active_phy_addr)) {
+		if (!phy[index].get_link_speed(active_phy_addr[index])) {
 			davinci_eth_ch_teardown (EMAC_CH_TX);
 			return (ret_status);
 		}
@@ -685,6 +704,7 @@ int davinci_emac_initialize(void)
 	u_int32_t	phy_id;
 	u_int16_t	tmp;
 	int		i;
+	int		ret;
 	struct eth_device *dev;
 
 	dev = malloc(sizeof *dev);
@@ -709,7 +729,7 @@ int davinci_emac_initialize(void)
 	for (i = 0; i < 256; i++) {
 		if (readl(&adap_mdio->ALIVE))
 			break;
-		udelay(10);
+		udelay(1000);
 	}
 
 	if (i >= 256) {
@@ -717,57 +737,69 @@ int davinci_emac_initialize(void)
 		return(0);
 	}
 
-	/* Find if a PHY is connected and get it's address */
-	if (!davinci_eth_phy_detect())
+	/* Find if PHY(s) is/are connected */
+	ret = davinci_eth_phy_detect();
+	if (!ret)
 		return(0);
+	else
+		printf(" %d ETH PHY detected\n", ret);
 
 	/* Get PHY ID and initialize phy_ops for a detected PHY */
-	if (!davinci_eth_phy_read(active_phy_addr, MII_PHYSID1, &tmp)) {
-		active_phy_addr = 0xff;
-		return(0);
-	}
+	for (i = 0; i < num_phy; i++) {
+		if (!davinci_eth_phy_read(active_phy_addr[i], PHY_PHYIDR1,
+							&tmp)) {
+			active_phy_addr[i] = 0xff;
+			continue;
+		}
 
-	phy_id = (tmp << 16) & 0xffff0000;
+		phy_id = (tmp << 16) & 0xffff0000;
 
-	if (!davinci_eth_phy_read(active_phy_addr, MII_PHYSID2, &tmp)) {
-		active_phy_addr = 0xff;
-		return(0);
-	}
+		if (!davinci_eth_phy_read(active_phy_addr[i], PHY_PHYIDR2,
+							&tmp)) {
+			active_phy_addr[i] = 0xff;
+			continue;
+		}
 
-	phy_id |= tmp & 0x0000ffff;
+		phy_id |= tmp & 0x0000ffff;
 
-	switch (phy_id) {
+		switch (phy_id) {
 		case PHY_LXT972:
-			sprintf(phy.name, "LXT972 @ 0x%02x", active_phy_addr);
-			phy.init = lxt972_init_phy;
-			phy.is_phy_connected = lxt972_is_phy_connected;
-			phy.get_link_speed = lxt972_get_link_speed;
-			phy.auto_negotiate = lxt972_auto_negotiate;
+			sprintf(phy[i].name, "LXT972 @ 0x%02x",
+						active_phy_addr[i]);
+			phy[i].init = lxt972_init_phy;
+			phy[i].is_phy_connected = lxt972_is_phy_connected;
+			phy[i].get_link_speed = lxt972_get_link_speed;
+			phy[i].auto_negotiate = lxt972_auto_negotiate;
 			break;
 		case PHY_DP83848:
-			sprintf(phy.name, "DP83848 @ 0x%02x", active_phy_addr);
-			phy.init = dp83848_init_phy;
-			phy.is_phy_connected = dp83848_is_phy_connected;
-			phy.get_link_speed = dp83848_get_link_speed;
-			phy.auto_negotiate = dp83848_auto_negotiate;
+			sprintf(phy[i].name, "DP83848 @ 0x%02x",
+						active_phy_addr[i]);
+			phy[i].init = dp83848_init_phy;
+			phy[i].is_phy_connected = dp83848_is_phy_connected;
+			phy[i].get_link_speed = dp83848_get_link_speed;
+			phy[i].auto_negotiate = dp83848_auto_negotiate;
 			break;
 		case PHY_ET1011C:
-			sprintf(phy.name, "ET1011C @ 0x%02x", active_phy_addr);
-			phy.init = gen_init_phy;
-			phy.is_phy_connected = gen_is_phy_connected;
-			phy.get_link_speed = et1011c_get_link_speed;
-			phy.auto_negotiate = gen_auto_negotiate;
+			sprintf(phy[i].name, "ET1011C @ 0x%02x",
+						active_phy_addr[i]);
+			phy[i].init = gen_init_phy;
+			phy[i].is_phy_connected = gen_is_phy_connected;
+			phy[i].get_link_speed = et1011c_get_link_speed;
+			phy[i].auto_negotiate = gen_auto_negotiate;
 			break;
 		default:
-			sprintf(phy.name, "GENERIC @ 0x%02x", active_phy_addr);
-			phy.init = gen_init_phy;
-			phy.is_phy_connected = gen_is_phy_connected;
-			phy.get_link_speed = gen_get_link_speed;
-			phy.auto_negotiate = gen_auto_negotiate;
-	}
+			sprintf(phy[i].name, "GENERIC @ 0x%02x",
+						active_phy_addr[i]);
+			phy[i].init = gen_init_phy;
+			phy[i].is_phy_connected = gen_is_phy_connected;
+			phy[i].get_link_speed = gen_get_link_speed;
+			phy[i].auto_negotiate = gen_auto_negotiate;
+		}
 
-	printf("Ethernet PHY: %s\n", phy.name);
+		printf("Ethernet PHY: %s\n", phy[i].name);
 
-	miiphy_register(phy.name, davinci_mii_phy_read, davinci_mii_phy_write);
+		miiphy_register(phy[i].name, davinci_mii_phy_read,
+						davinci_mii_phy_write);
+	}
 	return(1);
 }
Signature · 1 line
1.6.2.4
#10 lore raw

PATCH 3/4 davinci: emac: add support for more than 1 PHYs

Quoted 3 lines · nagabhushana.netagunte at ti.com

add support for more than 1 PHYs. Many of the davinci platforms have more than 1 PHYs on thier board. This patch extends support in davinci emac driver for upto 3 PHYs.

As a nitpick, there is a typo in "thier", which should be "their".

But a real question: where does the number 3 come from? It seems rather arbitrary, at least without any explanatory comments. The MDIO interface can support up to 31 devices, so perhaps you should allow for that many PHYs? (Or perhaps a limit configurable with a #define, as it would seem wasteful to allocate memory for 31 phy_t structures when I doubt there are any boards that could truly take advantage of that).

Bye for now,

Signature · 3 lines
Laurence Withers, <[email protected]>                http://www.guralp.com/
Direct tel:+447753988197 or tel:+443333408643               Software Engineer
General support queries: <[email protected]>         CMG-DCM CMG-EAM CMG-NAM
#11 lore raw

PATCH 3/4 davinci: emac: add support for more than 1 PHYs

Laurence,

Quoted 6 lines · Laurence Withers
Quoted 3 lines · nagabhushana.netagunte at ti.com

add support for more than 1 PHYs. Many of the davinci platforms have more than 1 PHYs on thier board. This patch extends support in davinci emac driver for upto 3 PHYs.

As a nitpick, there is a typo in "thier", which should be "their".

Thanks!

Quoted 3 lines

But a real question: where does the number 3 come from? It seems rather arbitrary, at least without any explanatory comments. The MDIO interface can support up to 31 devices, so perhaps you should allow for that many PHYs? (Or perhaps a limit configurable with a #define, as it would seem wasteful to allocate memory for 31 phy_t structures when I doubt there are any boards that could truly take advantage of that).

Agreed. The reason why it is 3 is because it is currently detecting only 3 at the max (on DA830), although the support is for 32 nos. We will #define it is 3 and latter boards can possibly change that depending on the board support.

Thx and Regards,
-Mat anju

Quoted 7 lines

Bye for now,

Signature · 3 lines
Laurence Withers, <[email protected]>                http://www.guralp.com/
Direct tel:+447753988197 or tel:+443333408643               Software Engineer
General support queries: <[email protected]>         CMG-DCM CMG-EAM CMG-NAM
#12 lore raw

PATCH 3/4 davinci: emac: add support for more than 1 PHYs

In reply to nagabhushana.netagunte at ti.com

Dear nagabhushana.netagunte at ti.com,

Quoted 11 lines · In message <[email protected]>…

From: Nagabhushana Netagunte <[email protected]>

add support for more than 1 PHYs. Many of the davinci platforms have more than 1 PHYs on thier board. This patch extends support in davinci emac driver for upto 3 PHYs.

---
 drivers/net/davinci_emac.c |  148 +++++++++++++++++++++++++++-----------------
 1 files changed, 90 insertions(+), 58 deletions(-)

Checkpatch says:

total: 0 errors, 2 warnings, 235 lines checked

Please clean up and resubmit. Thanks.

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"A great many people think they are thinking when they are merely re-
arranging their prejudices."                          - William James
#13 lore raw

PATCH 4/4 davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM

In reply to nagabhushana.netagunte at ti.com

From: Nagabhushana Netagunte <[email protected]>

remove macro CONFIG_EMAC_MDIO_PHY_NUM and depending macro EMAC_MDIO_PHY_NUM as they are no longer needed with the support for more than 1 PHYs in davinci emac driver.davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM

---
 arch/arm/cpu/arm926ejs/davinci/et1011c.c      |    6 ++----
 arch/arm/include/asm/arch-davinci/emac_defs.h |    4 ----
 drivers/net/davinci_emac.c                    |   14 +++++++-------
 include/configs/da830evm.h                    |    1 -
 include/configs/da850_am18xxevm.h             |    1 -
 include/configs/da850_l138evm.h               |    1 -
 include/configs/davinci_dm365evm.h            |    1 -
 include/configs/davinci_dm6467Tevm.h          |    1 -
 include/configs/davinci_dm6467evm.h           |    1 -
 include/configs/davinci_dvevm.h               |    1 -
 include/configs/davinci_schmoogie.h           |    1 -
 include/configs/davinci_sffsdr.h              |    1 -
 include/configs/davinci_sonata.h              |    1 -
 include/configs/ea20.h                        |    1 -
 include/configs/hawkboard.h                   |    1 -
 15 files changed, 9 insertions(+), 27 deletions(-)
arch/arm/cpu/arm926ejs/davinci/et1011c.c +2 -4
index da07345..df35e44 100644
@@ -39,11 +39,9 @@ int et1011c_get_link_speed(int phy_addr)
 	u_int16_t	data;
 
 	if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &data) && (data & 0x04)) {
-		davinci_eth_phy_read(EMAC_MDIO_PHY_NUM,
-				MII_PHY_CONFIG_REG, &data);
+		davinci_eth_phy_read(phy_addr, MII_PHY_CONFIG_REG, &data);
 		/* Enable 125MHz clock sourced from PHY */
-		davinci_eth_phy_write(EMAC_MDIO_PHY_NUM,
-			MII_PHY_CONFIG_REG,
+		davinci_eth_phy_write(phy_addr, MII_PHY_CONFIG_REG,
 			data | PHY_SYS_CLK_EN);
 		return (1);
 	}
arch/arm/include/asm/arch-davinci/emac_defs.h +0 -4
index 4a4ee04..21e1fd7 100644
@@ -84,10 +84,6 @@
 #define EMAC_MDIO_CLOCK_FREQ		2000000		/* 2.0 MHz */
 #endif
 
-/* PHY mask - set only those phy number bits where phy is/can be connected */
-#define EMAC_MDIO_PHY_NUM           CONFIG_EMAC_MDIO_PHY_NUM
-#define EMAC_MDIO_PHY_MASK          (1 << EMAC_MDIO_PHY_NUM)
-
 /* Ethernet Min/Max packet size */
 #define EMAC_MIN_ETHERNET_PKT_SIZE	60
 #define EMAC_MAX_ETHERNET_PKT_SIZE	1518
drivers/net/davinci_emac.c +7 -7
index ed8fbfe..2af7026 100644
@@ -48,9 +48,9 @@ unsigned int	emac_dbg = 0;
 #define debug_emac(fmt,args...)	if (emac_dbg) printf(fmt,##args)
 
 #ifdef DAVINCI_EMAC_GIG_ENABLE
-#define emac_gigabit_enable()	davinci_eth_gigabit_enable()
+#define emac_gigabit_enable(phy_addr)	davinci_eth_gigabit_enable(phy_addr)
 #else
-#define emac_gigabit_enable()	/* no gigabit to enable */
+#define emac_gigabit_enable(phy_addr)	/* no gigabit to enable */
 #endif
 
 static void davinci_eth_mdio_enable(void);
@@ -355,11 +355,11 @@ static int davinci_mii_phy_write(const char *devname, unsigned char addr, unsign
 }
 #endif
 
-static void  __attribute__((unused)) davinci_eth_gigabit_enable(void)
+static void  __attribute__((unused)) davinci_eth_gigabit_enable(int phy_addr)
 {
 	u_int16_t data;
 
-	if (davinci_eth_phy_read(EMAC_MDIO_PHY_NUM, 0, &data)) {
+	if (davinci_eth_phy_read(phy_addr, 0, &data)) {
 		if (data & (1 << 6)) { /* speed selection MSB */
 			/*
 			 * Check if link detected is giga-bit
@@ -482,7 +482,7 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis)
 	if (index == -1)
 		return(0);
 
-	emac_gigabit_enable();
+	emac_gigabit_enable(active_phy_addr[index]);
 
 	/* Start receive process */
 	writel((u_int32_t)emac_rx_desc, &adap_emac->RX0HDP);
@@ -587,7 +587,7 @@ static int davinci_eth_send_packet (struct eth_device *dev,
 		return (ret_status);
 	}
 
-	emac_gigabit_enable();
+	emac_gigabit_enable(active_phy_addr[index]);
 
 	/* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */
 	if (length < EMAC_MIN_ETHERNET_PKT_SIZE) {
@@ -612,7 +612,7 @@ static int davinci_eth_send_packet (struct eth_device *dev,
 			return (ret_status);
 		}
 
-		emac_gigabit_enable();
+		emac_gigabit_enable(active_phy_addr[index]);
 
 		if (readl(&adap_emac->TXINTSTATRAW) & 0x01) {
 			ret_status = length;
include/configs/da830evm.h +0 -1
index b61443a..eaf40ea 100644
@@ -88,7 +88,6 @@
  * Network & Ethernet Configuration
  */
 #ifdef CONFIG_DRIVER_TI_EMAC
-#define CONFIG_EMAC_MDIO_PHY_NUM	1
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
include/configs/da850_am18xxevm.h +0 -1
index 8a65956..47b7e70 100644
@@ -125,7 +125,6 @@
  * Network & Ethernet Configuration
  */
 #ifdef CONFIG_DRIVER_TI_EMAC
-#define CONFIG_EMAC_MDIO_PHY_NUM	0
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
include/configs/da850_l138evm.h +0 -1
index afe00e8..abaa45d 100644
@@ -118,7 +118,6 @@
  * Network & Ethernet Configuration
  */
 #ifdef CONFIG_DRIVER_TI_EMAC
-#define CONFIG_EMAC_MDIO_PHY_NUM	0
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
include/configs/davinci_dm365evm.h +0 -1
index 28b9db9..f80de3d 100644
@@ -60,7 +60,6 @@
 
 /* Network Configuration */
 #define CONFIG_DRIVER_TI_EMAC
-#define CONFIG_EMAC_MDIO_PHY_NUM	0
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
include/configs/davinci_dm6467Tevm.h +0 -1
index d4eaeab..33b3923 100644
@@ -85,7 +85,6 @@ extern unsigned int davinci_arm_clk_get(void);
 
 /* Network & Ethernet Configuration */
 #define CONFIG_DRIVER_TI_EMAC
-#define CONFIG_EMAC_MDIO_PHY_NUM	1
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
include/configs/davinci_dm6467evm.h +0 -1
index 8b33288..7a09bd8 100644
@@ -84,7 +84,6 @@ extern unsigned int davinci_arm_clk_get(void);
 
 /* Network & Ethernet Configuration */
 #define CONFIG_DRIVER_TI_EMAC
-#define CONFIG_EMAC_MDIO_PHY_NUM	1
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
include/configs/davinci_dvevm.h +0 -1
index 2e56501..d13ccb5 100644
@@ -104,7 +104,6 @@
 /* Network & Ethernet Configuration */
 /*==================================*/
 #define CONFIG_DRIVER_TI_EMAC
-#define CONFIG_EMAC_MDIO_PHY_NUM	1
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
include/configs/davinci_schmoogie.h +0 -1
index 29a3db7..8630dff 100644
@@ -67,7 +67,6 @@
 /* Network & Ethernet Configuration */
 /*==================================*/
 #define CONFIG_DRIVER_TI_EMAC
-#define CONFIG_EMAC_MDIO_PHY_NUM	1
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
include/configs/davinci_sffsdr.h +0 -1
index 3c1ff28..f521765 100644
@@ -64,7 +64,6 @@
 #define CONFIG_SYS_I2C_SLAVE		10	/* Bogus, master-only in U-Boot */
 /* Network & Ethernet Configuration */
 #define CONFIG_DRIVER_TI_EMAC
-#define CONFIG_EMAC_MDIO_PHY_NUM	1
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
include/configs/davinci_sonata.h +0 -1
index 00b1068..97b6d8d 100644
@@ -100,7 +100,6 @@
 /* Network & Ethernet Configuration */
 /*==================================*/
 #define CONFIG_DRIVER_TI_EMAC
-#define CONFIG_EMAC_MDIO_PHY_NUM	1
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
include/configs/ea20.h +0 -1
index 48ce945..6da60f1 100644
@@ -86,7 +86,6 @@
  * Network & Ethernet Configuration
  */
 #ifdef CONFIG_DRIVER_TI_EMAC
-#define CONFIG_EMAC_MDIO_PHY_NUM	0
 #define CONFIG_MII
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_DNS
include/configs/hawkboard.h +0 -1
index 23a88d0..1bf6a16 100644
@@ -83,7 +83,6 @@
 /*
  * Network & Ethernet Configuration
  */
-#define CONFIG_EMAC_MDIO_PHY_NUM	0x7
 #if !defined(CONFIG_NAND_SPL)
 #define CONFIG_DRIVER_TI_EMAC
 #endif
Signature · 1 line
1.6.2.4