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Sparse fixes for tegra

PATCH Superseded Olof Johansson 6 participants 39 messages Oct 7, 2011 – Oct 13, 2011 1 message not in the archive

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#0 lore raw

cover Sparse fixes for tegra

Some trivial fixes removing sparse warnings on tegra code.

-Olof

#1 lore raw

PATCH 1/14 ARM: tegra: add __force to IO_ADDRESS

Kills loads of sparse errors such as:

arch/arm/mach-tegra/fuse.c:44:12: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/fuse.c:44:12: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/fuse.c:44:12: got unsigned int

---
 arch/arm/mach-tegra/include/mach/io.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-tegra/include/mach/io.h +1 -1
index 4cea2230..d27e340 100644
@@ -71,7 +71,7 @@
 void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type);
 void tegra_iounmap(volatile void __iomem *addr);
 
-#define IO_ADDRESS(n) ((void __iomem *) IO_TO_VIRT(n))
+#define IO_ADDRESS(n) ((void __force __iomem *) IO_TO_VIRT(n))
 
 #ifdef CONFIG_TEGRA_PCI
 extern void __iomem *tegra_pcie_io_base;
Signature · 1 line
1.7.4.1
#2 lore raw

PATCH 2/14 ARM: tegra: fuse: use IO_ADDRESS

In reply to Olof Johansson

Fixes:

arch/arm/mach-tegra/fuse.c:44:12: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/fuse.c:44:12: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/fuse.c:44:12: got unsigned int

---
 arch/arm/mach-tegra/fuse.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/mach-tegra/fuse.c +4 -4
index 1fa26d9..8c590a8 100644
@@ -31,19 +31,19 @@
 
 static inline u32 fuse_readl(unsigned long offset)
 {
-	return readl(IO_TO_VIRT(TEGRA_FUSE_BASE + offset));
+	return readl(IO_ADDRESS(TEGRA_FUSE_BASE + offset));
 }
 
 static inline void fuse_writel(u32 value, unsigned long offset)
 {
-	writel(value, IO_TO_VIRT(TEGRA_FUSE_BASE + offset));
+	writel(value, IO_ADDRESS(TEGRA_FUSE_BASE + offset));
 }
 
 void tegra_init_fuse(void)
 {
-	u32 reg = readl(IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
+	u32 reg = readl(IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48));
 	reg |= 1 << 28;
-	writel(reg, IO_TO_VIRT(TEGRA_CLK_RESET_BASE + 0x48));
+	writel(reg, IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48));
 
 	pr_info("Tegra SKU: %d CPU Process: %d Core Process: %d\n",
 		tegra_sku_id(), tegra_cpu_process_id(),
Signature · 1 line
1.7.4.1
#3 lore raw

PATCH 3/14 ARM: tegra: pinmux: use IO_ADDRESS

In reply to Olof Johansson

Fixes lots of:

arch/arm/mach-tegra/pinmux.c:175:9: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/pinmux.c:175:9: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/pinmux.c:175:9: got unsigned lon

---
 arch/arm/mach-tegra/pinmux-t2-tables.c |    4 ++--
 arch/arm/mach-tegra/pinmux.c           |    4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/mach-tegra/pinmux-t2-tables.c +2 -2
index a475367..94e2417 100644
@@ -232,12 +232,12 @@ static u32 pinmux_reg[TRISTATE_REG_NUM + PIN_MUX_CTL_REG_NUM +
 
 static inline unsigned long pg_readl(unsigned long offset)
 {
-	return readl(IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset));
+	return readl(IO_ADDRESS(TEGRA_APB_MISC_BASE + offset));
 }
 
 static inline void pg_writel(unsigned long value, unsigned long offset)
 {
-	writel(value, IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset));
+	writel(value, IO_ADDRESS(TEGRA_APB_MISC_BASE + offset));
 }
 
 void tegra_pinmux_suspend(void)
arch/arm/mach-tegra/pinmux.c +2 -2
index f80d507..0a85e0e 100644
@@ -172,12 +172,12 @@ static const char *pupd_name(unsigned long val)
 
 static inline unsigned long pg_readl(unsigned long offset)
 {
-	return readl(IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset));
+	return readl(IO_ADDRESS(TEGRA_APB_MISC_BASE + offset));
 }
 
 static inline void pg_writel(unsigned long value, unsigned long offset)
 {
-	writel(value, IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset));
+	writel(value, IO_ADDRESS(TEGRA_APB_MISC_BASE + offset));
 }
 
 static int tegra_pinmux_set_func(const struct tegra_pingroup_config *config)
Signature · 1 line
1.7.4.1
#4 lore raw

PATCH 4/14 ARM: tegra: timer: don't cast __iomem pointers

In reply to Olof Johansson

Fixes a lot of:

arch/arm/mach-tegra/timer.c:75:2: warning: cast removes address space of expression arch/arm/mach-tegra/timer.c:75:2: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/timer.c:75:2: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/timer.c:75:2: got unsigned int
arch/arm/mach-tegra/timer.c:75:2: warning: cast removes address space of expression

---
 arch/arm/mach-tegra/timer.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-tegra/timer.c +2 -2
index 9035042..4d6759a 100644
@@ -62,9 +62,9 @@ static struct timespec persistent_ts;
 static u64 persistent_ms, last_persistent_ms;
 
 #define timer_writel(value, reg) \
-	__raw_writel(value, (u32)timer_reg_base + (reg))
+	__raw_writel(value, timer_reg_base + (reg))
 #define timer_readl(reg) \
-	__raw_readl((u32)timer_reg_base + (reg))
+	__raw_readl(timer_reg_base + (reg))
 
 static int tegra_timer_set_next_event(unsigned long cycles,
 					 struct clock_event_device *evt)
Signature · 1 line
1.7.4.1
#5 lore raw

PATCH 5/14 ARM: tegra: tegra2_clocks: don't cast __iomem pointers

In reply to Olof Johansson

Fixes lots of:

arch/arm/mach-tegra/tegra2_clocks.c:180:2: warning: cast removes address space of expression arch/arm/mach-tegra/tegra2_clocks.c:180:2: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/tegra2_clocks.c:180:2: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/tegra2_clocks.c:180:2: got unsigned int
arch/arm/mach-tegra/tegra2_clocks.c:180:2: warning: cast removes address space of expression

---
 arch/arm/mach-tegra/tegra2_clocks.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/mach-tegra/tegra2_clocks.c +4 -4
index 0fe9b3e..3325cd6 100644
@@ -166,13 +166,13 @@ static DEFINE_SPINLOCK(clock_register_lock);
 static int tegra_periph_clk_enable_refcount[3 * 32];
 
 #define clk_writel(value, reg) \
-	__raw_writel(value, (u32)reg_clk_base + (reg))
+	__raw_writel(value, reg_clk_base + (reg))
 #define clk_readl(reg) \
-	__raw_readl((u32)reg_clk_base + (reg))
+	__raw_readl(reg_clk_base + (reg))
 #define pmc_writel(value, reg) \
-	__raw_writel(value, (u32)reg_pmc_base + (reg))
+	__raw_writel(value, reg_pmc_base + (reg))
 #define pmc_readl(reg) \
-	__raw_readl((u32)reg_pmc_base + (reg))
+	__raw_readl(reg_pmc_base + (reg))
 
 unsigned long clk_measure_input_freq(void)
 {
Signature · 1 line
1.7.4.1
#6 lore raw

PATCH 6/14 ARM: tegra: tegra2_clocks: 0 -> NULL changes

In reply to Olof Johansson

Fixes a bunch of:

arch/arm/mach-tegra/tegra2_clocks.c:921:34: warning: Using plain integer as NULL pointer arch/arm/mach-tegra/tegra2_clocks.c:1462:4: warning: Using plain integer as NULL pointer arch/arm/mach-tegra/tegra2_clocks.c:1864:4: warning: Using plain integer as NULL pointer

...

---
 arch/arm/mach-tegra/tegra2_clocks.c |   34 +++++++++++++++++-----------------
 1 files changed, 17 insertions(+), 17 deletions(-)
arch/arm/mach-tegra/tegra2_clocks.c +17 -17
index 3325cd6..6dd5133 100644
@@ -918,7 +918,7 @@ static struct clk_ops tegra_pll_div_ops = {
 static void tegra2_periph_clk_init(struct clk *c)
 {
 	u32 val = clk_readl(c->reg);
-	const struct clk_mux_sel *mux = 0;
+	const struct clk_mux_sel *mux = NULL;
 	const struct clk_mux_sel *sel;
 	if (c->flags & MUX) {
 		for (sel = c->inputs; sel->input != NULL; sel++) {
@@ -1459,7 +1459,7 @@ static struct clk tegra_pll_s = {
 static struct clk_mux_sel tegra_clk_m_sel[] = {
 	{ .input = &tegra_clk_32k, .value = 0},
 	{ .input = &tegra_pll_s,  .value = 1},
-	{ 0, 0},
+	{ NULL , 0},
 };
 
 static struct clk tegra_clk_m = {
@@ -1861,7 +1861,7 @@ static const struct audio_sources {
 	{ .name = "ext_audio_clk1", .value = 6 },
 	{ .name = "ext_vimclk", .value = 7 },
 #endif
-	{ 0, 0 }
+	{ NULL, 0 }
 };
 
 static struct clk tegra_clk_audio = {
@@ -1926,7 +1926,7 @@ static struct clk_mux_sel mux_cclk[] = {
 	{ .input = &tegra_pll_p_out3,	.value = 6},
 	{ .input = &tegra_clk_d,	.value = 7},
 	{ .input = &tegra_pll_x,	.value = 8},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_sclk[] = {
@@ -1938,7 +1938,7 @@ static struct clk_mux_sel mux_sclk[] = {
 	{ .input = &tegra_clk_d,	.value = 5},
 	{ .input = &tegra_clk_32k,	.value = 6},
 	{ .input = &tegra_pll_m_out1,	.value = 7},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk tegra_clk_cclk = {
@@ -2009,7 +2009,7 @@ static struct clk_mux_sel mux_pllm_pllc_pllp_plla[] = {
 	{ .input = &tegra_pll_c, .value = 1},
 	{ .input = &tegra_pll_p, .value = 2},
 	{ .input = &tegra_pll_a_out0, .value = 3},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllm_pllc_pllp_clkm[] = {
@@ -2017,7 +2017,7 @@ static struct clk_mux_sel mux_pllm_pllc_pllp_clkm[] = {
 	{ .input = &tegra_pll_c, .value = 1},
 	{ .input = &tegra_pll_p, .value = 2},
 	{ .input = &tegra_clk_m, .value = 3},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_pllc_pllm_clkm[] = {
@@ -2025,7 +2025,7 @@ static struct clk_mux_sel mux_pllp_pllc_pllm_clkm[] = {
 	{ .input = &tegra_pll_c, .value = 1},
 	{ .input = &tegra_pll_m, .value = 2},
 	{ .input = &tegra_clk_m, .value = 3},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllaout0_audio2x_pllp_clkm[] = {
@@ -2033,7 +2033,7 @@ static struct clk_mux_sel mux_pllaout0_audio2x_pllp_clkm[] = {
 	{.input = &tegra_clk_audio_2x, .value = 1},
 	{.input = &tegra_pll_p, .value = 2},
 	{.input = &tegra_clk_m, .value = 3},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_plld_pllc_clkm[] = {
@@ -2041,7 +2041,7 @@ static struct clk_mux_sel mux_pllp_plld_pllc_clkm[] = {
 	{.input = &tegra_pll_d_out0, .value = 1},
 	{.input = &tegra_pll_c, .value = 2},
 	{.input = &tegra_clk_m, .value = 3},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_pllc_audio_clkm_clk32[] = {
@@ -2050,39 +2050,39 @@ static struct clk_mux_sel mux_pllp_pllc_audio_clkm_clk32[] = {
 	{.input = &tegra_clk_audio,     .value = 2},
 	{.input = &tegra_clk_m,     .value = 3},
 	{.input = &tegra_clk_32k,   .value = 4},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_pllc_pllm[] = {
 	{.input = &tegra_pll_p,     .value = 0},
 	{.input = &tegra_pll_c,     .value = 1},
 	{.input = &tegra_pll_m,     .value = 2},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_clk_m[] = {
 	{ .input = &tegra_clk_m, .value = 0},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_out3[] = {
 	{ .input = &tegra_pll_p_out3, .value = 0},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_plld[] = {
 	{ .input = &tegra_pll_d, .value = 0},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_clk_32k[] = {
 	{ .input = &tegra_clk_32k, .value = 0},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pclk[] = {
 	{ .input = &tegra_clk_pclk, .value = 0},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk tegra_clk_emc = {
Signature · 1 line
1.7.4.1
#7 lore raw

PATCH 7/14 ARM: tegra: pcie: don't cast __iomem pointers

In reply to Olof Johansson

Fixes a bunch of:

arch/arm/mach-tegra/pcie.c:678:8: warning: cast removes address space of expression arch/arm/mach-tegra/pcie.c:678:8: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/pcie.c:678:8: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/pcie.c:678:8: got unsigned int
arch/arm/mach-tegra/pcie.c:678:8: warning: cast removes address space of expression

---
 arch/arm/mach-tegra/pcie.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-tegra/pcie.c +2 -2
index f1f699d..6b0c235 100644
@@ -150,9 +150,9 @@
 static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
 
 #define pmc_writel(value, reg) \
-	__raw_writel(value, (u32)reg_pmc_base + (reg))
+	__raw_writel(value, reg_pmc_base + (reg))
 #define pmc_readl(reg) \
-	__raw_readl((u32)reg_pmc_base + (reg))
+	__raw_readl(reg_pmc_base + (reg))
 
 /*
  * Tegra2 defines 1GB in the AXI address map for PCIe.
Signature · 1 line
1.7.4.1
#8 lore raw

PATCH 8/14 ARM: tegra: pcie: include board.h

In reply to Olof Johansson

Fixes:

arch/arm/mach-tegra/pcie.c:908:12: warning: symbol 'tegra_pcie_init' was not declared. Should it be static?

---
 arch/arm/mach-tegra/pcie.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)
arch/arm/mach-tegra/pcie.c +2 -0
index 6b0c235..f7c89ee 100644
@@ -41,6 +41,8 @@
 #include <mach/clk.h>
 #include <mach/powergate.h>
 
+#include "board.h"
+
 /* register definitions */
 #define AFI_OFFSET	0x3800
 #define PADS_OFFSET	0x3000
Signature · 1 line
1.7.4.1
#9 lore raw

PATCH 9/14 ARM: tegra: pcie: 0 -> NULL changes

In reply to Olof Johansson

Fixes:

arch/arm/mach-tegra/pcie.c:465:10: warning: Using plain integer as NULL pointer

---
 arch/arm/mach-tegra/pcie.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-tegra/pcie.c +1 -1
index f7c89ee..f5aa173 100644
@@ -462,7 +462,7 @@ static struct pci_bus __init *tegra_pcie_scan_bus(int nr,
 	struct tegra_pcie_port *pp;
 
 	if (nr >= tegra_pcie.num_ports)
-		return 0;
+		return NULL;
 
 	pp = tegra_pcie.port + nr;
 	pp->root_bus_nr = sys->busnr;
Signature · 1 line
1.7.4.1
#10 lore raw

PATCH 10/14 ARM: tegra: tegra_init_cache should be static

In reply to Olof Johansson

Not exported and not used externally.

---
 arch/arm/mach-tegra/common.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-tegra/common.c +1 -1
index d5e3f89..690b888 100644
@@ -61,7 +61,7 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
 	{ NULL,		NULL,		0,		0},
 };
 
-void __init tegra_init_cache(void)
+static void __init tegra_init_cache(void)
 {
 #ifdef CONFIG_CACHE_L2X0
 	void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
Signature · 1 line
1.7.4.1
#11 lore raw

PATCH 11/14 ARM: tegra: tegra_rtc_read_ms should be static

In reply to Olof Johansson

Not exported and not used externally

---
 arch/arm/mach-tegra/timer.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-tegra/timer.c +1 -1
index 4d6759a..e2272d2 100644
@@ -133,7 +133,7 @@ static void notrace tegra_update_sched_clock(void)
  * tegra_rtc driver could be executing to avoid race conditions
  * on the RTC shadow register
  */
-u64 tegra_rtc_read_ms(void)
+static u64 tegra_rtc_read_ms(void)
 {
 	u32 ms = readl(rtc_base + RTC_MILLISECONDS);
 	u32 s = readl(rtc_base + RTC_SHADOW_SECONDS);
Signature · 1 line
1.7.4.1
#12 lore raw

PATCH 12/14 ARM: tegra: tegra_powergate_is_powered should be static

In reply to Olof Johansson

Not used externally and not exported.

Also, fix return type and change to instead WARN_ON on bad parameters.

---
 arch/arm/mach-tegra/include/mach/powergate.h |    1 -
 arch/arm/mach-tegra/powergate.c              |    5 ++---
 2 files changed, 2 insertions(+), 4 deletions(-)
arch/arm/mach-tegra/include/mach/powergate.h +0 -1
index 401d1b7..39c396d 100644
@@ -31,7 +31,6 @@
 
 int tegra_powergate_power_on(int id);
 int tegra_powergate_power_off(int id);
-bool tegra_powergate_is_powered(int id);
 int tegra_powergate_remove_clamping(int id);
 
 /* Must be called with clk disabled, and returns with clk enabled */
arch/arm/mach-tegra/powergate.c +2 -3
index 3cee9aa..9483064 100644
@@ -89,12 +89,11 @@ int tegra_powergate_power_off(int id)
 	return tegra_powergate_set(id, false);
 }
 
-bool tegra_powergate_is_powered(int id)
+static bool tegra_powergate_is_powered(int id)
 {
 	u32 status;
 
-	if (id < 0 || id >= TEGRA_NUM_POWERGATE)
-		return -EINVAL;
+	WARN_ON(id < 0 || id >= TEGRA_NUM_POWERGATE);
 
 	status = pmc_read(PWRGATE_STATUS) & (1 << id);
 	return !!status;
Signature · 1 line
1.7.4.1
#13 lore raw

PATCH 13/14 ARM: tegra: tegra2_clocks: don't export some tables

In reply to Olof Johansson

Not used externally, and certainly don't need to be exported.

---
 arch/arm/mach-tegra/tegra2_clocks.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/mach-tegra/tegra2_clocks.c +4 -4
index 6dd5133..371869d 100644
@@ -1885,7 +1885,7 @@ static struct clk tegra_clk_audio_2x = {
 	},
 };
 
-struct clk_lookup tegra_audio_clk_lookups[] = {
+static struct clk_lookup tegra_audio_clk_lookups[] = {
 	{ .con_id = "audio", .clk = &tegra_clk_audio },
 	{ .con_id = "audio_2x", .clk = &tegra_clk_audio_2x }
 };
@@ -2125,7 +2125,7 @@ static struct clk tegra_clk_emc = {
 		.parent = _parent,			\
 	}
 
-struct clk tegra_list_clks[] = {
+static struct clk tegra_list_clks[] = {
 	PERIPH_CLK("apbdma",	"tegra-dma",		NULL,	34,	0,	108000000, mux_pclk,			0),
 	PERIPH_CLK("rtc",	"rtc-tegra",		NULL,	4,	0,	32768,     mux_clk_32k,			PERIPH_NO_RESET),
 	PERIPH_CLK("timer",	"timer",		NULL,	5,	0,	26000000,  mux_clk_m,			0),
@@ -2221,7 +2221,7 @@ struct clk tegra_list_clks[] = {
  * configuration.  List those here to register them twice in the clock lookup
  * table under two names.
  */
-struct clk_duplicate tegra_clk_duplicates[] = {
+static struct clk_duplicate tegra_clk_duplicates[] = {
 	CLK_DUPLICATE("uarta",	"tegra_uart.0",	NULL),
 	CLK_DUPLICATE("uartb",	"tegra_uart.1",	NULL),
 	CLK_DUPLICATE("uartc",	"tegra_uart.2",	NULL),
@@ -2252,7 +2252,7 @@ struct clk_duplicate tegra_clk_duplicates[] = {
 		.clk = ck,	\
 	}
 
-struct clk *tegra_ptr_clks[] = {
+static struct clk *tegra_ptr_clks[] = {
 	&tegra_clk_32k,
 	&tegra_pll_s,
 	&tegra_clk_m,
Signature · 1 line
1.7.4.1
#14 lore raw

PATCH 14/14 ARM: tegra: dma: staticify some tables and functions

In reply to Olof Johansson

None of them are used externally.

---
 arch/arm/mach-tegra/dma.c |   14 +++++++++-----
 1 files changed, 9 insertions(+), 5 deletions(-)
arch/arm/mach-tegra/dma.c +9 -5
index f4ef5eb..c0cf967 100644
@@ -105,13 +105,17 @@
 
 #define NV_DMA_MAX_TRASFER_SIZE 0x10000
 
-const unsigned int ahb_addr_wrap_table[8] = {
+static const unsigned int ahb_addr_wrap_table[8] = {
 	0, 32, 64, 128, 256, 512, 1024, 2048
 };
 
-const unsigned int apb_addr_wrap_table[8] = {0, 1, 2, 4, 8, 16, 32, 64};
+static const unsigned int apb_addr_wrap_table[8] = {
+	0, 1, 2, 4, 8, 16, 32, 64
+};
 
-const unsigned int bus_width_table[5] = {8, 16, 32, 64, 128};
+static const unsigned int bus_width_table[5] = {
+	8, 16, 32, 64, 128
+};
 
 #define TEGRA_DMA_NAME_SIZE 16
 struct tegra_dma_channel {
@@ -157,7 +161,7 @@ void tegra_dma_dequeue(struct tegra_dma_channel *ch)
 	return;
 }
 
-void tegra_dma_stop(struct tegra_dma_channel *ch)
+static void tegra_dma_stop(struct tegra_dma_channel *ch)
 {
 	u32 csr;
 	u32 status;
@@ -174,7 +178,7 @@ void tegra_dma_stop(struct tegra_dma_channel *ch)
 		writel(status, ch->addr + APB_DMA_CHAN_STA);
 }
 
-int tegra_dma_cancel(struct tegra_dma_channel *ch)
+static int tegra_dma_cancel(struct tegra_dma_channel *ch)
 {
 	u32 csr;
 	unsigned long irq_flags;
Signature · 1 line
1.7.4.1
#15 lore raw

cover Sparse fixes for tegra

In reply to Olof Johansson
Quoted 1 line · On Thursday 06 October 2011 19:54:10 Olof Johansson wrote:

Some trivial fixes removing sparse warnings on tegra code.

Hi Olof,

That's a very nice series. I had a go at this across platforms before, but had not finished it yet.

One thing I would recommend instead of having a type cast in IO_ADDRESS is to change the definition of IO_{IRAM,CPU,PPSB,APB}_VIRT to be an iomem pointer from the start, so any calculation you do based on that automatically gets the right type.

In the long run, I would hope to be able to get rid of basically all uses of IO_ADDRESS and IO_TO_VIRT in the tegra code and replace that with device tree lookups, but that is clearly a separate issue.

Arnd

#16 lore raw

cover Sparse fixes for tegra

Hi,

Quoted 5 lines · Arnd Bergmann
Quoted 1 line · On Thursday 06 October 2011 19:54:10 Olof Johansson wrote:

Some trivial fixes removing sparse warnings on tegra code.

Hi Olof,

Quoted 7 lines

That's a very nice series. I had a go at this across platforms before, but had not finished it yet.

One thing I would recommend instead of having a type cast in IO_ADDRESS is to change the definition of IO_{IRAM,CPU,PPSB,APB}_VIRT to be an iomem pointer from the start, so any calculation you do based on that automatically gets the right type.

That worked out pretty well but needed asm-conditional defines, since some of the constants are used from assembly.

I'll post a new series shortly that includes the above change, drops the first to IO_ADDRESS changes and includes a couple of more fixes for cpu-tegra.c.

I kept IO_ADDRESS() even though it is now just a 1:1 wrapper to IO_TO_VIRT(), mostly to not have to churn all drivers just for this -- see below for plans related to that.

Also, the arm-global map_desc uses an unsigned long to hold the virtual address of the maps so I had to add explicit casts there. Switching it requires some changes to the mm/map.c code, I'll do that separately from this series.

Quoted 3 lines

In the long run, I would hope to be able to get rid of basically all uses of IO_ADDRESS and IO_TO_VIRT in the tegra code and replace that with device tree lookups, but that is clearly a separate issue.

Yes, probably by moving to local ioremaps for most use -- address can come from platform_device or device tree that way (but the platform direction is device tree overall).

-Olof

A message that is not in the archive (sent off-list or not yet received): 1317956064-17650-1-git-send-email-olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org

#18 lore raw

Olof Johansson wrote at Thursday, October 06, 2011 8:54 PM:

Quoted 1 line

Some trivial fixes removing sparse warnings on tegra code.

The series:

Although I guess given Arnd's comments, patch 1 will probably be rewritten, and 2-3 removed?

Signature · 1 line
nvpublic
#19 lore raw

v2 cover Sparse fixes for tegra

In reply to Olof Johansson

Some trivial fixes removing sparse warnings on tegra code.

Changes since v1:

* Implemented Arnd's suggestion to push annotation all the way down to IO_*_VIRT defines
* Based on above, no longer needed IO_TO_VIRT() -> IO_ADDRESS() changes
* Added two more fixes for cpu-tegra.

Stephen; I didn't explicitly apply your Acked-by lines to this batch yet, I will do so when I collect final acks before pushing a branch.

-Olof

#20 lore raw

PATCH v2 1/14 ARM: tegra: annotate IO_*_VIRT pointers

Provide __iomem annotation for IO_*_VIRT pointers, which will propagate up through IO_TO_VIRT(). Also fixes a 0 to NULL conversion of the base case to silence sparse.

Unfortunately map_desc takes an unsigned long for the pointer instead of a void __iomem *. For now, cast explicitly for those cases.

---
 arch/arm/mach-tegra/include/mach/io.h |   18 ++++++++++++------
 arch/arm/mach-tegra/io.c              |    8 ++++----
 2 files changed, 16 insertions(+), 10 deletions(-)
arch/arm/mach-tegra/include/mach/io.h +12 -6
index 4cea2230..971be4b 100644
@@ -33,20 +33,26 @@
  *
  */
 
+#ifdef __ASSEMBLY__
+#define __IOVADDR(x)	(x)
+#else
+#define __IOVADDR(x)	((void __force __iomem *)(x))
+#endif
+
 #define IO_IRAM_PHYS	0x40000000
-#define IO_IRAM_VIRT	0xFE400000
+#define IO_IRAM_VIRT	__IOVADDR(0xFE400000)
 #define IO_IRAM_SIZE	SZ_256K
 
 #define IO_CPU_PHYS     0x50040000
-#define IO_CPU_VIRT     0xFE000000
+#define IO_CPU_VIRT     __IOVADDR(0xFE000000)
 #define IO_CPU_SIZE	SZ_16K
 
 #define IO_PPSB_PHYS	0x60000000
-#define IO_PPSB_VIRT	0xFE200000
+#define IO_PPSB_VIRT	__IOVADDR(0xFE200000)
 #define IO_PPSB_SIZE	SZ_1M
 
 #define IO_APB_PHYS	0x70000000
-#define IO_APB_VIRT	0xFE300000
+#define IO_APB_VIRT	__IOVADDR(0xFE300000)
 #define IO_APB_SIZE	SZ_1M
 
 #define IO_TO_VIRT_BETWEEN(p, st, sz)	((p) >= (st) && (p) < ((st) + (sz)))
@@ -61,7 +67,7 @@
 		IO_TO_VIRT_XLATE((n), IO_CPU_PHYS, IO_CPU_VIRT) :	\
 	IO_TO_VIRT_BETWEEN((n), IO_IRAM_PHYS, IO_IRAM_SIZE) ?		\
 		IO_TO_VIRT_XLATE((n), IO_IRAM_PHYS, IO_IRAM_VIRT) :	\
-	0)
+	NULL)
 
 #ifndef __ASSEMBLER__
 
@@ -71,7 +77,7 @@
 void __iomem *tegra_ioremap(unsigned long phys, size_t size, unsigned int type);
 void tegra_iounmap(volatile void __iomem *addr);
 
-#define IO_ADDRESS(n) ((void __iomem *) IO_TO_VIRT(n))
+#define IO_ADDRESS(n) (IO_TO_VIRT(n))
 
 #ifdef CONFIG_TEGRA_PCI
 extern void __iomem *tegra_pcie_io_base;
arch/arm/mach-tegra/io.c +4 -4
index ea50fe2..5489f8b 100644
@@ -31,25 +31,25 @@
 
 static struct map_desc tegra_io_desc[] __initdata = {
 	{
-		.virtual = IO_PPSB_VIRT,
+		.virtual = (unsigned long)IO_PPSB_VIRT,
 		.pfn = __phys_to_pfn(IO_PPSB_PHYS),
 		.length = IO_PPSB_SIZE,
 		.type = MT_DEVICE,
 	},
 	{
-		.virtual = IO_APB_VIRT,
+		.virtual = (unsigned long)IO_APB_VIRT,
 		.pfn = __phys_to_pfn(IO_APB_PHYS),
 		.length = IO_APB_SIZE,
 		.type = MT_DEVICE,
 	},
 	{
-		.virtual = IO_CPU_VIRT,
+		.virtual = (unsigned long)IO_CPU_VIRT,
 		.pfn = __phys_to_pfn(IO_CPU_PHYS),
 		.length = IO_CPU_SIZE,
 		.type = MT_DEVICE,
 	},
 	{
-		.virtual = IO_IRAM_VIRT,
+		.virtual = (unsigned long)IO_IRAM_VIRT,
 		.pfn = __phys_to_pfn(IO_IRAM_PHYS),
 		.length = IO_IRAM_SIZE,
 		.type = MT_DEVICE,
Signature · 1 line
1.7.4.1
#21 lore raw

PATCH v2 1/14 ARM: tegra: annotate IO_*_VIRT pointers

arch/arm/mach-tegra/include/mach/io.h line 39

Quoted 4 lines · Olof Johansson
arch/arm/mach-tegra/include/mach/io.h +4 -0
+#ifdef __ASSEMBLY__
+#define __IOVADDR(x)	(x)
+#else
+#define __IOVADDR(x)	((void __force __iomem *)(x))

Please call this IOMEM() - see:

grep '#define *IOMEM' arch/arm/*/include/mach -r

for its establishment across several implementations.

#22 lore raw

PATCH v2 1/14 ARM: tegra: annotate IO_*_VIRT pointers

Quoted 11 lines · Russell King - ARM Linux

arch/arm/mach-tegra/include/mach/io.h line 39

Quoted 4 lines · Olof Johansson
arch/arm/mach-tegra/include/mach/io.h +4 -0
+#ifdef __ASSEMBLY__
+#define __IOVADDR(x) (x)
+#else
+#define __IOVADDR(x) ((void __force __iomem *)(x))

Please call this IOMEM() - see:

grep '#define *IOMEM' arch/arm/*/include/mach -r

for its establishment across several implementations.

Ah, thanks! I did look for a pre-existing one, but not closely enough. I've revised the patch and will send a fresh pull request to Arnd with the new contents.

I suppose there is some value in doing a global variant of this instead of having it redefined on all platforms. I'll add it to the list of cleanups to look at.

-Olof

#23 lore raw

PATCH v2 2/14 ARM: tegra: timer: don't cast __iomem pointers

In reply to Olof Johansson

Fixes a lot of:

arch/arm/mach-tegra/timer.c:75:2: warning: cast removes address space of expression arch/arm/mach-tegra/timer.c:75:2: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/timer.c:75:2: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/timer.c:75:2: got unsigned int
arch/arm/mach-tegra/timer.c:75:2: warning: cast removes address space of expression

---
 arch/arm/mach-tegra/timer.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-tegra/timer.c +2 -2
index 9035042..4d6759a 100644
@@ -62,9 +62,9 @@ static struct timespec persistent_ts;
 static u64 persistent_ms, last_persistent_ms;
 
 #define timer_writel(value, reg) \
-	__raw_writel(value, (u32)timer_reg_base + (reg))
+	__raw_writel(value, timer_reg_base + (reg))
 #define timer_readl(reg) \
-	__raw_readl((u32)timer_reg_base + (reg))
+	__raw_readl(timer_reg_base + (reg))
 
 static int tegra_timer_set_next_event(unsigned long cycles,
 					 struct clock_event_device *evt)
Signature · 1 line
1.7.4.1
#24 lore raw

PATCH v2 3/14 ARM: tegra: tegra2_clocks: don't cast __iomem pointers

In reply to Olof Johansson

Fixes a lot of:

arch/arm/mach-tegra/tegra2_clocks.c:180:2: warning: cast removes address space of expression arch/arm/mach-tegra/tegra2_clocks.c:180:2: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/tegra2_clocks.c:180:2: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/tegra2_clocks.c:180:2: got unsigned int
arch/arm/mach-tegra/tegra2_clocks.c:180:2: warning: cast removes address space of expression

---
 arch/arm/mach-tegra/tegra2_clocks.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/mach-tegra/tegra2_clocks.c +4 -4
index 0fe9b3e..3325cd6 100644
@@ -166,13 +166,13 @@ static DEFINE_SPINLOCK(clock_register_lock);
 static int tegra_periph_clk_enable_refcount[3 * 32];
 
 #define clk_writel(value, reg) \
-	__raw_writel(value, (u32)reg_clk_base + (reg))
+	__raw_writel(value, reg_clk_base + (reg))
 #define clk_readl(reg) \
-	__raw_readl((u32)reg_clk_base + (reg))
+	__raw_readl(reg_clk_base + (reg))
 #define pmc_writel(value, reg) \
-	__raw_writel(value, (u32)reg_pmc_base + (reg))
+	__raw_writel(value, reg_pmc_base + (reg))
 #define pmc_readl(reg) \
-	__raw_readl((u32)reg_pmc_base + (reg))
+	__raw_readl(reg_pmc_base + (reg))
 
 unsigned long clk_measure_input_freq(void)
 {
Signature · 1 line
1.7.4.1
#25 lore raw

PATCH v2 4/14 ARM: tegra: tegra2_clocks: 0 -> NULL changes

In reply to Olof Johansson

Fixes a lot of:

arch/arm/mach-tegra/tegra2_clocks.c:921:34: warning: Using plain integer as NULL pointer arch/arm/mach-tegra/tegra2_clocks.c:1462:4: warning: Using plain integer as NULL pointer arch/arm/mach-tegra/tegra2_clocks.c:1864:4: warning: Using plain integer as NULL pointer

---
 arch/arm/mach-tegra/tegra2_clocks.c |   34 +++++++++++++++++-----------------
 1 files changed, 17 insertions(+), 17 deletions(-)
arch/arm/mach-tegra/tegra2_clocks.c +17 -17
index 3325cd6..6dd5133 100644
@@ -918,7 +918,7 @@ static struct clk_ops tegra_pll_div_ops = {
 static void tegra2_periph_clk_init(struct clk *c)
 {
 	u32 val = clk_readl(c->reg);
-	const struct clk_mux_sel *mux = 0;
+	const struct clk_mux_sel *mux = NULL;
 	const struct clk_mux_sel *sel;
 	if (c->flags & MUX) {
 		for (sel = c->inputs; sel->input != NULL; sel++) {
@@ -1459,7 +1459,7 @@ static struct clk tegra_pll_s = {
 static struct clk_mux_sel tegra_clk_m_sel[] = {
 	{ .input = &tegra_clk_32k, .value = 0},
 	{ .input = &tegra_pll_s,  .value = 1},
-	{ 0, 0},
+	{ NULL , 0},
 };
 
 static struct clk tegra_clk_m = {
@@ -1861,7 +1861,7 @@ static const struct audio_sources {
 	{ .name = "ext_audio_clk1", .value = 6 },
 	{ .name = "ext_vimclk", .value = 7 },
 #endif
-	{ 0, 0 }
+	{ NULL, 0 }
 };
 
 static struct clk tegra_clk_audio = {
@@ -1926,7 +1926,7 @@ static struct clk_mux_sel mux_cclk[] = {
 	{ .input = &tegra_pll_p_out3,	.value = 6},
 	{ .input = &tegra_clk_d,	.value = 7},
 	{ .input = &tegra_pll_x,	.value = 8},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_sclk[] = {
@@ -1938,7 +1938,7 @@ static struct clk_mux_sel mux_sclk[] = {
 	{ .input = &tegra_clk_d,	.value = 5},
 	{ .input = &tegra_clk_32k,	.value = 6},
 	{ .input = &tegra_pll_m_out1,	.value = 7},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk tegra_clk_cclk = {
@@ -2009,7 +2009,7 @@ static struct clk_mux_sel mux_pllm_pllc_pllp_plla[] = {
 	{ .input = &tegra_pll_c, .value = 1},
 	{ .input = &tegra_pll_p, .value = 2},
 	{ .input = &tegra_pll_a_out0, .value = 3},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllm_pllc_pllp_clkm[] = {
@@ -2017,7 +2017,7 @@ static struct clk_mux_sel mux_pllm_pllc_pllp_clkm[] = {
 	{ .input = &tegra_pll_c, .value = 1},
 	{ .input = &tegra_pll_p, .value = 2},
 	{ .input = &tegra_clk_m, .value = 3},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_pllc_pllm_clkm[] = {
@@ -2025,7 +2025,7 @@ static struct clk_mux_sel mux_pllp_pllc_pllm_clkm[] = {
 	{ .input = &tegra_pll_c, .value = 1},
 	{ .input = &tegra_pll_m, .value = 2},
 	{ .input = &tegra_clk_m, .value = 3},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllaout0_audio2x_pllp_clkm[] = {
@@ -2033,7 +2033,7 @@ static struct clk_mux_sel mux_pllaout0_audio2x_pllp_clkm[] = {
 	{.input = &tegra_clk_audio_2x, .value = 1},
 	{.input = &tegra_pll_p, .value = 2},
 	{.input = &tegra_clk_m, .value = 3},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_plld_pllc_clkm[] = {
@@ -2041,7 +2041,7 @@ static struct clk_mux_sel mux_pllp_plld_pllc_clkm[] = {
 	{.input = &tegra_pll_d_out0, .value = 1},
 	{.input = &tegra_pll_c, .value = 2},
 	{.input = &tegra_clk_m, .value = 3},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_pllc_audio_clkm_clk32[] = {
@@ -2050,39 +2050,39 @@ static struct clk_mux_sel mux_pllp_pllc_audio_clkm_clk32[] = {
 	{.input = &tegra_clk_audio,     .value = 2},
 	{.input = &tegra_clk_m,     .value = 3},
 	{.input = &tegra_clk_32k,   .value = 4},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_pllc_pllm[] = {
 	{.input = &tegra_pll_p,     .value = 0},
 	{.input = &tegra_pll_c,     .value = 1},
 	{.input = &tegra_pll_m,     .value = 2},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_clk_m[] = {
 	{ .input = &tegra_clk_m, .value = 0},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pllp_out3[] = {
 	{ .input = &tegra_pll_p_out3, .value = 0},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_plld[] = {
 	{ .input = &tegra_pll_d, .value = 0},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_clk_32k[] = {
 	{ .input = &tegra_clk_32k, .value = 0},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk_mux_sel mux_pclk[] = {
 	{ .input = &tegra_clk_pclk, .value = 0},
-	{ 0, 0},
+	{ NULL, 0},
 };
 
 static struct clk tegra_clk_emc = {
Signature · 1 line
1.7.4.1
#26 lore raw

PATCH v2 5/14 ARM: tegra: pcie: don't cast __iomem pointers

In reply to Olof Johansson

Fixes a lot of:

arch/arm/mach-tegra/pcie.c:678:8: warning: cast removes address space of expression arch/arm/mach-tegra/pcie.c:678:8: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-tegra/pcie.c:678:8: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-tegra/pcie.c:678:8: got unsigned int
arch/arm/mach-tegra/pcie.c:678:8: warning: cast removes address space of expression

---
 arch/arm/mach-tegra/pcie.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-tegra/pcie.c +2 -2
index f1f699d..6b0c235 100644
@@ -150,9 +150,9 @@
 static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE);
 
 #define pmc_writel(value, reg) \
-	__raw_writel(value, (u32)reg_pmc_base + (reg))
+	__raw_writel(value, reg_pmc_base + (reg))
 #define pmc_readl(reg) \
-	__raw_readl((u32)reg_pmc_base + (reg))
+	__raw_readl(reg_pmc_base + (reg))
 
 /*
  * Tegra2 defines 1GB in the AXI address map for PCIe.
Signature · 1 line
1.7.4.1
#27 lore raw

PATCH v2 6/14 ARM: tegra: pcie: include board.h

In reply to Olof Johansson

Fixes:

arch/arm/mach-tegra/pcie.c:908:12: warning: symbol 'tegra_pcie_init' was not declared. Should it be static?

---
 arch/arm/mach-tegra/pcie.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)
arch/arm/mach-tegra/pcie.c +2 -0
index 6b0c235..f7c89ee 100644
@@ -41,6 +41,8 @@
 #include <mach/clk.h>
 #include <mach/powergate.h>
 
+#include "board.h"
+
 /* register definitions */
 #define AFI_OFFSET	0x3800
 #define PADS_OFFSET	0x3000
Signature · 1 line
1.7.4.1
#28 lore raw

PATCH v2 7/14 ARM: tegra: pcie: 0 -> NULL changes

In reply to Olof Johansson

Fixes:

arch/arm/mach-tegra/pcie.c:465:10: warning: Using plain integer as NULL pointer

---
 arch/arm/mach-tegra/pcie.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-tegra/pcie.c +1 -1
index f7c89ee..f5aa173 100644
@@ -462,7 +462,7 @@ static struct pci_bus __init *tegra_pcie_scan_bus(int nr,
 	struct tegra_pcie_port *pp;
 
 	if (nr >= tegra_pcie.num_ports)
-		return 0;
+		return NULL;
 
 	pp = tegra_pcie.port + nr;
 	pp->root_bus_nr = sys->busnr;
Signature · 1 line
1.7.4.1
#29 lore raw

PATCH v2 8/14 ARM: tegra: tegra_init_cache should be static

In reply to Olof Johansson

Not exported and not used externally.

---
 arch/arm/mach-tegra/common.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-tegra/common.c +1 -1
index d5e3f89..690b888 100644
@@ -61,7 +61,7 @@ static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
 	{ NULL,		NULL,		0,		0},
 };
 
-void __init tegra_init_cache(void)
+static void __init tegra_init_cache(void)
 {
 #ifdef CONFIG_CACHE_L2X0
 	void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
Signature · 1 line
1.7.4.1
#30 lore raw

PATCH v2 9/14 ARM: tegra: tegra_rtc_read_ms should be static

In reply to Olof Johansson

Not exported and not used externally.

---
 arch/arm/mach-tegra/timer.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-tegra/timer.c +1 -1
index 4d6759a..e2272d2 100644
@@ -133,7 +133,7 @@ static void notrace tegra_update_sched_clock(void)
  * tegra_rtc driver could be executing to avoid race conditions
  * on the RTC shadow register
  */
-u64 tegra_rtc_read_ms(void)
+static u64 tegra_rtc_read_ms(void)
 {
 	u32 ms = readl(rtc_base + RTC_MILLISECONDS);
 	u32 s = readl(rtc_base + RTC_SHADOW_SECONDS);
Signature · 1 line
1.7.4.1
#31 lore raw

PATCH v2 10/14 ARM: tegra: tegra_powergate_is_powered should be static

In reply to Olof Johansson

Not exported and not used externally.

Also, fix return type and change to instead WARN_ON on bad parameters.

---
 arch/arm/mach-tegra/include/mach/powergate.h |    1 -
 arch/arm/mach-tegra/powergate.c              |    5 ++---
 2 files changed, 2 insertions(+), 4 deletions(-)
arch/arm/mach-tegra/include/mach/powergate.h +0 -1
index 401d1b7..39c396d 100644
@@ -31,7 +31,6 @@
 
 int tegra_powergate_power_on(int id);
 int tegra_powergate_power_off(int id);
-bool tegra_powergate_is_powered(int id);
 int tegra_powergate_remove_clamping(int id);
 
 /* Must be called with clk disabled, and returns with clk enabled */
arch/arm/mach-tegra/powergate.c +2 -3
index 3cee9aa..9483064 100644
@@ -89,12 +89,11 @@ int tegra_powergate_power_off(int id)
 	return tegra_powergate_set(id, false);
 }
 
-bool tegra_powergate_is_powered(int id)
+static bool tegra_powergate_is_powered(int id)
 {
 	u32 status;
 
-	if (id < 0 || id >= TEGRA_NUM_POWERGATE)
-		return -EINVAL;
+	WARN_ON(id < 0 || id >= TEGRA_NUM_POWERGATE);
 
 	status = pmc_read(PWRGATE_STATUS) & (1 << id);
 	return !!status;
Signature · 1 line
1.7.4.1
#32 lore raw

PATCH v2 10/14 ARM: tegra: tegra_powergate_is_powered should be static

Hello.

Quoted 3 lines · Olof Johansson

Not exported and not used externally.

Also, fix return type and change to instead WARN_ON on bad parameters.

Change to what? You're changing _to_ WARN_ON() as we can see, not from it...

Quoted 5 lines
---
  arch/arm/mach-tegra/include/mach/powergate.h |    1 -
  arch/arm/mach-tegra/powergate.c              |    5 ++---
  2 files changed, 2 insertions(+), 4 deletions(-)

[...]

Quoted 9 lines
arch/arm/mach-tegra/powergate.c +0 -1
index 3cee9aa..9483064 100644
@@ -89,12 +89,11 @@ int tegra_powergate_power_off(int id)
  	return tegra_powergate_set(id, false);
  }
 
-bool tegra_powergate_is_powered(int id)

arch/arm/mach-tegra/powergate.c int tegra_powergate_power_off(int id) · line 99

Quoted 10 lines
arch/arm/mach-tegra/powergate.c +2 -2
+static bool tegra_powergate_is_powered(int id)
  {
  	u32 status;
 
-	if (id < 0 || id >= TEGRA_NUM_POWERGATE)
-		return -EINVAL;
+	WARN_ON(id<  0 || id>= TEGRA_NUM_POWERGATE);
 
  	status = pmc_read(PWRGATE_STATUS)&  (1<<  id);
  	return !!status;

WBR, Sergei

#33 lore raw

PATCH v2 10/14 ARM: tegra: tegra_powergate_is_powered should be static

Hi,

Quoted 10 lines · Sergei Shtylyov

Hello.

Quoted 3 lines · Olof Johansson

Not exported and not used externally.

Also, fix return type ?and change to instead WARN_ON on bad parameters.

? Change to what? You're changing _to_ WARN_ON() as we can see, not from it...

I guess I wasn't entirely clear in the commit message, thanks for pointing it out.

I revised the text just now when I applied the series -- not really warranting a repost of the patch though.

Thanks,

-Olof

#34 lore raw

PATCH v2 11/14 ARM: tegra: tegra2_clocks: don't export some tables

In reply to Olof Johansson

Not used externally, and certainly don't need to be exported.

---
 arch/arm/mach-tegra/tegra2_clocks.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)
arch/arm/mach-tegra/tegra2_clocks.c +4 -4
index 6dd5133..371869d 100644
@@ -1885,7 +1885,7 @@ static struct clk tegra_clk_audio_2x = {
 	},
 };
 
-struct clk_lookup tegra_audio_clk_lookups[] = {
+static struct clk_lookup tegra_audio_clk_lookups[] = {
 	{ .con_id = "audio", .clk = &tegra_clk_audio },
 	{ .con_id = "audio_2x", .clk = &tegra_clk_audio_2x }
 };
@@ -2125,7 +2125,7 @@ static struct clk tegra_clk_emc = {
 		.parent = _parent,			\
 	}
 
-struct clk tegra_list_clks[] = {
+static struct clk tegra_list_clks[] = {
 	PERIPH_CLK("apbdma",	"tegra-dma",		NULL,	34,	0,	108000000, mux_pclk,			0),
 	PERIPH_CLK("rtc",	"rtc-tegra",		NULL,	4,	0,	32768,     mux_clk_32k,			PERIPH_NO_RESET),
 	PERIPH_CLK("timer",	"timer",		NULL,	5,	0,	26000000,  mux_clk_m,			0),
@@ -2221,7 +2221,7 @@ struct clk tegra_list_clks[] = {
  * configuration.  List those here to register them twice in the clock lookup
  * table under two names.
  */
-struct clk_duplicate tegra_clk_duplicates[] = {
+static struct clk_duplicate tegra_clk_duplicates[] = {
 	CLK_DUPLICATE("uarta",	"tegra_uart.0",	NULL),
 	CLK_DUPLICATE("uartb",	"tegra_uart.1",	NULL),
 	CLK_DUPLICATE("uartc",	"tegra_uart.2",	NULL),
@@ -2252,7 +2252,7 @@ struct clk_duplicate tegra_clk_duplicates[] = {
 		.clk = ck,	\
 	}
 
-struct clk *tegra_ptr_clks[] = {
+static struct clk *tegra_ptr_clks[] = {
 	&tegra_clk_32k,
 	&tegra_pll_s,
 	&tegra_clk_m,
Signature · 1 line
1.7.4.1
#35 lore raw

PATCH v2 12/14 ARM: tegra: dma: staticify some tables and functions

In reply to Olof Johansson

None of them are used externally.

---
 arch/arm/mach-tegra/dma.c |   14 +++++++++-----
 1 files changed, 9 insertions(+), 5 deletions(-)
arch/arm/mach-tegra/dma.c +9 -5
index f4ef5eb..c0cf967 100644
@@ -105,13 +105,17 @@
 
 #define NV_DMA_MAX_TRASFER_SIZE 0x10000
 
-const unsigned int ahb_addr_wrap_table[8] = {
+static const unsigned int ahb_addr_wrap_table[8] = {
 	0, 32, 64, 128, 256, 512, 1024, 2048
 };
 
-const unsigned int apb_addr_wrap_table[8] = {0, 1, 2, 4, 8, 16, 32, 64};
+static const unsigned int apb_addr_wrap_table[8] = {
+	0, 1, 2, 4, 8, 16, 32, 64
+};
 
-const unsigned int bus_width_table[5] = {8, 16, 32, 64, 128};
+static const unsigned int bus_width_table[5] = {
+	8, 16, 32, 64, 128
+};
 
 #define TEGRA_DMA_NAME_SIZE 16
 struct tegra_dma_channel {
@@ -157,7 +161,7 @@ void tegra_dma_dequeue(struct tegra_dma_channel *ch)
 	return;
 }
 
-void tegra_dma_stop(struct tegra_dma_channel *ch)
+static void tegra_dma_stop(struct tegra_dma_channel *ch)
 {
 	u32 csr;
 	u32 status;
@@ -174,7 +178,7 @@ void tegra_dma_stop(struct tegra_dma_channel *ch)
 		writel(status, ch->addr + APB_DMA_CHAN_STA);
 }
 
-int tegra_dma_cancel(struct tegra_dma_channel *ch)
+static int tegra_dma_cancel(struct tegra_dma_channel *ch)
 {
 	u32 csr;
 	unsigned long irq_flags;
Signature · 1 line
1.7.4.1
#36 lore raw

PATCH v2 13/14 ARM: tegra: cpu-tegra: sparse type fix

In reply to Olof Johansson

Type fix:
arch/arm/mach-tegra/cpu-tegra.c:144:14: warning: incorrect type in argument 5 (different signedness)
arch/arm/mach-tegra/cpu-tegra.c:144:14: expected unsigned int *index
arch/arm/mach-tegra/cpu-tegra.c:144:14: got int *<noident>

---
 arch/arm/mach-tegra/cpu-tegra.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-tegra/cpu-tegra.c +1 -1
index 0e1016a..f15b689 100644
@@ -130,7 +130,7 @@ static int tegra_target(struct cpufreq_policy *policy,
 		       unsigned int target_freq,
 		       unsigned int relation)
 {
-	int idx;
+	unsigned int idx;
 	unsigned int freq;
 	int ret = 0;
 
Signature · 1 line
1.7.4.1
#37 lore raw

PATCH v2 14/14 ARM: tegra: cpu-tegra: unexport two functions

In reply to Olof Johansson

Two static functions that are not exported:

arch/arm/mach-tegra/cpu-tegra.c:59:5: warning: symbol 'tegra_verify_speed' was not declared. Should it be static? arch/arm/mach-tegra/cpu-tegra.c:64:14: warning: symbol 'tegra_getspeed' was not declared. Should it be static?

---
 arch/arm/mach-tegra/cpu-tegra.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-tegra/cpu-tegra.c +2 -2
index f15b689..b2647ec 100644
@@ -57,12 +57,12 @@ static unsigned long target_cpu_speed[NUM_CPUS];
 static DEFINE_MUTEX(tegra_cpu_lock);
 static bool is_suspended;
 
-int tegra_verify_speed(struct cpufreq_policy *policy)
+static int tegra_verify_speed(struct cpufreq_policy *policy)
 {
 	return cpufreq_frequency_table_verify(policy, freq_table);
 }
 
-unsigned int tegra_getspeed(unsigned int cpu)
+static unsigned int tegra_getspeed(unsigned int cpu)
 {
 	unsigned long rate;
 
Signature · 1 line
1.7.4.1
#38 lore raw

v2 cover Sparse fixes for tegra

In reply to Olof Johansson

Olof Johansson wrote at Sunday, October 09, 2011 11:28 PM:

Quoted 10 lines

Some trivial fixes removing sparse warnings on tegra code.

Changes since v1:

* Implemented Arnd's suggestion to push annotation all the way down to IO_*_VIRT defines
* Based on above, no longer needed IO_TO_VIRT() -> IO_ADDRESS() changes
* Added two more fixes for cpu-tegra.

Stephen; I didn't explicitly apply your Acked-by lines to this batch yet, I will do so when I collect final acks before pushing a branch.

Just for the record; my ack still applies to the updated series.

Signature · 1 line
nvpublic
#39 lore raw

v2 cover Sparse fixes for tegra

In reply to Olof Johansson
Quoted 11 lines · Olof Johansson

Some trivial fixes removing sparse warnings on tegra code.

Changes since v1:

* Implemented Arnd's suggestion to push annotation all the way down to IO_*_VIRT defines
* Based on above, no longer needed IO_TO_VIRT() -> IO_ADDRESS() changes
* Added two more fixes for cpu-tegra.

Stephen; I didn't explicitly apply your Acked-by lines to this batch yet, I will do so when I collect final acks before pushing a branch.