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those series patches for add ben nanonote board

PATCH New Shinya Kuribayashi 7 participants 11 messages Oct 12, 2011 – Jul 15, 2013

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#0 lore raw

v8 cover those series patches for add ben nanonote board

Hi,

v8
--

Fix all checkpatch errors/warnings except for known false positives. I'll make a pull-request shortly.

Quoted 21 lines

total: 0 errors, 0 warnings, 2105 lines checked

jz4740-v8/0001-MIPS-Ingenic-XBurst-Jz4740-processor-support.patch has no obvious style problems and is ready for submission.
WARNING: Use #include <linux/io.h> instead of <asm/io.h>
#69: FILE: drivers/mtd/nand/jz4740_nand.c:15:
+#include <asm/io.h>

total: 0 errors, 1 warnings, 268 lines checked

jz4740-v8/0002-MIPS-Jz4740-Add-NAND-driver.patch has style problems, please review.

If any of these errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS.
WARNING: Use #include <linux/io.h> instead of <asm/io.h> #194: FILE: board/qi/qi_lb60/qi_lb60.c:11:
+#include <asm/io.h>

WARNING: line over 80 characters
#407: FILE: include/configs/qi_lb60.h:35:
+#define CONFIG_BOOTARGS "mem=32M console=tty0 console=ttyS0,57600n8 ubi.mtd=2 rootfstype=ubifs root=ubi0:rootfs rw rootwait"

Quoted 6 lines

total: 0 errors, 2 warnings, 479 lines checked

jz4740-v8/0003-MIPS-Jz4740-Add-qi_lb60-board-support.patch has style problems, please review.

If any of these errors are false positives, please report them to the maintainer, see CHECKPATCH in MAINTAINERS.

v7
--
Here's seventh patchset for Ben NanoNote initial support. I've been working with Xiangfu past six months to polish v6 patches. We have addressed all comments from Wolfgang and Scott so far, drop nand_spl and USB_boot functions to make the initial bring-up minimum and simple.

I think the patchset is now in good shape, so will merge and make a pull-request during this merge window. Please give it a final review and if something to fix, please let us know.

Scott and Wolfgang, I know NAND land changes should go through Scott's tree, but the NAND driver is part of the initial support. May I take it through MIPS tree? Hope it's Ok with you.

Changes since v6 patchset are described in each patch.

Shinya

--- 8< ---
Boilerplate from Xiangfu Liu:

those patches are for add xburst jz4740 base file and Ben NanoNote (codename qi_lb60) to U-Boot

some info about xburst jz4740:
the xburst jz4740 is recently added to linux 2.6.36 and it's support the device Ben NanoNote out of box,

this xburst jz4740 cpu have one feature is Boot From USB, there is a small rom in jz4740, but LOW some PIN, the cpu will boot to this small rom, then init cpu and USB module, then we can send 8KB bin file to the cpu by USB(by using 'xbboot' or 'usbboot'[1]).

which means if your bootloader is borken,(the first few KBs in NAND) you can always boot the device from usb, then reflash the nand.

in OpenMoko FreeRunner, there are NOR and NAND. when people broken the nand bootloader, it's must boot from NOR, reflash the bootloader back when people broken the NAND and NOR, he(she) must reflash by using JTAG but in Ben NanoNote, we just need boot from usb. flash the nand again :)

BTW:there are a lot of PMP, Audio device in China use the Xburst cpu, but I think they are all base on u-boot 1.1.6. by working on Ben NanoNote (http://en.qi-hardware.com) one year, we try to update the u-boot to last version and send it to upstream. :)

for more info about Ingenic Xburst JZ4740
http://www.ingenic.cn/eng/default.aspx
http://www.linux-mips.org/wiki/Ingenic

Xiangfu Liu (3):
MIPS: Ingenic XBurst Jz4740 processor support
MIPS: Jz4740: Add NAND driver
MIPS: Jz4740: Add qi_lb60 board support

 MAINTAINERS                         |    4 +
 MAKEALL                             |    4 +-
 README                              |    1 +
 arch/mips/cpu/xburst/Makefile       |   49 ++
 arch/mips/cpu/xburst/config.mk      |   24 +
 arch/mips/cpu/xburst/cpu.c          |  152 +++++
 arch/mips/cpu/xburst/jz4740.c       |  248 ++++++++
 arch/mips/cpu/xburst/jz_serial.c    |  114 ++++
 arch/mips/cpu/xburst/start.S        |  171 ++++++
 arch/mips/cpu/xburst/timer.c        |  162 +++++
 arch/mips/include/asm/global_data.h |   11 +
 arch/mips/include/asm/jz4740.h      | 1150 +++++++++++++++++++++++++++++++++++
 board/qi/qi_lb60/Makefile           |   45 ++
 board/qi/qi_lb60/config.mk          |   31 +
 board/qi/qi_lb60/qi_lb60.c          |  104 ++++
 board/qi/qi_lb60/u-boot.lds         |   61 ++
 boards.cfg                          |    1 +
 drivers/mtd/nand/Makefile           |    1 +
 drivers/mtd/nand/jz4740_nand.c      |  261 ++++++++
 include/configs/qi_lb60.h           |  211 +++++++
 20 files changed, 2804 insertions(+), 1 deletions(-)
 create mode 100644 arch/mips/cpu/xburst/Makefile
 create mode 100644 arch/mips/cpu/xburst/config.mk
 create mode 100644 arch/mips/cpu/xburst/cpu.c
 create mode 100644 arch/mips/cpu/xburst/jz4740.c
 create mode 100644 arch/mips/cpu/xburst/jz_serial.c
 create mode 100644 arch/mips/cpu/xburst/start.S
 create mode 100644 arch/mips/cpu/xburst/timer.c
 create mode 100644 arch/mips/include/asm/jz4740.h
 create mode 100644 board/qi/qi_lb60/Makefile
 create mode 100644 board/qi/qi_lb60/config.mk
 create mode 100644 board/qi/qi_lb60/qi_lb60.c
 create mode 100644 board/qi/qi_lb60/u-boot.lds
 create mode 100644 drivers/mtd/nand/jz4740_nand.c
 create mode 100644 include/configs/qi_lb60.h
#1 lore raw

PATCH v8 1/3 MIPS: Ingenic XBurst Jz4740 processor support

From: Xiangfu Liu <[email protected]>
Date: Wed, 12 Oct 2011 12:24:06 +0800

Jz4740 is a multimedia application processor targeting for mobile devices like e-Dictionary, eBook, portable media player (PMP) and GPS navigator. Jz4740 is powered by Ingenic 360 MHz XBurst CPU core (JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture provides high integration, high performance and low power consumption.

JzRISC incorporated in Jz4740 is the advanced and power-efficient 32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K D-Cache, and can operate at speeds up to 400 MHz.

On-chip modules such as LCD controller, embedded audio codec, multi- channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich suite of peripherals for multimedia application. NAND controller (SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are also available.

For more info about Ingenic XBurst Jz4740:
http://en.ingenic.cn/eng/
http://www.linux-mips.org/wiki/Ingenic

This patch introduces XBurst CPU support in U-Boot. It's compatible with MIPS32, but requires a bit different cache maintenance, timer routines, and boot mechanism using USB boot tool, so XBurst support can go into a separate new home, cpu/xburst/.

---
Changes since v7:

* Fix checkpatch errors/warnings

Changes since v6:

* Rebased against the latest U-Boot/MIPS codebase (the previous patches up to v6 were based on v1.1.6). $gp usage, relocation code and so on are getting synced with the current MIPS support in U-Boot.

* Use -mach=mips32, pass -EL specifiers in PLATFORM_CPPFLAGS and PLATFORM_LDFLAGS. This port works in Little-endian.

* Remove NAND-boot stuff. Those bits will be submitted as a nand_spl support, once this Jz4740 base support is merged.

* jzsoc_init() is removed. calc_clocks() and rtc_init() will be called through board_early_init_f().

* jz_serial.c is almost the same with standard ns16550 driver, but we dont' use it, because it need a special tweak for jz4740 like this:

@@ -39,7 +39,11 @@ void NS16550_init (NS16550_t com_port, int baud_divisor)
serial_out(0, &com_port->dlm);
serial_out(UART_LCRVAL, &com_port->lcr); serial_out(UART_MCRVAL, &com_port->mcr);
+#if defined(CONFIG_JZ4740) /* 0x10: for JZ4740 UART Module Enable */
+ serial_out(UART_FCRVAL | 0x10, &com_port->fcr);
+#else
serial_out(UART_FCRVAL, &com_port->fcr);
+#endif
serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); serial_out(baud_divisor & 0xff, &com_port->dll); serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);

If this is acceptable, we'll change to use standard ns16550 later.

* Coding styles and build warnings fixed

 README                              |    1 +
 arch/mips/cpu/xburst/Makefile       |   49 ++
 arch/mips/cpu/xburst/config.mk      |   24 +
 arch/mips/cpu/xburst/cpu.c          |  152 +++++
 arch/mips/cpu/xburst/jz4740.c       |  248 ++++++++
 arch/mips/cpu/xburst/jz_serial.c    |  114 ++++
 arch/mips/cpu/xburst/start.S        |  171 ++++++
 arch/mips/cpu/xburst/timer.c        |  162 +++++
 arch/mips/include/asm/global_data.h |   11 +
 arch/mips/include/asm/jz4740.h      | 1150 +++++++++++++++++++++++++++++++++++
 10 files changed, 2082 insertions(+), 0 deletions(-)
 create mode 100644 arch/mips/cpu/xburst/Makefile
 create mode 100644 arch/mips/cpu/xburst/config.mk
 create mode 100644 arch/mips/cpu/xburst/cpu.c
 create mode 100644 arch/mips/cpu/xburst/jz4740.c
 create mode 100644 arch/mips/cpu/xburst/jz_serial.c
 create mode 100644 arch/mips/cpu/xburst/start.S
 create mode 100644 arch/mips/cpu/xburst/timer.c
 create mode 100644 arch/mips/include/asm/jz4740.h
README +1 -0
index 3a8938f..323ba61 100644
@@ -181,6 +181,7 @@ Directory Hierarchy:
   /mips			Files generic to MIPS architecture
     /cpu		CPU specific files
       /mips32		Files specific to MIPS32 CPUs
+      /xburst		Files specific to Ingenic XBurst CPUs
     /lib		Architecture specific library files
   /nios2		Files generic to Altera NIOS2 architecture
     /cpu		CPU specific files
arch/mips/cpu/xburst/Makefile new file +49 -0

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arch/mips/cpu/xburst/config.mk new file +24 -0
new file mode 100644
index 0000000..bce0c1b
@@ -0,0 +1,24 @@
+#
+# Copyright (C) 2011 Xiangfu Liu <[email protected]>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_CPPFLAGS += -march=mips32 -EL
+PLATFORM_LDFLAGS += -EL
arch/mips/cpu/xburst/cpu.c new file +152 -0

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arch/mips/cpu/xburst/jz4740.c new file +248 -0

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arch/mips/cpu/xburst/jz_serial.c new file +114 -0

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arch/mips/cpu/xburst/start.S new file +171 -0

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arch/mips/cpu/xburst/timer.c new file +162 -0

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arch/mips/include/asm/global_data.h +11 -0
index b193517..f6cf9fe 100644
@@ -39,6 +39,17 @@
 typedef	struct	global_data {
 	bd_t		*bd;
 	unsigned long	flags;
+#ifdef CONFIG_JZSOC
+	/* There are other clocks in the jz4740 */
+	unsigned long	cpu_clk;	/* CPU core clock */
+	unsigned long	sys_clk;	/* System bus clock */
+	unsigned long	per_clk;	/* Peripheral bus clock */
+	unsigned long	mem_clk;	/* Memory bus clock */
+	unsigned long	dev_clk;	/* Device clock */
+	/* "static data" needed by most of timer.c */
+	unsigned long	tbl;
+	unsigned long	lastinc;
+#endif
 	unsigned long	baudrate;
 	unsigned long	have_console;	/* serial_init() was called */
 #ifdef CONFIG_PRE_CONSOLE_BUFFER
arch/mips/include/asm/jz4740.h new file +1150 -0

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Signature · 1 line
1.7.5.4
#2 lore raw

PATCH v8 2/3 MIPS: Jz4740: Add NAND driver

In reply to Shinya Kuribayashi

From: Xiangfu Liu <[email protected]>
Date: Wed, 12 Oct 2011 12:24:06 +0800

Jz4740 NAND flash controller can support:
* MLC NAND as well as SLC NAND
* all 8-bit/16-bit NAND flash devices
* HAMMING and RS hardware ECC
* automatic boot up from NAND flash devices

nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60. We'll bring up boot-from-NAND support in nand_spl/ in the future.

---
Changes since v7:

* Fix checkpatch errors/warnings

Changes since v6:

* Remove NAND-boot stuff. Those bits will be submitted as a nand-spl support once this Jz4740 base support is merged.

* All previous comments from Scott are fixed.

* Bunch of coding style issues fixed.

 drivers/mtd/nand/Makefile      |    1 +
 drivers/mtd/nand/jz4740_nand.c |  261 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 262 insertions(+), 0 deletions(-)
 create mode 100644 drivers/mtd/nand/jz4740_nand.c
drivers/mtd/nand/Makefile +1 -0
index dae2442..1eeba5c 100644
@@ -45,6 +45,7 @@ COBJS-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
 COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
 COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
+COBJS-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
 COBJS-$(CONFIG_NAND_KB9202) += kb9202_nand.o
 COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
 COBJS-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
drivers/mtd/nand/jz4740_nand.c new file +261 -0

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Signature · 1 line
1.7.5.4
#3 lore raw

PATCH v8 2/3 MIPS: Jz4740: Add NAND driver

Quoted 9 lines · Shinya Kuribayashi

From: Xiangfu Liu <[email protected]>
Date: Wed, 12 Oct 2011 12:24:06 +0800

Jz4740 NAND flash controller can support:
* MLC NAND as well as SLC NAND
* all 8-bit/16-bit NAND flash devices
* HAMMING and RS hardware ECC
* automatic boot up from NAND flash devices

Quoted 6 lines

nand_ecclayout is set up for 2GiB NAND chip mounted in Qi LB60. We'll bring up boot-from-NAND support in nand_spl/ in the future.

-Scott

#4 lore raw

PATCH v8 3/3 MIPS: Jz4740: Add qi_lb60 board support

In reply to Shinya Kuribayashi

From: Xiangfu Liu <[email protected]>
Date: Wed, 12 Oct 2011 12:24:06 +0800

Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device from Qi hardware:

http://en.qi-hardware.com/wiki/Ben_NanoNote
http://en.qi-hardware.com/wiki/Main_Page
http://en.wikipedia.org/wiki/Qi_hardware

This Jz4740-based clamshell device does not use NOR flash to boot. The initial bring-up assumes that U-Boot is directly loaded into SDRAM using USB boot tool, and starts from 0x80100000.

About USB boot tool
-------------------

Jz4740 is one of the XBurst processors with USB boot functionality supported. The CPU can boot from a small ROM in the LSI, initialize CPU and USB module, then wait for USB commands from the USB host. We can send 8 KB binary data to the CPU cache using USB boot tool.

USB boot tool is available to the public at Ingenic website. Also there is an alternative Debian package named xburst-tools.

---
Changes since v7:

* Fix checkpatch errors/warnings

Changes since v6:

* <nanonote.h> config files is folded into <qi_lb60.h>

* Following configs are deleted:
CONFIG_SYS_64BIT_VSPRINTF
CONFIG_NANDBOOT_CFG
CONFIG_QI_LB60

 MAINTAINERS                 |    4 +
 MAKEALL                     |    4 +-
 board/qi/qi_lb60/Makefile   |   45 +++++++++
 board/qi/qi_lb60/config.mk  |   31 +++++++
 board/qi/qi_lb60/qi_lb60.c  |  104 +++++++++++++++++++++
 board/qi/qi_lb60/u-boot.lds |   61 +++++++++++++
 boards.cfg                  |    1 +
 include/configs/qi_lb60.h   |  211 +++++++++++++++++++++++++++++++++++++++++++
 8 files changed, 460 insertions(+), 1 deletions(-)
 create mode 100644 board/qi/qi_lb60/Makefile
 create mode 100644 board/qi/qi_lb60/config.mk
 create mode 100644 board/qi/qi_lb60/qi_lb60.c
 create mode 100644 board/qi/qi_lb60/u-boot.lds
 create mode 100644 include/configs/qi_lb60.h
MAINTAINERS +4 -0
index 3ab38fa..bb95e6d 100644
@@ -928,6 +928,10 @@ Stefan Roese <[email protected]>
 
 	vct_xxx		MIPS32 4Kc
 
+Xiangfu Liu <[email protected]>
+
+	qi_lb60		MIPS32 (XBurst Jz4740 SoC)
+
 #########################################################################
 # Nios-II Systems:							#
 #									#
MAKEALL +3 -1
index 52bc355..f582f8b 100755
@@ -400,7 +400,9 @@ LIST_mips="		\
 ## MIPS Systems		(little endian)
 #########################################################################
 
-LIST_mips4kc_el=""
+LIST_mips4kc_el="	\
+	qi_lb60		\
+"
 
 LIST_mips5kc_el=""
 
board/qi/qi_lb60/Makefile new file +45 -0

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board/qi/qi_lb60/config.mk new file +31 -0
new file mode 100644
index 0000000..858e6a2
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2006 Qi Hardware, Inc.
+# Author: Xiangfu Liu <[email protected]>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# Qi Hardware, Inc. Ben NanoNote (QI_LB60)
+#
+
+ifndef TEXT_BASE
+# ROM version
+# TEXT_BASE = 0x88000000
+
+# RAM version
+TEXT_BASE = 0x80100000
+endif
board/qi/qi_lb60/qi_lb60.c new file +104 -0

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board/qi/qi_lb60/u-boot.lds new file +61 -0

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boards.cfg +1 -0
index 65482ac..d3d610d 100644
@@ -302,6 +302,7 @@ vct_platinumavc              mips        mips32      vct                 microna
 vct_platinumavc_small        mips        mips32      vct                 micronas       -           vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE
 vct_platinumavc_onenand      mips        mips32      vct                 micronas       -           vct:VCT_PLATINUMAVC,VCT_ONENAND
 vct_platinumavc_onenand_small mips       mips32      vct                 micronas       -           vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE
+qi_lb60                      mips        xburst      qi_lb60             qi
 nios2-generic                nios2       nios2       nios2-generic       altera
 PCI5441                      nios2       nios2       pci5441             psyent
 PK1C20                       nios2       nios2       pk1c20              psyent
include/configs/qi_lb60.h new file +211 -0

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Signature · 1 line
1.7.5.4
#5 lore raw

PATCH v8 3/3 MIPS: Jz4740: Add qi_lb60 board support

Dear Xiangfu Liu,

Quoted 11 lines · In message <[email protected]> you wrote:

Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device from Qi hardware:

http://en.qi-hardware.com/wiki/Ben_NanoNote
http://en.qi-hardware.com/wiki/Main_Page
http://en.wikipedia.org/wiki/Qi_hardware

This Jz4740-based clamshell device does not use NOR flash to boot. The initial bring-up assumes that U-Boot is directly loaded into SDRAM using USB boot tool, and starts from 0x80100000.

...

Quoted 6 lines
 MAINTAINERS                 |    4 +
 MAKEALL                     |    4 +-
 board/qi/qi_lb60/Makefile   |   45 +++++++++
 board/qi/qi_lb60/config.mk  |   31 +++++++
 board/qi/qi_lb60/qi_lb60.c  |  104 +++++++++++++++++++++
 board/qi/qi_lb60/u-boot.lds |   61 +++++++++++++
Quoted 8 lines
 boards.cfg                  |    1 +
 include/configs/qi_lb60.h   |  211 +++++++++++++++++++++++++++++++++++++++++++
 8 files changed, 460 insertions(+), 1 deletions(-)
 create mode 100644 board/qi/qi_lb60/Makefile
 create mode 100644 board/qi/qi_lb60/config.mk
 create mode 100644 board/qi/qi_lb60/qi_lb60.c
 create mode 100644 board/qi/qi_lb60/u-boot.lds
 create mode 100644 include/configs/qi_lb60.h

It has been pointed out (see [1]) that the files

	board/qi/qi_lb60/qi_lb60.c
	include/configs/qi_lb60.h

added by this patch are licensed as GPL "version 3 of the License, or (at your option) any later version" - however, thisis incompatible with the GPLv2 and GPLv2+ licenses that cover the rest of U-Boot.

Would you be willing to re-license these files under GPLv2+ (and submit apatch to do that) ? Otherwise we would probably be forced to remove the qi_lb60 board support to be legally clean.

Sorry for the inconvenience, but obviously this issue slipped through at the initial review of the code...

[1] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/164965

Best regards,

Wolfgang Denk

Signature · 4 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Intel told us the Pentium would have "RISK" features...
#6 lore raw

PATCH v8 3/3 MIPS: Jz4740: Add qi_lb60 board support

Dear Wolfgang and Tom,

Am 03.07.2013 11:54, schrieb Wolfgang Denk:

Quoted 39 lines

Dear Xiangfu Liu,

Quoted 11 lines · In message <[email protected]> you wrote:

Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device from Qi hardware:

http://en.qi-hardware.com/wiki/Ben_NanoNote
http://en.qi-hardware.com/wiki/Main_Page
http://en.wikipedia.org/wiki/Qi_hardware

This Jz4740-based clamshell device does not use NOR flash to boot. The initial bring-up assumes that U-Boot is directly loaded into SDRAM using USB boot tool, and starts from 0x80100000.

...

Quoted 9 lines
  MAINTAINERS                 |    4 +
  MAKEALL                     |    4 +-
  board/qi/qi_lb60/Makefile   |   45 +++++++++
  board/qi/qi_lb60/config.mk  |   31 +++++++
  board/qi/qi_lb60/qi_lb60.c  |  104 +++++++++++++++++++++
  board/qi/qi_lb60/u-boot.lds |   61 +++++++++++++
  boards.cfg                  |    1 +
  include/configs/qi_lb60.h   |  211 +++++++++++++++++++++++++++++++++++++++++++
  8 files changed, 460 insertions(+), 1 deletions(-)
Quoted 5 lines

create mode 100644 board/qi/qi_lb60/Makefile
create mode 100644 board/qi/qi_lb60/config.mk
create mode 100644 board/qi/qi_lb60/qi_lb60.c
create mode 100644 board/qi/qi_lb60/u-boot.lds
create mode 100644 include/configs/qi_lb60.h

It has been pointed out (see [1]) that the files

	board/qi/qi_lb60/qi_lb60.c
	include/configs/qi_lb60.h

added by this patch are licensed as GPL "version 3 of the License, or (at your option) any later version" - however, this is incompatible with the GPLv2 and GPLv2+ licenses that cover the rest of U-Boot.

Quoted 8 lines

Would you be willing to re-license these files under GPLv2+ (and submit apatch to do that) ? Otherwise we would probably be forced to remove the qi_lb60 board support to be legally clean.

Sorry for the inconvenience, but obviously this issue slipped through at the initial review of the code...

[1] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/164965

No answer since > one week.

Should we revert this for v2013.07, then?

Best regards

Dirk

[1]
http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=commit;h=3c945542dad99b1ec4a324ad6b69b8de8829827b

#7 lore raw

PATCH v8 3/3 MIPS: Jz4740: Add qi_lb60 board support

Quoted 46 lines · Dirk Behme

Dear Wolfgang and Tom,

Am 03.07.2013 11:54, schrieb Wolfgang Denk:

Quoted 43 lines

Dear Xiangfu Liu,

Quoted 11 lines · In message <[email protected]> you wrote:

Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device from Qi hardware:

http://en.qi-hardware.com/wiki/Ben_NanoNote
http://en.qi-hardware.com/wiki/Main_Page
http://en.wikipedia.org/wiki/Qi_hardware

This Jz4740-based clamshell device does not use NOR flash to boot. The initial bring-up assumes that U-Boot is directly loaded into SDRAM using USB boot tool, and starts from 0x80100000.

...

Quoted 6 lines
 MAINTAINERS                 |    4 +
 MAKEALL                     |    4 +-
 board/qi/qi_lb60/Makefile   |   45 +++++++++
 board/qi/qi_lb60/config.mk  |   31 +++++++
 board/qi/qi_lb60/qi_lb60.c  |  104 +++++++++++++++++++++
 board/qi/qi_lb60/u-boot.lds |   61 +++++++++++++
Quoted 8 lines
 boards.cfg                  |    1 +
 include/configs/qi_lb60.h   |  211 +++++++++++++++++++++++++++++++++++++++++++
 8 files changed, 460 insertions(+), 1 deletions(-)
 create mode 100644 board/qi/qi_lb60/Makefile
 create mode 100644 board/qi/qi_lb60/config.mk
 create mode 100644 board/qi/qi_lb60/qi_lb60.c
 create mode 100644 board/qi/qi_lb60/u-boot.lds
 create mode 100644 include/configs/qi_lb60.h

It has been pointed out (see [1]) that the files

	board/qi/qi_lb60/qi_lb60.c
	include/configs/qi_lb60.h

added by this patch are licensed as GPL "version 3 of the License, or (at your option) any later version" - however, this is incompatible with the GPLv2 and GPLv2+ licenses that cover the rest of U-Boot.

Would you be willing to re-license these files under GPLv2+ (and submit apatch to do that) ? Otherwise we would probably be forced to remove the qi_lb60 board support to be legally clean.

Quoted 8 lines
Quoted 4 lines

Sorry for the inconvenience, but obviously this issue slipped through at the initial review of the code...

[1] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/164965

No answer since > one week.

Should we revert this for v2013.07, then?

Yes. I've done the revert and posted the patch, and I shall push it later today (barring an update from the authors) along with a few other things in prepartion for release.

Signature · 8 lines
Tom
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#9 lore raw

[U-Boot] GPL v3 only code in U-Boot

Hi Dirk,

No as there is still GPLv2 only code U-Boot.

Regards

Graeme

Quoted 24 lines · Dirk Behme

Hi,

hopefully ;) a short question: We found that the commit

http://git.denx.de/?p=u-boot.**git;a=commitdiff;h=**
3c945542dad99b1ec4a324ad6b69b8**de8829827b<http://git.denx.de/?p=u-boot.git;a=commitdiff;h=3c945542dad99b1ec4a324ad6b69b8de8829827b>

contains two files

board/qi/qi_lb60/qi_lb60.c
include/configs/qi_lb60.h

which seem to be GPL v3 *only*.

Is this ok for U-Boot?

Many thanks and best regards

Dirk
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#10 lore raw

[U-Boot] GPL v3 only code in U-Boot

In reply to Dirk Behme

Dear Dirk Behme,

Quoted 11 lines · In message <[email protected]> you wrote:

hopefully ;) a short question: We found that the commit

http://git.denx.de/?p=u-boot.git;a=commitdiff;h=3c945542dad99b1ec4a324ad6b69b8de8829827b

contains two files

board/qi/qi_lb60/qi_lb60.c
include/configs/qi_lb60.h

which seem to be GPL v3 *only*.

Actually it's GPL-3.0+: "version 3 of the License, or (at your option) any later version".

Quoted 1 line

Is this ok for U-Boot?

No, as GPLv3 is not compatible with GPLv2 / GPLv2+ which is used in U-Boot. This needs to be fixed. Thanks for pointing out.

Best regards,

Wolfgang Denk

Signature · 4 lines
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