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x86: turn off cache: set control register properly

PATCH New Ondrej Kupka 3 participants 5 messages Sep 30, 2011 – Oct 16, 2011 x86

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#0 lore raw

PATCH 1/1 x86: turn off cache: set control register properly

Bits should be ORed when they are supposed to be added together

---
 arch/x86/cpu/start16.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/x86/cpu/start16.S +1 -1
index 3d3017a..9dabff2 100644
@@ -50,7 +50,7 @@ board_init16_ret:
 
 	/* Turn of cache (this might require a 486-class CPU) */
 	movl	%cr0, %eax
-	orl	$(X86_CR0_NW & X86_CR0_CD), %eax
+	orl	$(X86_CR0_NW | X86_CR0_CD), %eax
 	movl	%eax, %cr0
 	wbinvd
 
Signature · 1 line
1.7.4.1
#1 lore raw

PATCH 1/1 x86: turn off cache: set control register properly

Quoted 13 lines · Ondrej Kupka

Bits should be ORed when they are supposed to be added together

---
 arch/x86/cpu/start16.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/x86/cpu/start16.S +0 -0
index 3d3017a..9dabff2 100644

arch/x86/cpu/start16.S board_init16_ret: · line 55

Quoted 7 lines
arch/x86/cpu/start16.S +1 -1
@@ -50,7 +50,7 @@ board_init16_ret:
 
 	/* Turn of cache (this might require a 486-class CPU) */
 	movl	%cr0, %eax
-	orl	$(X86_CR0_NW & X86_CR0_CD), %eax
+	orl	$(X86_CR0_NW | X86_CR0_CD), %eax
 	movl	%eax, %cr0
 	wbinvd

Dear Ondrej Kupka,

Can we make this into some macro so we'd avoid such errors in the future ?

Cheers

#2 lore raw

PATCH 1/1 x86: turn off cache: set control register properly

Dear Marek,

I am not really sure it would bring any advantage since it is used only on 2 places as far as I know and the meaning of those few lines of code is very clear and commented...

Regards,
Ondra K.

Quoted 28 lines · Marek Vasut
Quoted 13 lines · Ondrej Kupka

Bits should be ORed when they are supposed to be added together

---
 arch/x86/cpu/start16.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/x86/cpu/start16.S +0 -0
index 3d3017a..9dabff2 100644

arch/x86/cpu/start16.S board_init16_ret: · line 55

Quoted 7 lines
arch/x86/cpu/start16.S +1 -1
@@ -50,7 +50,7 @@ board_init16_ret:
 
      /* Turn of cache (this might require a 486-class CPU) */
      movl    %cr0, %eax
-     orl     $(X86_CR0_NW & X86_CR0_CD), %eax
+     orl     $(X86_CR0_NW | X86_CR0_CD), %eax
      movl    %eax, %cr0
      wbinvd

Dear Ondrej Kupka,

Can we make this into some macro so we'd avoid such errors in the future ?

Cheers

#3 lore raw

PATCH 1/1 x86: turn off cache: set control register properly

Quoted 8 lines · Ondra Kupka

Dear Marek,

I am not really sure it would bring any advantage since it is used only on 2 places as far as I know and the meaning of those few lines of code is very clear and commented...

Regards,
Ondra K.

Dear Ondrej Kupka,

Please STOP TOP-POSTING !!

Otherwise ok.

Cheers