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NAND SPL support for mcx board

PATCH New Ilya Yanok 3 participants 20 messages Oct 17, 2011 – Oct 31, 2011

Subsystems (3)
Arm (32-bit) Memory technology devices (MTD) NAND flash
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Ilya Yanok

author
#0 lore raw

cover NAND SPL support for mcx board

Hi All,

these patches enable support for booting from NAND without X-loader for HTKW mcx board as well as some OMAP/SPL fixes.

The last patch relies on my recently posted davinci_emac/mcx series while the others can be applied directly on master.

Signed-off-by Ilya Yanok <[email protected]>
author
#1 lore raw

PATCH 1/7 omap3/emif4: fix registers definition

Fix EMIF4 registers definition.

Signed-off-by Ilya Yanok <[email protected]>
---
 arch/arm/include/asm/arch-omap3/cpu.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
arch/arm/include/asm/arch-omap3/cpu.h +1 -0
index 08a725d..97fbee6 100644
@@ -218,6 +218,7 @@ struct sdrc {
 
 /* EMIF4 */
 typedef struct emif4 {
+	unsigned int emif_mod_id_rev;
 	unsigned int sdram_sts;
 	unsigned int sdram_config;
 	unsigned int res1;
Signature · 1 line
1.7.6.4
author
#2 lore raw

PATCH 2/7 omap/spl: don't assume u-boot.bin size, use CONFIG_SYS_NAND_U_BOOT_SIZE

In reply to Ilya Yanok

Don't hardcode u-boot.bin size for the case where mkimage signature is missing, use CONFIG_SYS_NAND_U_BOOT_SIZE for this.

Signed-off-by Ilya Yanok <[email protected]>
---
 arch/arm/cpu/armv7/omap-common/spl.c |    3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/omap-common/spl.c +1 -2
index c76fea6..f28411b 100644
@@ -81,8 +81,7 @@ void spl_parse_image_header(const struct image_header *header)
 		printf("mkimage signature not found - ih_magic = %x\n",
 			header->ih_magic);
 		puts("Assuming u-boot.bin ..\n");
-		/* Let's assume U-Boot will not be more than 200 KB */
-		spl_image.size = 200 * 1024;
+		spl_image.size = CONFIG_SYS_NAND_U_BOOT_SIZE;
 		spl_image.entry_point = CONFIG_SYS_TEXT_BASE;
 		spl_image.load_addr = CONFIG_SYS_TEXT_BASE;
 		spl_image.os = IH_OS_U_BOOT;
Signature · 1 line
1.7.6.4
#3 lore raw

PATCH 2/7 omap/spl: don't assume u-boot.bin size, use CONFIG_SYS_NAND_U_BOOT_SIZE

Quoted 4 lines · Ilya Yanok

Don't hardcode u-boot.bin size for the case where mkimage signature is missing, use CONFIG_SYS_NAND_U_BOOT_SIZE for this.

Signed-off-by Ilya Yanok <[email protected]>

I don't like this since it means we need to always define this variable when well behaved situations will have shipped u-boot.img anyhow. Or is there really a good reason
to fall back to u-boot.bin?

Signature · 1 line
Tom
author
#4 lore raw

PATCH 2/7 omap/spl: don't assume u-boot.bin size, use CONFIG_SYS_NAND_U_BOOT_SIZE

Hi Tom,

Quoted 9 lines · Tom Rini
Quoted 4 lines

Don't hardcode u-boot.bin size for the case where mkimage signature is missing, use CONFIG_SYS_NAND_U_BOOT_SIZE for this.

Signed-off-by Ilya Yanok <[email protected]>

I don't like this since it means we need to always define this variable when well behaved situations will have shipped u-boot.img anyhow. Or is there really a good reason
to fall back to u-boot.bin?

No, I don't think so. I got your point. Still I think hardcoding the size value is not very good solution either. Maybe we can add something like

#ifndef CONFIG_SYS_NAND_U_BOOT_SIZE
#define CONFIG_SYS_NAND_U_BOOT_SIZE (200 * 1024) /* 200kB - default */ #endif

?

Regards, Ilya.

author
#5 lore raw

PATCH 2/7 omap/spl: don't assume u-boot.bin size, use CONFIG_SYS_NAND_U_BOOT_SIZE

In reply to Tom Rini

Hi Tom, All,

Quoted 4 lines · Tom Rini
Quoted 4 lines

Don't hardcode u-boot.bin size for the case where mkimage signature is missing, use CONFIG_SYS_NAND_U_BOOT_SIZE for this.

Signed-off-by Ilya Yanok <[email protected]>

So what about this patch? Should I drop it?

Regards, Ilya.

#6 lore raw

PATCH 2/7 omap/spl: don't assume u-boot.bin size, use CONFIG_SYS_NAND_U_BOOT_SIZE

Quoted 9 lines · Ilya Yanok

Hi Tom, All,

Quoted 4 lines · Tom Rini
Quoted 4 lines

Don't hardcode u-boot.bin size for the case where mkimage signature is missing, use CONFIG_SYS_NAND_U_BOOT_SIZE for this.

Signed-off-by Ilya Yanok <[email protected]>

So what about this patch? Should I drop it?

That would be my vote, but I don't have a MAINTAINER hat anywhere here ;)

Signature · 1 line
Tom
author
#7 lore raw

PATCH 3/7 omap/spl: actually enable the console

In reply to Ilya Yanok

Currently OMAP SPL code does all the initialization but does not set the gd->have_console value so no output is actually performed. This patch sets gd->have_console to 1 if CONFIG_SPL_CONSOLE is defined.

Signed-off-by Ilya Yanok <[email protected]>
---
 arch/arm/cpu/armv7/omap-common/spl.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)
arch/arm/cpu/armv7/omap-common/spl.c +4 -0
index f28411b..3d3e95c 100644
@@ -152,6 +152,10 @@ void preloader_console_init(void)
 
 	serial_init();		/* serial communications setup */
 
+#ifdef CONFIG_SPL_CONSOLE
+	gd->have_console = 1;
+#endif
+
 	/* Avoid a second "U-Boot" coming from this string */
 	u_boot_rev = &u_boot_rev[7];
Signature · 1 line
1.7.6.4
#8 lore raw

PATCH 3/7 omap/spl: actually enable the console

Quoted 5 lines · Ilya Yanok

Currently OMAP SPL code does all the initialization but does not set the gd->have_console value so no output is actually performed. This patch sets gd->have_console to 1 if CONFIG_SPL_CONSOLE is defined.

Signed-off-by Ilya Yanok <[email protected]>

So, this is because of a behavior change. Do we want an SPL_CONSOLE variable? Or should we just bring back the previous behavior? I kind of think the previous
behavior... Others?

Signature · 1 line
Tom
author
#9 lore raw

PATCH 3/7 omap/spl: actually enable the console

Hi Tom,

Quoted 10 lines
Quoted 5 lines

Currently OMAP SPL code does all the initialization but does not set the gd->have_console value so no output is actually performed. This patch sets gd->have_console to 1 if CONFIG_SPL_CONSOLE is defined.

Signed-off-by Ilya Yanok <[email protected]>

So, this is because of a behavior change. Do we want an SPL_CONSOLE variable? Or should we just bring back the previous behavior? I kind of think the previous
behavior... Others?

So what will be your decision? Should I remove SPL_CONSOLE and repost the patch? Or should I drop it completely?

Regards, Ilya.

#10 lore raw

PATCH 3/7 omap/spl: actually enable the console

Quoted 8 lines · Ilya Yanok

Hi Tom,

Quoted 6 lines
Quoted 5 lines

Currently OMAP SPL code does all the initialization but does not set the gd->have_console value so no output is actually performed. This patch sets gd->have_console to 1 if CONFIG_SPL_CONSOLE is defined.

Signed-off-by Ilya Yanok <[email protected]>
Quoted 7 lines
Quoted 4 lines

So, this is because of a behavior change. ?Do we want an SPL_CONSOLE variable? Or should we just bring back the previous behavior? ?I kind of think the previous
behavior... ?Others?

So what will be your decision? Should I remove SPL_CONSOLE and repost the patch? Or should I drop it completely?

I would say just drop the #ifdef part.

Signature · 1 line
Tom
author
#11 lore raw

PATCH 4/7 nand_spl_simple: add support for software ECC

In reply to Ilya Yanok

This patch adds support for software ECC to the nand_spl_simple driver. To enable this one have to define CONFIG_SPL_NAND_SOFTECC.

Tested on OMAP3.

Signed-off-by Ilya Yanok <[email protected]>
---
 drivers/mtd/nand/nand_ecc.c        |    2 +-
 drivers/mtd/nand/nand_spl_simple.c |   11 ++++++++++-
 2 files changed, 11 insertions(+), 2 deletions(-)
drivers/mtd/nand/nand_ecc.c +1 -1
index 52bc916..81f0e08 100644
@@ -50,7 +50,7 @@
  * only nand_correct_data() is needed
  */
 
-#ifndef CONFIG_NAND_SPL
+#if !defined(CONFIG_NAND_SPL) || defined(CONFIG_SPL_NAND_SOFTECC)
 /*
  * Pre-calculated 256-way 1 byte column parity
  */
drivers/mtd/nand/nand_spl_simple.c +10 -1
index 71491d4..dd1de27 100644
@@ -21,6 +21,7 @@
 #include <common.h>
 #include <nand.h>
 #include <asm/io.h>
+#include <linux/mtd/nand_ecc.h>
 
 static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
 static nand_info_t mtd;

@@ -163,7 +164,8 @@ static int nand_read_page(int block, int page, void *dst)
 	oob_data = ecc_calc + 0x200;
 
 	for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
-		this->ecc.hwctl(&mtd, NAND_ECC_READ);
+		if (this->ecc.mode != NAND_ECC_SOFT)
+			this->ecc.hwctl(&mtd, NAND_ECC_READ);
 		this->read_buf(&mtd, p, eccsize);
 		this->ecc.calculate(&mtd, p, &ecc_calc[i]);
 	}

@@ -233,6 +235,13 @@ void nand_init(void)
 	nand_chip.options = 0;
 	board_nand_init(&nand_chip);
 
+#ifdef CONFIG_SPL_NAND_SOFTECC
+	if (nand_chip.ecc.mode == NAND_ECC_SOFT) {
+		nand_chip.ecc.calculate = nand_calculate_ecc;
+		nand_chip.ecc.correct = nand_correct_data;
+	}
+#endif
+
 	if (nand_chip.select_chip)
 		nand_chip.select_chip(&mtd, 0);
 }
Signature · 1 line
1.7.6.4
author
#12 lore raw

PATCH 5/7 omap_gpmc: use SOFTECC in SPL if it's enabled

In reply to Ilya Yanok

Use software ECC for the SPL build if support for software ECC in SPL is enabled.

Signed-off-by Ilya Yanok <[email protected]>
---
 drivers/mtd/nand/omap_gpmc.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)
drivers/mtd/nand/omap_gpmc.c +3 -1
index 5bbec48..1dfe074 100644
@@ -348,7 +348,7 @@ int board_nand_init(struct nand_chip *nand)
 
 	nand->chip_delay = 100;
 	/* Default ECC mode */
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_NAND_SOFTECC)
 	nand->ecc.mode = NAND_ECC_SOFT;
 #else
 	nand->ecc.mode = NAND_ECC_HW;

@@ -359,7 +359,9 @@ int board_nand_init(struct nand_chip *nand)
 	nand->ecc.correct = omap_correct_data;
 	nand->ecc.calculate = omap_calculate_ecc;
 	omap_hwecc_init(nand);
+#endif
 
+#ifdef CONFIG_SPL_BUILD
 	if (nand->options & NAND_BUSWIDTH_16)
 		nand->read_buf = nand_read_buf16;
 	else
Signature · 1 line
1.7.6.4
#13 lore raw

PATCH 5/7 omap_gpmc: use SOFTECC in SPL if it's enabled

Hi Ilya,

Quoted 2 lines · Ilya Yanok

Use software ECC for the SPL build if support for software ECC in SPL is enabled.

I'am curious: Is there a special reason for having software ecc in SPL?

Regards
Simon

author
#14 lore raw

PATCH 5/7 omap_gpmc: use SOFTECC in SPL if it's enabled

Hi Simon,

Quoted 4 lines · Simon Schwarz
Quoted 2 lines

Use software ECC for the SPL build if support for software ECC in SPL is enabled.

I'am curious: Is there a special reason for having software ecc in SPL?

Well, yes. On OMAP2+ ECC mode defaults to software (incompatible with HW mode; 256 vs 512 bytes block size) both in U-Boot and Linux (U-Boot has command to change it while in Linux you have to recompile the kernel).

So we need software ecc to read images written from Linux.

Regards, Ilya.

#15 lore raw

PATCH 5/7 omap_gpmc: use SOFTECC in SPL if it's enabled

Hi Ilya,

Quoted 4 lines · Ilya Yanok

Hi Simon,

Quoted 1 line · Simon Schwarz
Quoted 1 line

Use software ECC for the SPL build if support for software ECC in

SPL is

Quoted 9 lines
Quoted 3 lines
Quoted 1 line

enabled.

I'am curious: Is there a special reason for having software ecc in SPL?

Well, yes. On OMAP2+ ECC mode defaults to software (incompatible with HW mode; 256 vs 512 bytes block size) both in U-Boot and Linux (U-Boot has command to change it while in Linux you have to recompile the kernel).

So we need software ecc to read images written from Linux.

ok. Agreed.

Another thing just poped into my mind, ATM I have a DMA patch for devkit8000 on the ML:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/109744
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/112661

It speeds up the process of copying the u-boot/linux image. ATM this is in combination with HW ecc and I doubt that it will work seamlessly with SW-ecc, yet. However IMHO DMA in combination with SW-ecc could be nearly as fast as using HW-ecc.

So maybe an adaption is worth a try?

Regards
Simon

author
#16 lore raw

PATCH 5/7 omap_gpmc: use SOFTECC in SPL if it's enabled

Hi Simon,

Quoted 10 lines · Simon Schwarz
Quoted 1 line
Quoted 1 line
Quoted 1 line

Use software ECC for the SPL build if support for software ECC in

SPL is

Quoted 8 lines
Quoted 3 lines
Quoted 1 line

enabled.

I'am curious: Is there a special reason for having software ecc in SPL?

Well, yes. On OMAP2+ ECC mode defaults to software (incompatible with HW mode; 256 vs 512 bytes block size) both in U-Boot and Linux (U-Boot has command to change it while in Linux you have to recompile the kernel).

Quoted 8 lines
Quoted 1 line

So we need software ecc to read images written from Linux.

ok. Agreed.

Another thing just poped into my mind, ATM I have a DMA patch for devkit8000 on the ML:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/109744
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/112661

Yes, I've seen this patch.

Quoted 6 lines

It speeds up the process of copying the u-boot/linux image. ATM this is in combination with HW ecc and I doubt that it will work seamlessly with SW-ecc, yet. However IMHO DMA in combination with SW-ecc could be nearly as fast as using HW-ecc.

So maybe an adaption is worth a try?

Uh.. Had no time to look at it last days... I'll try to take a look at it this weekend.

Regards, Ilya.

author
#17 lore raw

PATCH 5/7 omap_gpmc: use SOFTECC in SPL if it's enabled

In reply to Simon Schwarz

Hi Simon,

Quoted 11 lines · Simon Schwarz

Another thing just poped into my mind, ATM I have a DMA patch for devkit8000 on the ML:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/109744
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/112661

It speeds up the process of copying the u-boot/linux image. ATM this is in combination with HW ecc and I doubt that it will work seamlessly with SW-ecc, yet. However IMHO DMA in combination with SW-ecc could be nearly as fast as using HW-ecc.

So maybe an adaption is worth a try?

Ok, I've finally taken a look at it. Adaption is very straight forward actually. This works for me:

(quoted diff) +0 -0

b/drivers/mtd/nand/nand_spl_simple.c
index 1402a35..1248f8f 100644

drivers/mtd/nand/nand_spl_simple.c +0 -0
@@ -284,7 +284,8 @@ static int nand_read_page_dma(int block, int page,

void *dst)

        for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
                res += omap3_dma_conf_transfer(0, nand_chip.IO_ADDR_R,
                        (uint32_t *)p, CONFIG_SYS_NAND_ECCSIZE/4);
-               this->ecc.hwctl(&mtd, NAND_ECC_READ);
+               if (this->ecc.mode != NAND_ECC_SOFT)
+                       this->ecc.hwctl(&mtd, NAND_ECC_READ);
                res += omap3_dma_start_transfer(0);
                /* correct ecc from former transfer */
                if (ecc_wait.valid != 0)

Regards, Ilya.

author
#18 lore raw

PATCH 6/7 nand_spl_simple: store temp data at CONFIG_SPL_NAND_WORKSPACE

In reply to Ilya Yanok

Currently nand_spl_simple puts it's temp data at 0x10000 offset in SDRAM which is likely to contain already loaded data. I can't see any way to determine some safe address automagically so make it up to board porter to provide the safe-to-use address via CONFIG_SPL_NAND_WORKSPACE value.

Signed-off-by Ilya Yanok <[email protected]>
---
 drivers/mtd/nand/nand_spl_simple.c |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)
drivers/mtd/nand/nand_spl_simple.c +6 -1
index dd1de27..e40cbf0 100644
@@ -158,8 +158,13 @@ static int nand_read_page(int block, int page, void *dst)
 
 	/* No malloc available for now, just use some temporary locations
 	 * in SDRAM
+	 * Please provide some safe value for CONFIG_SPL_NAND_WORKSPACE in
+	 * your board configuration, this is just a guess!!
 	 */
-	ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
+#ifndef CONFIG_SPL_NAND_WORKSPACE
+#define CONFIG_SPL_NAND_WORKSPACE	(CONFIG_SYS_SDRAM_BASE + 0x10000)
+#endif
+	ecc_calc = (u_char *)CONFIG_SPL_NAND_WORKSPACE;
 	ecc_code = ecc_calc + 0x100;
 	oob_data = ecc_calc + 0x200;
Signature · 1 line
1.7.6.4
author
#19 lore raw

PATCH 7/7 mcx: NAND SPL support

In reply to Ilya Yanok

support for booting from NAND without X-loader.

Signed-off-by Ilya Yanok <[email protected]>
---
 include/configs/mcx.h |   46 ++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 46 insertions(+), 0 deletions(-)
include/configs/mcx.h +46 -0
index 25fd610..ad35334 100644
@@ -283,6 +283,52 @@
 					 CONFIG_SYS_INIT_RAM_SIZE - \
 					 GENERATED_GBL_DATA_SIZE)
 
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_CONSOLE
+#define CONFIG_SPL_NAND_SIMPLE
+#define CONFIG_SPL_NAND_SOFTECC
+#define CONFIG_SPL_NAND_WORKSPACE	0x8f07f000 /* below BSS */
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+#define CONFIG_SPL_TEXT_BASE		0x40200000 /*CONFIG_SYS_SRAM_START*/
+#define CONFIG_SPL_MAX_SIZE		0xB400  /* 45 K */
+#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR	0x8f080000 /* end of RAM */
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
+#define CONFIG_SYS_NAND_ECCPOS		{40, 41, 42, 43, 44, 45, 46, 47,\
+					 48, 49, 50, 51, 52, 53, 54, 55,\
+					 56, 57, 58, 59, 60, 61, 62, 63}
+#define CONFIG_SYS_NAND_ECCSIZE		256
+#define CONFIG_SYS_NAND_ECCBYTES	3
+
+#define CONFIG_SYS_NAND_ECCSTEPS	(CONFIG_SYS_NAND_PAGE_SIZE / \
+						CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL       (CONFIG_SYS_NAND_ECCBYTES * \
+						CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x60000
+
 /*
  * ethernet support
  *
Signature · 1 line
1.7.6.4