ASV support for Exynos4 series

This patch adds ASV feature for exynos4 seires.

Asv(Adoptive support voltage) feature support to get spec of SoC.

And we can use to adjust voltage for operation SoC usign by ASV result.

Signed-off-by Jongpill Lee<[email protected]>

---
  arch/arm/mach-exynos4/Makefile           |    2 +-
  arch/arm/mach-exynos4/asv.c              |   78 ++++++++++++++++++++++++++++++
  arch/arm/mach-exynos4/include/mach/asv.h |   42 ++++++++++++++++
  3 files changed, 121 insertions(+), 1 deletions(-)

create mode 100644 arch/arm/mach-exynos4/asv.c create mode 100644 arch/arm/mach-exynos4/include/mach/asv.h

arch/arm/mach-exynos4/Makefile +1 -1

index 2bb18f4..0f3affe 100644
@@ -12,7 +12,7 @@ obj-				:=
 
  # Core support for EXYNOS4 system
 
-obj-$(CONFIG_ARCH_EXYNOS4)	+= cpu.o init.o clock.o irq-combiner.o
+obj-$(CONFIG_ARCH_EXYNOS4)	+= cpu.o init.o clock.o irq-combiner.o asv.o
  obj-$(CONFIG_ARCH_EXYNOS4)	+= setup-i2c0.o irq-eint.o dma.o pmu.o
  obj-$(CONFIG_CPU_EXYNOS4210)	+= clock-exynos4210.o
  obj-$(CONFIG_SOC_EXYNOS4212)	+= clock-exynos4212.o

arch/arm/mach-exynos4/asv.c new file +19 -0

new file mode 100644
index 0000000..498fac0
@@ -0,0 +1,78 @@
+/* linux/arch/arm/mach-exynos4/asv.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com/
+ *
+ * EXYNOS4 - ASV(Adaptive Supply Voltage) driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include<linux/init.h>
+#include<linux/types.h>
+#include<linux/kernel.h>
+#include<linux/err.h>
+#include<linux/io.h>
+#include<linux/slab.h>
+

arch/arm/mach-exynos4/asv.c new file +8 -0

+
+	/* I will add asv driver of exynos4 series to regist */
 
+
+	if (exynos_asv->check_vdd_arm) {
+		if (exynos_asv->check_vdd_arm()) {
+			pr_info("EXYNOS: It is wrong vdd_arm\n");
+			goto out2;
+		}

arch/arm/mach-exynos4/asv.c new file +31 -0

+		goto out2;
+	}
+
+	/* Get IDS ARM Value */
+	if (exynos_asv->get_ids) {
+		if (exynos_asv->get_ids(exynos_asv)) {
+			pr_info("EXYNOS: Fail to get IDS Value\n");
+			goto out2;
+		}
+	} else {
+		pr_info("EXYNOS: There is no get ids function\n");
+		goto out2;
+	}
+
+	if (exynos_asv->store_result) {
+		if (exynos_asv->store_result(exynos_asv)) {
+			pr_info("EXYNOS: Can not success to store result\n");
+			goto out2;
+		}
+	} else {
+		pr_info("EXYNOS: No store_result function\n");
+		goto out2;
+	}
+
+	return 0;
+out2:
+	kfree(exynos_asv);
+out1:
+	return -EINVAL;
+}
+device_initcall_sync(exynos_asv_init);

arch/arm/mach-exynos4/include/mach/asv.h new file +8 -0

new file mode 100644
index 0000000..038a872
@@ -0,0 +1,42 @@
+/* linux/arch/arm/mach-exynos4/include/mach/asv.h
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com/
+ *
+ * EXYNOS4 - Adoptive Support Voltage Header file
+ *
+ * This program is free software; you can redistribute it and/or modify

arch/arm/mach-exynos4/include/mach/asv.h new file +6 -0

+	unsigned int ids_offset;		/* ids_offset of chip */
+	unsigned int ids_mask;			/* ids_mask of chip */
+	unsigned int hpm_result;		/* hpm value of chip */
+	unsigned int ids_result;		/* ids value of chip */
+	int (*check_vdd_arm)(void);		/* check vdd_arm value, this function is selectable */
+	int (*pre_clock_init)(void);		/* clock init function to get hpm */

You're putting whole driver under arch/arm/, I'm wondering whether the functionality it provides could be handled by some generic framework, like cpufreq or devfreq. How this driver is different from cpufreq drivers ?

--
Thanks,
Sylwester
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This patch adds ASV feature for exynos4 seires.
Asv(Adoptive support voltage) feature support to get spec of SoC. And we can use to adjust voltage for operation SoC usign by ASV result.

Signed-off-by Jongpill Lee <[email protected]>

---

?arch/arm/mach-exynos4/Makefile ? ? ? ? ? | ? ?2 +-
?arch/arm/mach-exynos4/asv.c ? ? ? ? ? ? ?| ? 78 ++++++++++++++++++++++++++++++
?arch/arm/mach-exynos4/include/mach/asv.h | ? 42 ++++++++++++++++

?3 files changed, 121 insertions(+), 1 deletions(-) ?create mode 100644 arch/arm/mach-exynos4/asv.c ?create mode 100644 arch/arm/mach-exynos4/include/mach/asv.h

This patch adds function for exynos4210's asv driver. On Exynos4210, we can get ASV result using by HPM and IDS value. And asv result is sent through INFORM2 register.

Signed-off-by Jongpill Lee<[email protected]>

---
  arch/arm/mach-exynos4/Makefile                  |    2 +-
  arch/arm/mach-exynos4/asv-4210.c                |  338 +++++++++++++++++++++++
  arch/arm/mach-exynos4/asv.c                     |    8 +
  arch/arm/mach-exynos4/include/mach/asv.h        |    2 +
  arch/arm/mach-exynos4/include/mach/map.h        |    2 +
  arch/arm/mach-exynos4/include/mach/regs-clock.h |   18 ++
  arch/arm/mach-exynos4/include/mach/regs-iem.h   |   27 ++
  7 files changed, 396 insertions(+), 1 deletions(-)

create mode 100644 arch/arm/mach-exynos4/asv-4210.c create mode 100644 arch/arm/mach-exynos4/include/mach/regs-iem.h

arch/arm/mach-exynos4/Makefile +1 -1

index 0f3affe..8627669 100644
@@ -12,7 +12,7 @@ obj-				:=
 
  # Core support for EXYNOS4 system
 
-obj-$(CONFIG_ARCH_EXYNOS4)	+= cpu.o init.o clock.o irq-combiner.o asv.o
+obj-$(CONFIG_ARCH_EXYNOS4)	+= cpu.o init.o clock.o irq-combiner.o asv.o asv-4210.o
  obj-$(CONFIG_ARCH_EXYNOS4)	+= setup-i2c0.o irq-eint.o dma.o pmu.o
  obj-$(CONFIG_CPU_EXYNOS4210)	+= clock-exynos4210.o
  obj-$(CONFIG_SOC_EXYNOS4212)	+= clock-exynos4212.o

arch/arm/mach-exynos4/asv-4210.c new file +53 -0

new file mode 100644
index 0000000..81a1c67
@@ -0,0 +1,338 @@
+/* linux/arch/arm/mach-exynos/asv-4210.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com/
+ *
+ * EXYNOS4210 - ASV(Adaptive Supply Voltage) driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include<linux/init.h>
+#include<linux/types.h>
+#include<linux/kernel.h>
+#include<linux/err.h>
+#include<linux/clk.h>
+#include<linux/io.h>
+
+#include<plat/clock.h>
+
+#include<mach/regs-iem.h>
+#include<mach/regs-clock.h>
+#include<mach/asv.h>
+
+enum target_asv {
+	EXYNOS4210_1200,
+	EXYNOS4210_1400,
+	EXYNOS4210_SINGLE_1200,
+};
+
+struct asv_judge_table exynos4210_1200_limit[] = {
+	/* HPM , IDS */
+	{8 , 4},
+	{11 , 8},
+	{14 , 12},
+	{18 , 17},
+	{21 , 27},
+	{23 , 45},
+	{25 , 55},
+};
+
+static struct asv_judge_table exynos4210_1400_limit[] = {
+	/* HPM , IDS */
+	{13 , 8},
+	{17 , 12},
+	{22 , 32},
+	{26 , 52},
+};
+
+static struct asv_judge_table exynos4210_single_1200_limit[] = {
+	/* HPM , IDS */
+	{8 , 4},

arch/arm/mach-exynos4/asv-4210.c new file +20 -0

+					clk_parent->name, clk_copy->name);
+
+		clk_put(clk_parent);
+	}
+	clk_set_rate(clk_copy, 4800000);
+
+	clk_put(clk_copy);
+
+	/* HPM clock setting */
+	clk_copy = clk_get(NULL, "dout_copy");
+	if (IS_ERR(clk_copy)) {
+		pr_info("EXYNOS4210: ASV: DOUT_COPY clock get error\n");
+		return -EINVAL;
+	} else {
+		clk_parent = clk_get(NULL, "mout_mpll");
+		if (IS_ERR(clk_parent)) {
+			pr_info("EXYNOS4210: ASV: MOUT_APLL clock get error\n");
+			clk_put(clk_copy);
+			return -EINVAL;
+		}

arch/arm/mach-exynos4/asv-4210.c new file +25 -0

+
+	clk_hpm = clk_get(NULL, "sclk_hpm");
+	if (IS_ERR(clk_hpm)) {
+		pr_info("EXYNOS4210: ASV: Fail to get sclk_hpm\n");
+		return -EINVAL;
+	}
+
+	clk_set_rate(clk_hpm, (200 * 1000 * 1000));
+
+	clk_put(clk_hpm);
+
+	return 0;
+}
+
+static int exynos4210_asv_pre_clock_setup(void)
+{
+	/* APLL_CON0 level register */
+	__raw_writel(0x80FA0601, S5P_APLL_CON0L8);
+	__raw_writel(0x80C80601, S5P_APLL_CON0L7);
+	__raw_writel(0x80C80602, S5P_APLL_CON0L6);
+	__raw_writel(0x80C80604, S5P_APLL_CON0L5);
+	__raw_writel(0x80C80601, S5P_APLL_CON0L4);
+	__raw_writel(0x80C80601, S5P_APLL_CON0L3);
+	__raw_writel(0x80C80601, S5P_APLL_CON0L2);
+	__raw_writel(0x80C80601, S5P_APLL_CON0L1);

arch/arm/mach-exynos4/asv-4210.c new file +8 -0

+
+	return 0;
+}
+
+static int exynos4210_find_group(struct samsung_asv *asv_info,
+			      enum target_asv exynos4_target)
+{
+	unsigned int ret = 0;

arch/arm/mach-exynos4/asv-4210.c new file +23 -0

+			}
+		}
+	} else if (exynos4_target == EXYNOS4210_1400) {
+		ret = ARRAY_SIZE(exynos4210_1400_limit);
+
+		for (i = 0; i<  ARRAY_SIZE(exynos4210_1400_limit); i++) {
+			if (asv_info->hpm_result<= exynos4210_1400_limit[i].hpm_limit ||
+			   asv_info->ids_result<= exynos4210_1400_limit[i].ids_limit) {
+				ret = i;
+				break;
+			}
+		}
+	} else if (exynos4_target == EXYNOS4210_SINGLE_1200) {
+		ret = ARRAY_SIZE(exynos4210_single_1200_limit);
+
+		for (i = 0; i<  ARRAY_SIZE(exynos4210_single_1200_limit); i++) {
+			if (asv_info->hpm_result<= exynos4210_single_1200_limit[i].hpm_limit ||
+			   asv_info->ids_result<= exynos4210_single_1200_limit[i].ids_limit) {
+				ret = i;
+				break;
+			}
+		}
+	}

arch/arm/mach-exynos4/asv-4210.c new file +14 -0

+		} else {
+			/* HPM enable  */
+			tmp = __raw_readl(iem_base + EXYNOS4_APC_CONTROL);
+			tmp |= APC_HPM_EN;
+			__raw_writel(tmp, (iem_base + EXYNOS4_APC_CONTROL));
+
+			asv_info->pre_clock_setup();
+
+			/* IEM enable */
+			tmp = __raw_readl(iem_base + EXYNOS4_IECDPCCR);
+			tmp |= IEC_EN;
+			__raw_writel(tmp, (iem_base + EXYNOS4_IECDPCCR));
+		}
+	}

arch/arm/mach-exynos4/asv-4210.c new file +22 -0

+	asv_info->hpm_result = hpm_delay;
+
+	return 0;
+
+err:
+	iounmap(iem_base);
+
+	return -EPERM;
+}
+
+static int exynos4210_get_ids(struct samsung_asv *asv_info)
+{
+	unsigned int pkg_id_val;
+
+	if (!asv_info->ids_offset || !asv_info->ids_mask) {
+		pr_info("EXYNOS4: No ids_offset or No ids_mask\n");
+		return -EPERM;
+	}
+
+	pkg_id_val = __raw_readl(S5P_VA_CHIPID + 0x4);
+	asv_info->pkg_id = pkg_id_val;
+	asv_info->ids_result = ((pkg_id_val>>  asv_info->ids_offset)&

arch/arm/mach-exynos4/asv-4210.c new file +12 -0

+	default:
+		result_grp = exynos4210_find_group(asv_info, EXYNOS4210_1200);
+		result_grp |= SUPPORT_1000MHZ;
+		support_freq = "1.0GHz";
+		break;
+	}
+
+set_reg:
+	__raw_writel(result_grp, S5P_INFORM2);
+
+	pr_info("Support %s\n", support_freq);
+	pr_info("ASV Group for This Exynos4210 is 0x%x\n", result_grp);

arch/arm/mach-exynos4/asv-4210.c new file +8 -0

+
+	asv_info->get_ids = exynos4210_get_ids;
+	asv_info->get_hpm = exynos4210_get_hpm;
+	asv_info->check_vdd_arm = exynos4210_check_vdd_arm;
+	asv_info->pre_clock_init = exynos4210_asv_pre_clock_init;
+	asv_info->pre_clock_setup = exynos4210_asv_pre_clock_setup;
+	asv_info->store_result = exynos4210_asv_store_result;
+}

arch/arm/mach-exynos4/asv.c +2 -0

index 498fac0..5acc8b1 100644
@@ -17,6 +17,8 @@
  #include<linux/io.h>
  #include<linux/slab.h>
 
+#include<plat/cpu.h>
+
  #include<mach/map.h>
  #include<mach/asv.h>
 

arch/arm/mach-exynos4/asv.c +6 -0

+	if (soc_is_exynos4210())
+		exynos4210_asv_init(exynos_asv);
+	else {
+		pr_info("EXYNOS: No MACH ASV driver\n");
+		goto out2;
+	}
 
  	if (exynos_asv->check_vdd_arm) {
  		if (exynos_asv->check_vdd_arm()) {

arch/arm/mach-exynos4/include/mach/asv.h +2 -0

index 038a872..f84a11d 100644
@@ -39,4 +39,6 @@ struct samsung_asv {
  	int (*store_result)(struct samsung_asv *asv_info);
  };
 
+extern void exynos4210_asv_init(struct samsung_asv *asv_info);
+
  #endif /* __ASM_ARCH_ASV_H */

arch/arm/mach-exynos4/include/mach/map.h +2 -0

index 918a979..81fa158 100644
@@ -60,6 +60,8 @@
 
  #define EXYNOS4_PA_COMBINER		0x10440000
 
+#define EXYNOS4_PA_IEM			0x10460000
+
  #define EXYNOS4_PA_GIC_CPU		0x10480000
  #define EXYNOS4_PA_GIC_DIST		0x10490000
 

arch/arm/mach-exynos4/include/mach/regs-clock.h +0 -0

index 6c37ebe..23ee10f 100644
@@ -130,6 +130,24 @@
  #define S5P_CLKGATE_SCLKCPU		S5P_CLKREG(0x14800)

arch/arm/mach-exynos4/include/mach/regs-clock.h +1 -0

+
  #define S5P_APLL_LOCKTIME		(0x1C20)	/* 300us */
 
  #define S5P_APLLCON0_ENABLE_SHIFT	(31)

arch/arm/mach-exynos4/include/mach/regs-iem.h new file +0 -0

new file mode 100644
index 0000000..d9bf177

arch/arm/mach-exynos4/include/mach/regs-iem.h new file +6 -0

+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+

arch/arm/mach-exynos4/asv-4210.c new file +18 -0

+static int exynos4210_asv_pre_clock_init(void)
+{
+	struct clk *clk_hpm;
+	struct clk *clk_copy;
+	struct clk *clk_parent;
+
+	/* PWI clock setting */
+	clk_copy = clk_get(NULL, "sclk_pwi");
+	if (IS_ERR(clk_copy)) {
+		pr_info("EXYNOS4210: ASV : SCLK_PWI clock get error\n");
+		return -EINVAL;
+	} else {
+		clk_parent = clk_get(NULL, "xusbxti");
+
+		if (IS_ERR(clk_parent)) {
+			pr_info("EXYNOS4210: ASV: MOUT_APLL clock get error\n");
+			clk_put(clk_copy);
+			return -EINVAL;