Add a basic implementation for a coreboot board
PATCH v2 1/1 Add a basic implementation for a coreboot board
From: Gabe Black <[email protected]>
---
Changes in v2:
Get rid of some dead/unnecessary code in the Makefile and coreboot.c.
board/chromebook-x86/coreboot/Makefile | 53 +++++++++++++++ board/chromebook-x86/coreboot/coreboot.c | 77 ++++++++++++++++++++++ board/chromebook-x86/coreboot/coreboot_pci.c | 30 +++++++++ board/chromebook-x86/coreboot/coreboot_start.S | 29 ++++++++ board/chromebook-x86/coreboot/coreboot_start16.S | 46 +++++++++++++ 5 files changed, 235 insertions(+), 0 deletions(-) create mode 100644 board/chromebook-x86/coreboot/Makefile create mode 100644 board/chromebook-x86/coreboot/coreboot.c create mode 100644 board/chromebook-x86/coreboot/coreboot_pci.c create mode 100644 board/chromebook-x86/coreboot/coreboot_start.S create mode 100644 board/chromebook-x86/coreboot/coreboot_start16.S
board/chromebook-x86/coreboot/Makefile new file +53 -0
@@ -0,0 +1,53 @@ +# +# Copyright (c) 2011 The Chromium OS Authors. All rights reserved. +# (C) Copyright 2008 +# Graeme Russ, graeme.russ at gmail.com. +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd at denx.de. +# +# (C) Copyright 2002 +# Daniel Engstr?m, Omicron Ceti AB, daniel at omicron.se. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS-y += coreboot.o +COBJS-$(CONFIG_PCI) += coreboot_pci.o +SOBJS-y += coreboot_start16.o +SOBJS-y += coreboot_start.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +#########################################################################
board/chromebook-x86/coreboot/coreboot.c new file +77 -0
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board/chromebook-x86/coreboot/coreboot_pci.c new file +30 -0
@@ -0,0 +1,30 @@ +/* +* Copyright (c) 2011 The Chromium OS Authors. All rights reserved. +* (C) Copyright 2008,2009 +* Graeme Russ, <[email protected]> +* +* (C) Copyright 2002 +* Daniel Engstr?m, Omicron Ceti AB, <[email protected]> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + +void pci_init_board (void ) +{ +}
board/chromebook-x86/coreboot/coreboot_start.S new file +29 -0
@@ -0,0 +1,29 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. All rights reserved. + * (C) Copyright 2008 + * Graeme Russ, graeme.russ at gmail.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* board early intialization */ +.globl early_board_init +early_board_init: + /* No 32-bit board specific initialisation */ + jmp early_board_init_ret
board/chromebook-x86/coreboot/coreboot_start16.S new file +46 -0
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Signature · 1 line
1.7.3.1
PATCH v2 1/1 Add a basic implementation for a coreboot board
i'm not terribly familiar with what it takes to make an x86 board, but i don't see anything jumping out of this patch.
i would note however that you should merge the boards.cfg update into this patch. merging one or the other doesn't make much sense, and there's no reason to keep them split.
Quoted 1 line
+void
setup_pcat_compatibility()
should be "(void)"
-mike
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PATCH v2 1/1 Add a basic implementation for a coreboot board
The early startup code is in arch/x86/cpu/start.S or start16.S depending on the state of the CPU when u-boot is entered, and this code is called back into at various points during startup. You can see that those callbacks stubbed out where there's a label and then a jump back immediately after it, for instance here:
+board_init16:
+ jmp board_init16_ret
I have no problem merging the commits, but I'll wait for Graeme to weigh in since it's a little easier to merge them than to unmerge them.
Gabe
Quoted 13 lines · Mike Frysinger
i'm not terribly familiar with what it takes to make an x86 board, but i don't
see anything jumping out of this patch.i would note however that you should merge the boards.cfg update into this patch. merging one or the other doesn't make much sense, and there's no reason to keep them split.
Quoted 1 line
+void
setup_pcat_compatibility()should be "(void)"
-mike
PATCH v2 1/1 Add a basic implementation for a coreboot board
Quoted 5 lines · On Friday 04 November 2011 18:33:16 Gabe Black wrote:
The early startup code is in
arch/x86/cpu/start.Sorstart16.Sdepending on the state of the CPU when u-boot is entered, and this code is called back into at various points during startup. You can see that those callbacks stubbed out where there's a label and then a jump back immediately after it, for instance here:
when i said "jumping out", i meant "nothing jumps out at me as being wrong" ;) -mike
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PATCH v2 1/1 Add a basic implementation for a coreboot board
In reply to Gabe BlackHi Gabe,
Quoted 11 lines · Gabe Black
The early startup code is in
arch/x86/cpu/start.Sorstart16.Sdepending on the state of the CPU when u-boot is entered, and this code is called back into at various points during startup. You can see that those callbacks stubbed out where there's a label and then a jump back immediately after it, for instance here:board/chromebook-x86/coreboot/coreboot_start16.S new file +2
-0+board_init16: + jmp board_init16_retI have no problem merging the commits, but I'll wait for Graeme to weigh in since it's a little easier to merge them than to unmerge them.
Well I guess that is my cue ;)
I agree that this should be a single commit. I have a few other comments...
I'm just about to send through another patchset (today) which will probably impact on your patches - In particular I am adding more config granularity to deal with the horrible mess that is board_init_r(). Now that the merge window is closed, I will create a 'next' branch which you can work from.
Since coreboot is doing all the low level initialisation, I don't see the need for any of the 16-bit start code (start_16.S). Let's look at CONFIG_SKIP_LOWLEVEL_INIT. I don't know how to _not_ compile a source file based on a define using the COBJS-$(CONFIG_<blah>) style.
Also, we may be performing a completely unnecessary relocation - I think we should be able to start at board_init_r(), but there may be some board_init_f() functions that we may still need to call. This seems a very close parallel to IPL/SPL - Have a look at what they do
PATCH v2 1/1 Add a basic implementation for a coreboot board
In reply to Gabe BlackDear Gabe Black,
Quoted 10 lines · In message <[email protected]> you wrote:
--===============1488196431==
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bitFrom: Gabe Black <[email protected]>
Signed-off-by Gabe Black <[email protected]>---
Changes in v2:
Get rid of some dead/unnecessary code in theMakefileandcoreboot.c.
v2 ?????
...
board/chromebook-x86/coreboot/coreboot.c line 40
Quoted 4 lines
board/chromebook-x86/coreboot/coreboot.c new file +4
-0+int board_early_init_f (void ) +{ +return 0 ; +}
Drop empty functions.
board/chromebook-x86/coreboot/coreboot.c line 48
Quoted 5 lines
board/chromebook-x86/coreboot/coreboot.c new file +5
-0+/* CPU Speed to 100MHz */ + gd->cpu_clk =100000000 ; + +/* Crystal is 33.000MHz */ + gd->bus_clk =33000000 ;
You should use #defines for these.
Quoted 6 lines
board/chromebook-x86/coreboot/coreboot.c new file +6
-0+void show_boot_progress (int val) +{ +} + + +int last_stage_init (void )
board/chromebook-x86/coreboot/coreboot.c line 68
Quoted 10 lines
board/chromebook-x86/coreboot/coreboot.c new file +10
-0+{ +return 0 ; +} + +#ifndef CONFIG_SYS_NO_FLASH +ulong board_flash_get_legacy (ulong base,int banknum,flash_info_t *info) +{ +return 0 ; +} +#endif
Drop empty functions.
board/chromebook-x86/coreboot/coreboot.c line 77
Quoted 3 lines
board/chromebook-x86/coreboot/coreboot.c new file +3
-0+void setup_pcat_compatibility () +{ +}
Drop empty functions.
board/chromebook-x86/coreboot/coreboot_pci.c line 30
Quoted 3 lines
board/chromebook-x86/coreboot/coreboot_pci.c new file +3
-0+void pci_init_board (void ) +{ +}
Drop empty functions.
Best regards,
Wolfgang Denk
Signature · 8 lines
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