imx: a few fixes for v3.2-rc

The commit 'd880db0 arm: mx3: update defconfig' removes FEC support which is not good, since FEC is useful for both developers and users.

Signed-off-by Shawn Guo <[email protected]>

Cc Sascha Hauer <[email protected]>

---
 arch/arm/configs/mx3_defconfig |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

arch/arm/configs/mx3_defconfig +1 -0

index cb0717f..ee50a9e 100644
@@ -67,6 +67,7 @@ CONFIG_SMSC_PHY=y
 CONFIG_NET_ETHERNET=y
 CONFIG_SMSC911X=y
 CONFIG_DNET=y
+CONFIG_FEC=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV is not set

Signature · 7 lines

1.7.4.1


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The commit 'd880db0 arm: mx3: update defconfig' removes FEC support which is not good, since FEC is useful for both developers and users.

Quoted 2 lines · Shawn Guo

The commit 'd880db0 arm: mx3: update defconfig' removes FEC support which is not good, since FEC is useful for both developers and users.

$ git show d880db0^:drivers/net/Kconfig | grep -A4 'config FEC$'
config FEC
	bool "FEC ethernet controller (of ColdFire and some i.MX CPUs)"
	depends on M523x || M527x || M5272 || M528x || M520x || M532x || \
		IMX_HAVE_PLATFORM_FEC || MXS_HAVE_PLATFORM_FEC
	default IMX_HAVE_PLATFORM_FEC || MXS_HAVE_PLATFORM_FEC if ARM

So when d880db0 was created

make savedefconfig

dropped CONFIG_FEC=y justifiably. The culprit is commit

230dec6 (net/fec: add imx6q enet support)

which dropped the default line.

Quoted 15 lines · Uwe Kleine-K?nig

Quoted 2 lines · Shawn Guo

The commit 'd880db0 arm: mx3: update defconfig' removes FEC support which is not good, since FEC is useful for both developers and users.

$ git show d880db0^:drivers/net/Kconfig | grep -A4 'config FEC$'
config FEC
	bool "FEC ethernet controller (of ColdFire and some i.MX CPUs)"
	depends on M523x || M527x || M5272 || M528x || M520x || M532x || \
		IMX_HAVE_PLATFORM_FEC || MXS_HAVE_PLATFORM_FEC
	default IMX_HAVE_PLATFORM_FEC || MXS_HAVE_PLATFORM_FEC if ARM

So when d880db0 was created

make savedefconfig

Quoted 6 lines

dropped CONFIG_FEC=y justifiably. The culprit is commit

230dec6 (net/fec: add imx6q enet support)

which dropped the default line.

Thanks for letting me know that's me :)

The commit 'd880db0 arm: mx3: update defconfig' removes FEC support which is not good, since FEC is useful for both developers and users.

Signed-off-by Shawn Guo <[email protected]>

Cc Sascha Hauer <[email protected]>

---
 arch/arm/configs/mx3_defconfig |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

arch/arm/configs/mx3_defconfig +1 -0

index cb0717f..ee50a9e 100644
@@ -67,6 +67,7 @@ CONFIG_SMSC_PHY=y
 CONFIG_NET_ETHERNET=y
 CONFIG_SMSC911X=y
 CONFIG_DNET=y
+CONFIG_FEC=y
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
 # CONFIG_INPUT_MOUSEDEV is not set

Signature · 1 line

1.7.4.1

Quoted 5 lines · Shawn Guo

The commit 'd880db0 arm: mx3: update defconfig' removes FEC support which is not good, since FEC is useful for both developers and users.

Signed-off-by Shawn Guo <[email protected]>

Cc Sascha Hauer <[email protected]>

I skipped this one for now as I have hope to get the i.MX5 merge into -rc which would remove this file. If not, I'll send this one later.

The config symbol ARCH_MX3 has been removed by commit 'a89cf59 arm/imx: merge i.MX3 and i.MX6', and it should not be referenced any more.

Signed-off-by Shawn Guo <[email protected]>

Cc Vinod Koul <[email protected]>

Cc Sascha Hauer <[email protected]>

---
 arch/arm/mach-imx/Makefile.boot |   10 +++++++---
 drivers/dma/Kconfig             |    4 ++--
 2 files changed, 9 insertions(+), 5 deletions(-)

arch/arm/mach-imx/Makefile.boot +0 -3

index 22d8588..c349a96 100644
@@ -14,9 +14,13 @@ zreladdr-$(CONFIG_MACH_MX27)	+= 0xA0008000
 params_phys-$(CONFIG_MACH_MX27)	:= 0xA0000100
 initrd_phys-$(CONFIG_MACH_MX27)	:= 0xA0800000
 
-zreladdr-$(CONFIG_ARCH_MX3)	+= 0x80008000
-params_phys-$(CONFIG_ARCH_MX3)	:= 0x80000100
-initrd_phys-$(CONFIG_ARCH_MX3)	:= 0x80800000

drivers/dma/Kconfig +1 -1

index ab8f469..8f7dce1 100644
@@ -124,7 +124,7 @@ config MV_XOR
 
 config MX3_IPU
 	bool "MX3x Image Processing Unit support"
-	depends on ARCH_MX3
+	depends on SOC_IMX31 || SOC_IMX35
 	select DMA_ENGINE
 	default y
 	help

The config symbol ARCH_MX3 has been removed by commit 'a89cf59 arm/imx: merge i.MX3 and i.MX6', and it should not be referenced any more.

The patch also change ARCH_MX* to SOC_IMX* for other platforms.

Signed-off-by Shawn Guo <[email protected]>

Cc Sascha Hauer <[email protected]>

---
Changes since v1:
* Drop changes on drivers/dma/Kconfig, as Sascha alreay has a patch to fix it.

Quoted 4 lines · Shawn Guo

The config symbol ARCH_MX3 has been removed by commit 'a89cf59 arm/imx: merge i.MX3 and i.MX6', and it should not be referenced any more.

Quoted 8 lines

The patch also change ARCH_MX* to SOC_IMX* for other platforms.

Signed-off-by Shawn Guo <[email protected]>

Cc Sascha Hauer <[email protected]>

---
Changes since v1:
* Drop changes on drivers/dma/Kconfig, as Sascha alreay has a patch to fix it.

This appears to be to the patch that ended up as commit 59198b6cb2 in the mainline tree. But in mainline there are still those two references to ARCH_MX3 in drivers/dma/Kconfig. Can I ask what happened to this patch of Sascha that Shawn mentions?

On Mon, Nov 21, 2011 at 02:47:49PM +0100, Paul Bolle wrote:
Can I ask what happened to this

Quoted 1 line

patch of Sascha that Shawn mentions?

I just resent this.

The following error is seen in some case when mounting rootfs from SD/MMC cards.

Waiting for root device /dev/mmcblk0p1...
mmc1: host does not support reading read-only switch. assuming write-enable.
mmc1: new high speed SDHC card at address b368
mmcblk0: mmc1:b368 SDC 3.74 GiB
mmcblk0: p1
mmc1: Timeout waiting for hardware interrupt.
mmcblk0: error -110 transferring data, sector 3678224, nr 40, cmd response 0x900, card status 0xc00
end_request: I/O error, dev mmcblk0, sector 3678225
Buffer I/O error on device mmcblk0p1, logical block 458754
lost page write due to I/O error on mmcblk0p1

This patch fixes the problem by lowering the usdhc clock and correcting watermark configuration.

Signed-off-by Shawn Guo <[email protected]>

Cc Chris Ball <[email protected]>

Cc Sascha Hauer <[email protected]>

---
 arch/arm/mach-imx/clock-imx6q.c    |   17 ++++++++++++++++-
 drivers/mmc/host/sdhci-esdhc-imx.c |    8 ++++++++
 2 files changed, 24 insertions(+), 1 deletions(-)

arch/arm/mach-imx/clock-imx6q.c +16 -1

index e0b926d..613a1b9 100644
@@ -1139,7 +1139,7 @@ static int _clk_set_rate(struct clk *clk, unsigned long rate)
 		return -EINVAL;
 
 	max_div = ((d->bm_pred >> d->bp_pred) + 1) *
-		  ((d->bm_pred >> d->bp_pred) + 1);
+		  ((d->bm_podf >> d->bp_podf) + 1);
 
 	div = parent_rate / rate;
 	if (div == 0)

@@ -2002,6 +2002,21 @@ int __init mx6q_clocks_init(void)
 	clk_set_rate(&asrc_serial_clk, 1500000);
 	clk_set_rate(&enfc_clk, 11000000);
 
+	/*
+	 * Before pinctrl API is available, we have to rely on the pad
+	 * configuration set up by bootloader.  For usdhc example here,
+	 * u-boot sets up the pads for 49.5 MHz case, and we have to lower
+	 * the usdhc clock from 198 to 49.5 MHz to match the pad configuration.
+	 *
+	 * FIXME: This is should be removed after pinctrl API is available.
+	 * At that time, usdhc driver can call pinctrl API to change pad
+	 * configuration dynamically per different usdhc clock settings.
+	 */
+	clk_set_rate(&usdhc1_clk, 49500000);
+	clk_set_rate(&usdhc2_clk, 49500000);
+	clk_set_rate(&usdhc3_clk, 49500000);
+	clk_set_rate(&usdhc4_clk, 49500000);
+
 	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
 	base = of_iomap(np, 0);
 	WARN_ON(!base);

drivers/mmc/host/sdhci-esdhc-imx.c +8 -0

index ae57769..4b976f0 100644
@@ -32,6 +32,7 @@
 /* VENDOR SPEC register */
 #define SDHCI_VENDOR_SPEC		0xC0
 #define  SDHCI_VENDOR_SPEC_SDIO_QUIRK	0x00000002
+#define SDHCI_WTMK_LVL			0x44
 #define SDHCI_MIX_CTRL			0x48
 
 /*

@@ -476,6 +477,13 @@ static int __devinit sdhci_esdhc_imx_probe(struct platform_device *pdev)
 	if (is_imx53_esdhc(imx_data))
 		imx_data->flags |= ESDHC_FLAG_MULTIBLK_NO_INT;
 
+	/*
+	 * The imx6q ROM code will change the default watermark level setting
+	 * to something insane.  Change it back here.
+	 */
+	if (is_imx6q_usdhc(imx_data))
+		writel(0x08100810, host->ioaddr + SDHCI_WTMK_LVL);
+
 	boarddata = &imx_data->boarddata;
 	if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) {
 		if (!host->mmc->parent->platform_data) {

The following error is seen in some case when mounting rootfs from SD/MMC cards.

?Waiting for root device /dev/mmcblk0p1...
?mmc1: host does not support reading read-only switch. assuming write-enable.
?mmc1: new high speed SDHC card at address b368
?mmcblk0: mmc1:b368 SDC ? 3.74 GiB
? mmcblk0: p1
?mmc1: Timeout waiting for hardware interrupt.
?mmcblk0: error -110 transferring data, sector 3678224, nr 40, cmd response 0x900, card status 0xc00 ?end_request: I/O error, dev mmcblk0, sector 3678225
?Buffer I/O error on device mmcblk0p1, logical block 458754
?lost page write due to I/O error on mmcblk0p1

This patch fixes the problem by lowering the usdhc clock and correcting watermark configuration.

Signed-off-by Shawn Guo <[email protected]>

Cc Chris Ball <[email protected]>

Cc Sascha Hauer <[email protected]>

---
?arch/arm/mach-imx/clock-imx6q.c ? ?| ? 17 ++++++++++++++++- ?drivers/mmc/host/sdhci-esdhc-imx.c | ? ?8 ++++++++ ?2 files changed, 24 insertions(+), 1 deletions(-)

arch/arm/mach-imx/clock-imx6q.c +0 -0

index e0b926d..613a1b9 100644
@@ -1139,7 +1139,7 @@ static int _clk_set_rate(struct clk *clk, unsigned long rate)
 ? ? ? ? ? ? ? ?return -EINVAL;
 

? ? ? ?max_div = ((d->bm_pred >> d->bp_pred) + 1) *
- ? ? ? ? ? ? ? ? ((d->bm_pred >> d->bp_pred) + 1);
+ ? ? ? ? ? ? ? ? ((d->bm_podf >> d->bp_podf) + 1);

? ? ? ?div = parent_rate / rate;
? ? ? ?if (div == 0)

arch/arm/mach-imx/clock-imx6q.c +0 -1

--

1.7.4.1

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2011/11/10 Shawn Guo <[email protected]>:

Quoted 42 lines

The following error is seen in some case when mounting rootfs from SD/MMC cards.

?Waiting for root device /dev/mmcblk0p1...
?mmc1: host does not support reading read-only switch. assuming write-enable.
?mmc1: new high speed SDHC card at address b368
?mmcblk0: mmc1:b368 SDC ? 3.74 GiB
? mmcblk0: p1
?mmc1: Timeout waiting for hardware interrupt.
?mmcblk0: error -110 transferring data, sector 3678224, nr 40, cmd response 0x900, card status 0xc00 ?end_request: I/O error, dev mmcblk0, sector 3678225
?Buffer I/O error on device mmcblk0p1, logical block 458754
?lost page write due to I/O error on mmcblk0p1

This patch fixes the problem by lowering the usdhc clock and correcting watermark configuration.

Signed-off-by Shawn Guo <[email protected]>

Cc Chris Ball <[email protected]>

Cc Sascha Hauer <[email protected]>

---
?arch/arm/mach-imx/clock-imx6q.c ? ?| ? 17 ++++++++++++++++- ?drivers/mmc/host/sdhci-esdhc-imx.c | ? ?8 ++++++++ ?2 files changed, 24 insertions(+), 1 deletions(-)

arch/arm/mach-imx/clock-imx6q.c +0 -0

index e0b926d..613a1b9 100644
@@ -1139,7 +1139,7 @@ static int _clk_set_rate(struct clk *clk, unsigned long rate)
 ? ? ? ? ? ? ? ?return -EINVAL;
 

? ? ? ?max_div = ((d->bm_pred >> d->bp_pred) + 1) *
- ? ? ? ? ? ? ? ? ((d->bm_pred >> d->bp_pred) + 1);
+ ? ? ? ? ? ? ? ? ((d->bm_podf >> d->bp_podf) + 1);

? ? ? ?div = parent_rate / rate;
? ? ? ?if (div == 0)

arch/arm/mach-imx/clock-imx6q.c +0 -0

@@ -2002,6 +2002,21 @@ int __init mx6q_clocks_init(void)
 ? ? ? ?clk_set_rate(&asrc_serial_clk, 1500000);
 ? ? ? ?clk_set_rate(&enfc_clk, 11000000);
 

arch/arm/mach-imx/clock-imx6q.c int __init mx6q_clocks_init(void) · line 2009

Quoted 5 lines

arch/arm/mach-imx/clock-imx6q.c +5 -0

+ ? ? ? /*
+ ? ? ? ?* Before pinctrl API is available, we have to rely on the pad
+ ? ? ? ?* configuration set up by bootloader. ?For usdhc example here,
+ ? ? ? ?* u-boot sets up the pads for 49.5 MHz case, and we have to lower
+ ? ? ? ?* the usdhc clock from 198 to 49.5 MHz to match the pad configuration.

The comments above is wrong. The pad configuration don't have the relationship with the clock freq 49.5MHZ. I'm not sure you mean pinctrl API can resolve the clock
configuration, do you mean common clock API?

Quoted 10 lines

arch/arm/mach-imx/clock-imx6q.c +10 -0

+ ? ? ? ?*
+ ? ? ? ?* FIXME: This is should be removed after pinctrl API is available.
+ ? ? ? ?* At that time, usdhc driver can call pinctrl API to change pad
+ ? ? ? ?* configuration dynamically per different usdhc clock settings.
+ ? ? ? ?*/
+ ? ? ? clk_set_rate(&usdhc1_clk, 49500000);
+ ? ? ? clk_set_rate(&usdhc2_clk, 49500000);
+ ? ? ? clk_set_rate(&usdhc3_clk, 49500000);
+ ? ? ? clk_set_rate(&usdhc4_clk, 49500000);
+