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CPCI750: Do not enable data cache in start.S

PATCH New Reinhard Arlt 2 participants 2 messages Nov 18, 2011 – Dec 5, 2011 PowerPC

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PATCH 1/1 CPCI750: Do not enable data cache in start.S

From: Reinhard Arlt <[email protected]>

Do not enable the data cache in start.S, the decrementer do not work.

--

arch/powerpc/cpu/74xx_7xx/start.S +2 -1
index 75fb773..131fc14 100644
@@ -247,11 +247,12 @@ in_flash:
 	/* enable address translation */
 	bl	enable_addr_trans
 	sync
-
+#if !defined(CONFIG_CPCI750)
 	/* enable and invalidate the data cache */
 	bl	l1dcache_enable
 	sync
 #endif
+#endif
 #ifdef CONFIG_SYS_INIT_RAM_LOCK
 	bl	lock_ram_in_cache
 	sync
#1 lore raw

PATCH 1/1 CPCI750: Do not enable data cache in start.S

Dear Reinhard Arlt,

Quoted 16 lines · In message <[email protected]> you wrote:

From: Reinhard Arlt <[email protected]>

Do not enable the data cache in start.S, the decrementer do not work.

--

arch/powerpc/cpu/74xx_7xx/start.S +0 -0
index 75fb773..131fc14 100644
@@ -247,11 +247,12 @@ in_flash:
 	/* enable address translation */
 	bl	enable_addr_trans
 	sync

arch/powerpc/cpu/74xx_7xx/start.S in_flash: · line 258

Quoted 10 lines
arch/powerpc/cpu/74xx_7xx/start.S +2 -1
-
+#if !defined(CONFIG_CPCI750)
 	/* enable and invalidate the data cache */
 	bl	l1dcache_enable
 	sync
 #endif
+#endif
 #ifdef CONFIG_SYS_INIT_RAM_LOCK
 	bl	lock_ram_in_cache
 	sync

Sorry, but I don't want to have board specific code in arch/powerpc/cpu/74xx_7xx/start.S

Please turn this into a feature dependent define, if it is really needed.

Also, can you provide a rational explanation how the decrementer depends on data cache being enabled? This sounds pretty strange to me.

Best regards,

Wolfgang Denk

Signature · 6 lines
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