x86: Initial commit for running as a coreboot payload
PATCH v5 1/1 x86: Initial commit for running as a coreboot payload
Add a target for running u-boot as a coreboot payload in boards.cfg, a board, CPU and a config. This is a skeleton implementation which always reports the size of memory as 64 MB.
Signed-off-by Gabe Black <[email protected]>
---
Changes in v5:
Merge several smaller commits into this single commit.
arch/x86/cpu/coreboot/Makefile | 55 ++++++ arch/x86/cpu/coreboot/asm-offsets.c | 25 +++ arch/x86/cpu/coreboot/coreboot_car.S | 29 +++ arch/x86/cpu/coreboot/sdram.c | 39 ++++ board/chromebook-x86/coreboot/Makefile | 53 +++++ board/chromebook-x86/coreboot/coreboot.c | 77 ++++++++ board/chromebook-x86/coreboot/coreboot_pci.c | 30 +++ board/chromebook-x86/coreboot/coreboot_start.S | 29 +++ board/chromebook-x86/coreboot/coreboot_start16.S | 46 +++++ boards.cfg | 1 + include/configs/coreboot.h | 225 ++++++++++++++++++++++ include/serial.h | 2 +- 12 files changed, 610 insertions(+), 1 deletions(-) create mode 100644 arch/x86/cpu/coreboot/Makefile create mode 100644 arch/x86/cpu/coreboot/asm-offsets.c create mode 100644 arch/x86/cpu/coreboot/coreboot_car.S create mode 100644 arch/x86/cpu/coreboot/sdram.c create mode 100644 board/chromebook-x86/coreboot/Makefile create mode 100644 board/chromebook-x86/coreboot/coreboot.c create mode 100644 board/chromebook-x86/coreboot/coreboot_pci.c create mode 100644 board/chromebook-x86/coreboot/coreboot_start.S create mode 100644 board/chromebook-x86/coreboot/coreboot_start16.S create mode 100644 include/configs/coreboot.h
arch/x86/cpu/coreboot/Makefile new file +55 -0
@@ -0,0 +1,55 @@ +# +# Copyright (c) 2011 The Chromium OS Authors. +# +# (C) Copyright 2008 +# Graeme Russ, graeme.russ at gmail.com. +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd at denx.de. +# +# (C) Copyright 2002 +# Daniel Engstr?m, Omicron Ceti AB, daniel at omicron.se. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(SOC).o + +COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o + +SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +#########################################################################
arch/x86/cpu/coreboot/asm-offsets.c new file +25 -0
@@ -0,0 +1,25 @@ +/* +* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c +* +* This program is used to generate definitions needed by +* assembly language modules. +* +* We use the technique used in the OSF Mach kernel code: +* generate asm statements containing #defines, +* compile this file to assembler, and then extract the +* #defines from the assembly-language output. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License +* as published by the Free Software Foundation; either version +* 2 of the License, or (at your option) any later version. +*/ + +#include <common.h> +#include <linux/kbuild.h> + +int main (void ) +{ +DEFINE (GENERATED_GD_RELOC_OFF , offsetof(gd_t , reloc_off)); +return 0 ; +}
arch/x86/cpu/coreboot/coreboot_car.S new file +29 -0
@@ -0,0 +1,29 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2010-2011 + * Graeme Russ, <[email protected]> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +.section .text + +.globl car_init +car_init: + jmp car_init_ret
arch/x86/cpu/coreboot/sdram.c new file +39 -0
@@ -0,0 +1,39 @@ +/* +* Copyright (c) 2011 The Chromium OS Authors. +* (C) Copyright 2010,2011 +* Graeme Russ, <[email protected]> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but without any warranty; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + +#include <common.h> +#include <asm/u-boot-x86.h> + +DECLARE_GLOBAL_DATA_PTR ; + +int dram_init_f (void ) +{ + gd->ram_size =64 *1024 *1024 ; +return 0 ; +} + +int dram_init (void ) +{ +return 0 ; +}
board/chromebook-x86/coreboot/Makefile new file +53 -0
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board/chromebook-x86/coreboot/coreboot.c new file +77 -0
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board/chromebook-x86/coreboot/coreboot_pci.c new file +30 -0
@@ -0,0 +1,30 @@ +/* +* Copyright (c) 2011 The Chromium OS Authors. +* (C) Copyright 2008,2009 +* Graeme Russ, <[email protected]> +* +* (C) Copyright 2002 +* Daniel Engstr?m, Omicron Ceti AB, <[email protected]> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + +void pci_init_board (void ) +{ +}
board/chromebook-x86/coreboot/coreboot_start.S new file +29 -0
@@ -0,0 +1,29 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2008 + * Graeme Russ, graeme.russ at gmail.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* board early intialization */ +.globl early_board_init +early_board_init: + /* No 32-bit board specific initialisation */ + jmp early_board_init_ret
board/chromebook-x86/coreboot/coreboot_start16.S new file +46 -0
46 lines not on this page · raw message
boards.cfg +1 -0
@@ -272,6 +272,7 @@ tcm-bf518 blackfin blackfin tcm-bf537 blackfin blackfin eNET x86 x86 eNET - sc520 eNET:SYS_TEXT_BASE=0x38040000 eNET_SRAM x86 x86 eNET - sc520 eNET:SYS_TEXT_BASE=0x19000000 +coreboot-x86 x86 x86 coreboot chromebook-x86 coreboot coreboot:SYS_TEXT_BASE=0xFC0000 sandbox sandbox sandbox sandbox sandbox - cobra5272 m68k mcf52x2 cobra5272 - idmr m68k mcf52x2
include/configs/coreboot.h new file +225 -0
225 lines not on this page · raw message
include/serial.h +1 -1
@@ -31,7 +31,7 @@ extern struct serial_device * default_serial_console (void);defined (CONFIG_MB86R0x) ||defined (CONFIG_MPC5xxx) || \defined (CONFIG_MPC83xx) ||defined (CONFIG_MPC85xx) || \defined (CONFIG_MPC86xx) ||defined (CONFIG_SYS_SC520 ) || \ - defined(CONFIG_TEGRA2) + defined(CONFIG_TEGRA2) || defined(CONFIG_SYS_COREBOOT)extern struct serial_device serial0_device;extern struct serial_device serial1_device;#if defined(CONFIG_SYS_NS16550_SERIAL )
Signature · 1 line
1.7.3.1
PATCH v6 1/1 x86: Initial commit for running as a coreboot payload
Add a target for running u-boot as a coreboot payload in boards.cfg, a board, CPU and a config. This is a skeleton implementation which always reports the size of memory as 64 MB.
Signed-off-by Gabe Black <[email protected]>
---
Changes in v5:
Merge several smaller commits into this single commit.
Changes in v6:
Merge in a fix for the IDE configuration.
arch/x86/cpu/coreboot/Makefile | 55 ++++++ arch/x86/cpu/coreboot/asm-offsets.c | 25 +++ arch/x86/cpu/coreboot/coreboot_car.S | 29 +++ arch/x86/cpu/coreboot/sdram.c | 39 ++++ board/chromebook-x86/coreboot/Makefile | 53 +++++ board/chromebook-x86/coreboot/coreboot.c | 77 ++++++++ board/chromebook-x86/coreboot/coreboot_pci.c | 30 +++ board/chromebook-x86/coreboot/coreboot_start.S | 29 +++ board/chromebook-x86/coreboot/coreboot_start16.S | 46 +++++ boards.cfg | 1 + include/configs/coreboot.h | 225 ++++++++++++++++++++++ include/serial.h | 2 +- 12 files changed, 610 insertions(+), 1 deletions(-) create mode 100644 arch/x86/cpu/coreboot/Makefile create mode 100644 arch/x86/cpu/coreboot/asm-offsets.c create mode 100644 arch/x86/cpu/coreboot/coreboot_car.S create mode 100644 arch/x86/cpu/coreboot/sdram.c create mode 100644 board/chromebook-x86/coreboot/Makefile create mode 100644 board/chromebook-x86/coreboot/coreboot.c create mode 100644 board/chromebook-x86/coreboot/coreboot_pci.c create mode 100644 board/chromebook-x86/coreboot/coreboot_start.S create mode 100644 board/chromebook-x86/coreboot/coreboot_start16.S create mode 100644 include/configs/coreboot.h
arch/x86/cpu/coreboot/Makefile new file +55 -0
@@ -0,0 +1,55 @@ +# +# Copyright (c) 2011 The Chromium OS Authors. +# +# (C) Copyright 2008 +# Graeme Russ, graeme.russ at gmail.com. +# +# (C) Copyright 2006 +# Wolfgang Denk, DENX Software Engineering, wd at denx.de. +# +# (C) Copyright 2002 +# Daniel Engstr?m, Omicron Ceti AB, daniel at omicron.se. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)lib$(SOC).o + +COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o + +SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +#########################################################################
arch/x86/cpu/coreboot/asm-offsets.c new file +25 -0
@@ -0,0 +1,25 @@ +/* +* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c +* +* This program is used to generate definitions needed by +* assembly language modules. +* +* We use the technique used in the OSF Mach kernel code: +* generate asm statements containing #defines, +* compile this file to assembler, and then extract the +* #defines from the assembly-language output. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License +* as published by the Free Software Foundation; either version +* 2 of the License, or (at your option) any later version. +*/ + +#include <common.h> +#include <linux/kbuild.h> + +int main (void ) +{ +DEFINE (GENERATED_GD_RELOC_OFF , offsetof(gd_t , reloc_off)); +return 0 ; +}
arch/x86/cpu/coreboot/coreboot_car.S new file +29 -0
@@ -0,0 +1,29 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2010-2011 + * Graeme Russ, <[email protected]> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +.section .text + +.globl car_init +car_init: + jmp car_init_ret
arch/x86/cpu/coreboot/sdram.c new file +39 -0
@@ -0,0 +1,39 @@ +/* +* Copyright (c) 2011 The Chromium OS Authors. +* (C) Copyright 2010,2011 +* Graeme Russ, <[email protected]> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but without any warranty; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + +#include <common.h> +#include <asm/u-boot-x86.h> + +DECLARE_GLOBAL_DATA_PTR ; + +int dram_init_f (void ) +{ + gd->ram_size =64 *1024 *1024 ; +return 0 ; +} + +int dram_init (void ) +{ +return 0 ; +}
board/chromebook-x86/coreboot/Makefile new file +53 -0
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board/chromebook-x86/coreboot/coreboot.c new file +77 -0
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board/chromebook-x86/coreboot/coreboot_pci.c new file +30 -0
@@ -0,0 +1,30 @@ +/* +* Copyright (c) 2011 The Chromium OS Authors. +* (C) Copyright 2008,2009 +* Graeme Russ, <[email protected]> +* +* (C) Copyright 2002 +* Daniel Engstr?m, Omicron Ceti AB, <[email protected]> +* +* See file CREDITS for list of people who contributed to this +* project. +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License as +* published by the Free Software Foundation; either version 2 of +* the License, or (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, +* MA 02111-1307 USA +*/ + +void pci_init_board (void ) +{ +}
board/chromebook-x86/coreboot/coreboot_start.S new file +29 -0
@@ -0,0 +1,29 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2008 + * Graeme Russ, graeme.russ at gmail.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* board early intialization */ +.globl early_board_init +early_board_init: + /* No 32-bit board specific initialisation */ + jmp early_board_init_ret
board/chromebook-x86/coreboot/coreboot_start16.S new file +46 -0
46 lines not on this page · raw message
boards.cfg +1 -0
@@ -272,6 +272,7 @@ tcm-bf518 blackfin blackfin tcm-bf537 blackfin blackfin eNET x86 x86 eNET - sc520 eNET:SYS_TEXT_BASE=0x38040000 eNET_SRAM x86 x86 eNET - sc520 eNET:SYS_TEXT_BASE=0x19000000 +coreboot-x86 x86 x86 coreboot chromebook-x86 coreboot coreboot:SYS_TEXT_BASE=0xFC0000 sandbox sandbox sandbox sandbox sandbox - cobra5272 m68k mcf52x2 cobra5272 - idmr m68k mcf52x2
include/configs/coreboot.h new file +225 -0
225 lines not on this page · raw message
include/serial.h +1 -1
@@ -31,7 +31,7 @@ extern struct serial_device * default_serial_console (void);defined (CONFIG_MB86R0x) ||defined (CONFIG_MPC5xxx) || \defined (CONFIG_MPC83xx) ||defined (CONFIG_MPC85xx) || \defined (CONFIG_MPC86xx) ||defined (CONFIG_SYS_SC520 ) || \ - defined(CONFIG_TEGRA2) + defined(CONFIG_TEGRA2) || defined(CONFIG_SYS_COREBOOT)extern struct serial_device serial0_device;extern struct serial_device serial1_device;#if defined(CONFIG_SYS_NS16550_SERIAL )
Signature · 1 line
1.7.3.1
PATCH v6 1/1 x86: Initial commit for running as a coreboot payload
Hi Gabe,
Quoted 27 lines · Gabe Black
Add a target for running u-boot as a coreboot payload in boards.cfg, a board, CPU and a config. This is a skeleton implementation which always reports the size of memory as 64 MB.
Signed-off-by Gabe Black <[email protected]>---
Changes in v5:
Merge several smaller commits into this single commit.Changes in v6:
Merge in a fix for the IDE configuration.arch/x86/cpu/coreboot/Makefile | 55 ++++++ arch/x86/cpu/coreboot/asm-offsets.c | 25 +++ arch/x86/cpu/coreboot/coreboot_car.S | 29 +++ arch/x86/cpu/coreboot/sdram.c | 39 ++++ board/chromebook-x86/coreboot/Makefile | 53 +++++ board/chromebook-x86/coreboot/coreboot.c | 77 ++++++++ board/chromebook-x86/coreboot/coreboot_pci.c | 30 +++ board/chromebook-x86/coreboot/coreboot_start.S | 29 +++ board/chromebook-x86/coreboot/coreboot_start16.S | 46 +++++ boards.cfg | 1 + include/configs/coreboot.h | 225 ++++++++++++++++++++++ include/serial.h | 2 +- 12 files changed, 610 insertions(+), 1 deletions(-) create mode 100644 arch/x86/cpu/coreboot/Makefile create mode 100644 arch/x86/cpu/coreboot/asm-offsets.c
Quoted 8 lines
create mode 100644 arch/x86/cpu/coreboot/coreboot_car.S create mode 100644 arch/x86/cpu/coreboot/sdram.c create mode 100644 board/chromebook-x86/coreboot/Makefile create mode 100644 board/chromebook-x86/coreboot/coreboot.c create mode 100644 board/chromebook-x86/coreboot/coreboot_pci.c create mode 100644 board/chromebook-x86/coreboot/coreboot_start.S create mode 100644 board/chromebook-x86/coreboot/coreboot_start16.S create mode 100644 include/configs/coreboot.h
Applied to u-boot-x86/next
Sorry for the long delay
Regards,
Graeme