pci: Add quirk for still enabled interrupts on Intel Sandy Bridge GPUs

Some BIOS implementations leave the Intel GPU interrupts enabled, even though no one is handling them (f.e. i915 driver is never loaded). Additionally the interrupt destination is not set up properly and the interrupt ends up -somewhere-.

These spurious interrupts are "sticky" and the kernel disables the (shared) interrupt line after 100.000+ generated interrupts.

Fix it by disabling the still enabled interrupts. This resolves crashes often seen on monitor unplug.

Tested on the following boards:
- Intel DH61CR: Affected
- Intel DH67BL: Affected
- Intel S1200KP server board: Affected
- Asus P8H61-M LE: Affected, but system does not crash. Probably the IRQ ends up somewhere unnoticed.

According to reports on the net, the Intel DH61WW board is also affected.

Many thanks to Jesse Barnes from Intel for helping with the register configuration and to Intel in general for providing public hardware documentation.

---

Please CC: comments.

 drivers/pci/quirks.c |   34 ++++++++++++++++++++++++++++++++++
 1 files changed, 34 insertions(+), 0 deletions(-)

index 6476547..78fda9c 100644
@@ -2906,6 +2906,40 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f8, quirk_intel_mc_errata);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
 
+/*
+ * Some BIOS implementations leave the Intel GPU interrupts enabled,
+ * even though no one is handling them (f.e. i915 driver is never loaded).
+ * Additionally the interrupt destination is not set up properly
+ * and the interrupt ends up -somewhere-.
+ *
+ * These spurious interrupts are "sticky" and the kernel disables
+ * the (shared) interrupt line after 100.000+ generated interrupts.
+ *
+ * Fix it by disabling the still enabled interrupts.
+ * This resolves crashes often seen on monitor unplug.
+ */
+#define I915_DEIER_REG 0x4400c
+static void __devinit disable_igfx_irq(struct pci_dev *dev)
+{
+	void __iomem *regs = pci_iomap(dev, 0, 0);
+	if (regs == NULL) {
+		dev_warn(&dev->dev, "igfx quirk: Can't iomap PCI device\n");
+		return;
+	}
+
+	/* Check if any interrupt line is still enabled */
+	if (readl(regs + I915_DEIER_REG) != 0) {
+		dev_warn(&dev->dev, "BIOS left Intel GPU interrupts enabled; "
+			"disabling\n");
+
+		writel(0, regs + I915_DEIER_REG);
+	}
+
+	pci_iounmap(dev, regs);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0102, disable_igfx_irq);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
+
 static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f,
 			  struct pci_fixup *end)
 {

1.7.4.4

Hi Jesse,

Thanks for your review.

I prefer dev_warn() or dev_info() for two reasons:

1. This is new code. If a system crashes in the unlikely event because of this change, the user will have a better chance to see the message before we tweak around the registers.

2. All other quirks either use dev_warn() (like the Intel e100 quirk which is similar to this fix, see quirk_e100_interrupt()) or dev_info().

If there is something wrong and we activate a workaround, let the user know about it, at least for now.

User impact is minimal and users with graphical boot up don't see kernel messages anyway.

Can you go into more detail why we need this?

Looking at the logic diagram at page 23 of this document
http://intellinuxgraphics.org/documentation/SNB/IHD_OS_Vol3_Part2.pdf

tells me we don't necessarily need this, no interrupt should slip through.

Also the i915 driver first disables IER and then clears IIR in drivers/gpu/drm/i915/i915_irq.c: ivybridge_irq_handler() or ironlake_irq_handler(). So it always initializes the GPU to a sane state before enabling the interrupts.

Thanks,
Thomas

Happy new year 2012!

Any news on the status of this patch?

Cheers,
Thomas

Did you get my last reply:

Could really be dev_dbg, I think this will be fairly common. I think we also need to ack any outstanding interrupts after disabling them in IER by writing IIR back on itself. Can you test that?

Other than that I'd like to apply it.

Thanks,

Jesse Barnes, Intel Open Source Technology Center

Hi Jesse,

Yes, I also replied to it. Here's my reply in the archives in case it got lost somehow:

https://lkml.org/lkml/2011/12/8/66

Best regards,
Thomas

Applied to my -next branch finally (sorry I missed your last reply), thanks Thomas.

Jesse Barnes, Intel Open Source Technology Center

Just a small heads up: Boards with the new Intel Ivy bridge chipset are affected, too. Currently known to be affected is

Intel Desktop Board DH77EB

Would be nice if Intel fixes the shared BIOS code...

Thanks to Drew Weaver for reporting the issue. I currently don't have time to prepare another quirk.

Best regards
Thomas Jarosch

Yeah it is very unfortunate that this hasn't been fixed in the BIOS.

-----Original Message-----
From: Thomas Jarosch [mailto:[email protected]]
Sent: Wednesday, April 25, 2012 11:22 AM
To: [email protected]
Cc: Jesse Barnes; [email protected]; Drew Weaver; Charlie Suffin
Subject: Re: [PATCH] pci: Add quirk for still enabled interrupts on Intel Sandy Bridge GPUs

Just a small heads up: Boards with the new Intel Ivy bridge chipset are affected, too. Currently known to be affected is

Intel Desktop Board DH77EB

Would be nice if Intel fixes the shared BIOS code...

Thanks to Drew Weaver for reporting the issue. I currently don't have time to prepare another quirk.

Best regards
Thomas Jarosch