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arm/imx6: add imx6q sabrelite board and imx6q cpufreq support

PATCH New Richard Zhao 7 participants 35 messages Dec 12, 2011 – Dec 13, 2011

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#0 lore raw

cover arm/imx6: add imx6q sabrelite board and imx6q cpufreq support

- add imx6q sabrelite board support
- add imx6q cpufreq support

Thanks
Richard

#1 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

---
 arch/arm/boot/dts/imx6q-sabrelite.dts |   54 +++++++++++++++++++++++++++++++++
 arch/arm/mach-imx/mach-imx6q.c        |    1 +
 2 files changed, 55 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6q-sabrelite.dts
arch/arm/boot/dts/imx6q-sabrelite.dts new file +54 -0
new file mode 100644
index 0000000..d54363f
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx6q.dtsi"
+
+/ {
+	model = "Freescale i.MX6 Quad SABRE Lite Board";
+	compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
+
+	chosen {
+		bootargs = "console=ttymxc1,115200";
+	};
+
+	memory {
+		reg = <0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];
+				phy-reset-gpios = <&gpio2 23 0>; /* gpio3 23 */
+				status = "okay";
+			};
+
+			usdhc at 02198000 { /* uSDHC3 */
+				cd-gpios = <&gpio6 0 0>; /* GPIO7_0 */
+				wp-gpios = <&gpio6 1 0>; /* GPIO7_1 */
+				status = "okay";
+			};
+
+			usdhc at 0219c000 { /* uSDHC4 */
+				cd-gpios = <&gpio1 6 0>; /* GPIO2_6 */
+				wp-gpios = <&gpio1 7 0>; /* GPIO2_7 */
+				status = "okay";
+			};
+
+			uart1: uart at 021e8000 { /* UART2 */
+				status = "okay";
+			};
+		};
+	};
+};
arch/arm/mach-imx/mach-imx6q.c +1 -0
index 8deb012..d24d6c4 100644
@@ -73,6 +73,7 @@ static struct sys_timer imx6q_timer = {
 
 static const char *imx6q_dt_compat[] __initdata = {
 	"fsl,imx6q-sabreauto",
+	"fsl,imx6q-sabrelite",
 	NULL,
 };
 
Signature · 1 line
1.7.5.4
#2 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 26 lines · Richard Zhao
---
 arch/arm/boot/dts/imx6q-sabrelite.dts |   54 +++++++++++++++++++++++++++++++++
 arch/arm/mach-imx/mach-imx6q.c        |    1 +
 2 files changed, 55 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6q-sabrelite.dts
arch/arm/boot/dts/imx6q-sabrelite.dts new file +13 -0
new file mode 100644
index 0000000..d54363f
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;

arch/arm/boot/dts/imx6q-sabrelite.dts line 23

Quoted 10 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +10 -0
+/include/ "imx6q.dtsi"
+
+/ {
+	model = "Freescale i.MX6 Quad SABRE Lite Board";
+	compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
+
+	chosen {
+		bootargs = "console=ttymxc1,115200";
+	};
+

Maybe we can start dropping this, since kernel is now able to get bootargs from atags even in case that bootloader can not pass dtb and the dtb is appended to kernel image.

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 9 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg = <0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

arch/arm/boot/dts/imx6q-sabrelite.dts line 33

Quoted 1 line
arch/arm/boot/dts/imx6q-sabrelite.dts new file +1 -0
+				phy-reset-gpios = <&gpio2 23 0>; /* gpio3 23 */

Nit: If you want to comment it, please comment it in the consistent way, which is '/* GPIO3_23 */'.

Regards,
Shawn

Quoted 35 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +21 -0
+				status = "okay";
+			};
+
+			usdhc at 02198000 { /* uSDHC3 */
+				cd-gpios = <&gpio6 0 0>; /* GPIO7_0 */
+				wp-gpios = <&gpio6 1 0>; /* GPIO7_1 */
+				status = "okay";
+			};
+
+			usdhc at 0219c000 { /* uSDHC4 */
+				cd-gpios = <&gpio1 6 0>; /* GPIO2_6 */
+				wp-gpios = <&gpio1 7 0>; /* GPIO2_7 */
+				status = "okay";
+			};
+
+			uart1: uart at 021e8000 { /* UART2 */
+				status = "okay";
+			};
+		};
+	};
+};
arch/arm/mach-imx/mach-imx6q.c +1 -0
index 8deb012..d24d6c4 100644
@@ -73,6 +73,7 @@ static struct sys_timer imx6q_timer = {
 
 static const char *imx6q_dt_compat[] __initdata = {
 	"fsl,imx6q-sabreauto",
+	"fsl,imx6q-sabrelite",
 	NULL,
 };
 
Signature · 1 line
1.7.5.4
#3 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 32 lines · Shawn Guo
Quoted 31 lines · Richard Zhao
---
 arch/arm/boot/dts/imx6q-sabrelite.dts |   54 +++++++++++++++++++++++++++++++++
 arch/arm/mach-imx/mach-imx6q.c        |    1 +
 2 files changed, 55 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6q-sabrelite.dts
arch/arm/boot/dts/imx6q-sabrelite.dts new file +18 -0
new file mode 100644
index 0000000..d54363f
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx6q.dtsi"
+
+/ {
+	model = "Freescale i.MX6 Quad SABRE Lite Board";
+	compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
Quoted 8 lines

arch/arm/boot/dts/imx6q-sabrelite.dts line 23

Quoted 5 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +5 -0
+
+	chosen {
+		bootargs = "console=ttymxc1,115200";
+	};
+

Maybe we can start dropping this, since kernel is now able to get bootargs from atags even in case that bootloader can not pass dtb and the dtb is appended to kernel image.

kernel has a config "Extend bootloader kernel arguments". Does it help such case?

Quoted 13 lines

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 10 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg = <0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

No.

Quoted 5 lines

arch/arm/boot/dts/imx6q-sabrelite.dts line 33

Quoted 2 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +1 -0
+				phy-reset-gpios = <&gpio2 23 0>; /* gpio3 23 */

Nit: If you want to comment it, please comment it in the consistent way, which is '/* GPIO3_23 */'.

good catch.

Thanks
Richard

Quoted 46 lines

Regards,
Shawn

Quoted 35 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +21 -0
+				status = "okay";
+			};
+
+			usdhc at 02198000 { /* uSDHC3 */
+				cd-gpios = <&gpio6 0 0>; /* GPIO7_0 */
+				wp-gpios = <&gpio6 1 0>; /* GPIO7_1 */
+				status = "okay";
+			};
+
+			usdhc at 0219c000 { /* uSDHC4 */
+				cd-gpios = <&gpio1 6 0>; /* GPIO2_6 */
+				wp-gpios = <&gpio1 7 0>; /* GPIO2_7 */
+				status = "okay";
+			};
+
+			uart1: uart at 021e8000 { /* UART2 */
+				status = "okay";
+			};
+		};
+	};
+};
arch/arm/mach-imx/mach-imx6q.c +1 -0
index 8deb012..d24d6c4 100644
@@ -73,6 +73,7 @@ static struct sys_timer imx6q_timer = {
 
 static const char *imx6q_dt_compat[] __initdata = {
 	"fsl,imx6q-sabreauto",
+	"fsl,imx6q-sabrelite",
 	NULL,
 };
 
Signature · 1 line
1.7.5.4

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

#4 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 41 lines · Richard Zhao
Quoted 32 lines · Shawn Guo
Quoted 31 lines · Richard Zhao
---
 arch/arm/boot/dts/imx6q-sabrelite.dts |   54 +++++++++++++++++++++++++++++++++
 arch/arm/mach-imx/mach-imx6q.c        |    1 +
 2 files changed, 55 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6q-sabrelite.dts
arch/arm/boot/dts/imx6q-sabrelite.dts new file +18 -0
new file mode 100644
index 0000000..d54363f
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+/include/ "imx6q.dtsi"
+
+/ {
+	model = "Freescale i.MX6 Quad SABRE Lite Board";
+	compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
Quoted 8 lines

arch/arm/boot/dts/imx6q-sabrelite.dts line 23

Quoted 5 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +5 -0
+
+	chosen {
+		bootargs = "console=ttymxc1,115200";
+	};
+

Maybe we can start dropping this, since kernel is now able to get bootargs from atags even in case that bootloader can not pass dtb and the dtb is appended to kernel image.

Quoted 2 lines

kernel has a config "Extend bootloader kernel arguments". Does it help such case?

CONFIG_ARM_APPENDED_DTB and CONFIG_ARM_ATAG_DTB_COMPAT

Signature · 2 lines
Regards,
Shawn
#5 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 8 lines
Quoted 8 lines
Quoted 8 lines

arch/arm/boot/dts/imx6q-sabrelite.dts line 23

Quoted 5 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +5 -0
+
+	chosen {
+		bootargs = "console=ttymxc1,115200";
+	};
+

Maybe we can start dropping this, since kernel is now able to get bootargs from atags even in case that bootloader can not pass dtb and the dtb is appended to kernel image.

Quoted 4 lines
Quoted 2 lines

kernel has a config "Extend bootloader kernel arguments". Does it help such case?

CONFIG_ARM_APPENDED_DTB and CONFIG_ARM_ATAG_DTB_COMPAT

I don't like puting cmdline in dts either, but kernel provide CONFIG_CMDLINE_EXTEND and CONFIG_CMDLINE_FORCE, it's better to at least let uart work. I don't quite insist on it.

Thanks
Richard

Quoted 4 lines
Signature · 3 lines
-- 
Regards,
Shawn
#6 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 8 lines · Richard Zhao
Quoted 8 lines
Quoted 8 lines
Quoted 8 lines

arch/arm/boot/dts/imx6q-sabrelite.dts line 23

Quoted 5 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +5 -0
+
+	chosen {
+		bootargs = "console=ttymxc1,115200";
+	};
+

Maybe we can start dropping this, since kernel is now able to get bootargs from atags even in case that bootloader can not pass dtb and the dtb is appended to kernel image.

Quoted 8 lines
Quoted 4 lines
Quoted 2 lines

kernel has a config "Extend bootloader kernel arguments". Does it help such case?

CONFIG_ARM_APPENDED_DTB and CONFIG_ARM_ATAG_DTB_COMPAT

I don't like puting cmdline in dts either, but kernel provide CONFIG_CMDLINE_EXTEND and CONFIG_CMDLINE_FORCE, it's better to at least let uart work. I don't quite insist on it.

It's irrelevant. My point is I do not see a real use case for this 'bootargs' from dts. If your u-boot can pass dtb to kernel, it will replace the chosen node with its own 'bootargs' parameter anyway. If your u-boot is too old to pass dtb, you will probably need to enable CONFIG_ARM_APPENDED_DTB and CONFIG_ARM_ATAG_DTB_COMPAT to append dtb to kernel image and have kernel parse 'bootargs' from atags.

That said, in both case, we want to use bootargs set by bootloader.

Signature · 2 lines
Regards,
Shawn
maintainer
#7 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

In reply to Shawn Guo
Quoted 13 lines · Shawn Guo

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 10 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg = <0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

Even if not, adding hardcoded MAC addresses to the kernel is a no go. This includes devicetree blobs.

Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#8 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 15 lines · Sascha Hauer
Quoted 13 lines · Shawn Guo

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 10 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg = <0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

Quoted 2 lines

Even if not, adding hardcoded MAC addresses to the kernel is a no go. This includes devicetree blobs.

If Shawn agree, I can remove it. I don't feel it usefaull on daily develop work. Let user use fec.macaddr.

Thanks
Richard

Quoted 14 lines

Sascha

Signature · 9 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
maintainer
#9 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 16 lines · Richard Zhao
Quoted 15 lines · Sascha Hauer
Quoted 13 lines · Shawn Guo

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 10 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg = <0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

Quoted 4 lines
Quoted 2 lines

Even if not, adding hardcoded MAC addresses to the kernel is a no go. This includes devicetree blobs.

If Shawn agree, I can remove it. I don't feel it usefaull on daily develop work. Let user use fec.macaddr.

How useful this is you'll realize when all your collegues end up with the same MAC address. Just remove it.

Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#10 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

In reply to Shawn Guo
Quoted 54 lines · Shawn Guo
Quoted 26 lines · Richard Zhao
---
 arch/arm/boot/dts/imx6q-sabrelite.dts |   54 +++++++++++++++++++++++++++++++++
 arch/arm/mach-imx/mach-imx6q.c        |    1 +
 2 files changed, 55 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6q-sabrelite.dts
arch/arm/boot/dts/imx6q-sabrelite.dts new file +13 -0
new file mode 100644
index 0000000..d54363f
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;

arch/arm/boot/dts/imx6q-sabrelite.dts line 23

Quoted 10 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +10 -0
+/include/ "imx6q.dtsi"
+
+/ {
+	model = "Freescale i.MX6 Quad SABRE Lite Board";
+	compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
+
+	chosen {
+		bootargs = "console=ttymxc1,115200";
+	};
+

Maybe we can start dropping this, since kernel is now able to get bootargs from atags even in case that bootloader can not pass dtb and the dtb is appended to kernel image.

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 9 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg = <0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

Quoted 4 lines

arch/arm/boot/dts/imx6q-sabrelite.dts line 33

Quoted 1 line
arch/arm/boot/dts/imx6q-sabrelite.dts new file +1 -0
+				phy-reset-gpios = <&gpio2 23 0>; /* gpio3 23 */

Nit: If you want to comment it, please comment it in the consistent way, which is '/* GPIO3_23 */'.

Better yet, why don't you name the phandles starting at 1 so the comment isn't needed at all.

Rob

#11 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 55 lines · Rob Herring
Quoted 54 lines · Shawn Guo
Quoted 26 lines · Richard Zhao
---
 arch/arm/boot/dts/imx6q-sabrelite.dts |   54 +++++++++++++++++++++++++++++++++
 arch/arm/mach-imx/mach-imx6q.c        |    1 +
 2 files changed, 55 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6q-sabrelite.dts
arch/arm/boot/dts/imx6q-sabrelite.dts new file +13 -0
new file mode 100644
index 0000000..d54363f
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;

arch/arm/boot/dts/imx6q-sabrelite.dts line 23

Quoted 10 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +10 -0
+/include/ "imx6q.dtsi"
+
+/ {
+	model = "Freescale i.MX6 Quad SABRE Lite Board";
+	compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
+
+	chosen {
+		bootargs = "console=ttymxc1,115200";
+	};
+

Maybe we can start dropping this, since kernel is now able to get bootargs from atags even in case that bootloader can not pass dtb and the dtb is appended to kernel image.

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 9 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg = <0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

Quoted 7 lines
Quoted 4 lines

arch/arm/boot/dts/imx6q-sabrelite.dts line 33

Quoted 1 line
arch/arm/boot/dts/imx6q-sabrelite.dts new file +1 -0
+				phy-reset-gpios = <&gpio2 23 0>; /* gpio3 23 */

Nit: If you want to comment it, please comment it in the consistent way, which is '/* GPIO3_23 */'.

Better yet, why don't you name the phandles starting at 1 so the comment isn't needed at all.

Good idea, but it needs another patch, because it effects all imx6 boards. Shawn, what do you think?

Thanks
Richard

Quoted 8 lines

Rob

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

#12 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 61 lines · Richard Zhao
Quoted 60 lines · Rob Herring
Quoted 58 lines · Shawn Guo
Quoted 26 lines · Richard Zhao
---
 arch/arm/boot/dts/imx6q-sabrelite.dts |   54 +++++++++++++++++++++++++++++++++
 arch/arm/mach-imx/mach-imx6q.c        |    1 +
 2 files changed, 55 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6q-sabrelite.dts
arch/arm/boot/dts/imx6q-sabrelite.dts new file +13 -0
new file mode 100644
index 0000000..d54363f
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;

arch/arm/boot/dts/imx6q-sabrelite.dts line 23

Quoted 10 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +10 -0
+/include/ "imx6q.dtsi"
+
+/ {
+	model = "Freescale i.MX6 Quad SABRE Lite Board";
+	compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
+
+	chosen {
+		bootargs = "console=ttymxc1,115200";
+	};
+

Maybe we can start dropping this, since kernel is now able to get bootargs from atags even in case that bootloader can not pass dtb and the dtb is appended to kernel image.

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 9 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg = <0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

arch/arm/boot/dts/imx6q-sabrelite.dts line 33

Quoted 1 line
arch/arm/boot/dts/imx6q-sabrelite.dts new file +1 -0
+				phy-reset-gpios = <&gpio2 23 0>; /* gpio3 23 */

Nit: If you want to comment it, please comment it in the consistent way, which is '/* GPIO3_23 */'.

Quoted 5 lines
Quoted 2 lines

Better yet, why don't you name the phandles starting at 1 so the comment isn't needed at all.

Good idea, but it needs another patch, because it effects all imx6 boards. Shawn, what do you think?

When I was firstly working out the dts for imx51, I followed what most dts files do, numbering phandle and label name from 0, while imx reference manual happens to indexing hardware block from 1. This mismatch have been existing in kernel for long time, since kernel is numbering platform device from 0 too.

I'm not really sure if there is a convention on this. But since Rob (as device tree maintainer) says it can be numbered from 1, I'm fine to accept a patch fixing this up for all imx dts files.

Signature · 2 lines
Regards,
Shawn
#13 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 73 lines · Shawn Guo
Quoted 61 lines · Richard Zhao
Quoted 60 lines · Rob Herring
Quoted 58 lines · Shawn Guo
Quoted 26 lines · Richard Zhao
---
 arch/arm/boot/dts/imx6q-sabrelite.dts |   54 +++++++++++++++++++++++++++++++++
 arch/arm/mach-imx/mach-imx6q.c        |    1 +
 2 files changed, 55 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/boot/dts/imx6q-sabrelite.dts
arch/arm/boot/dts/imx6q-sabrelite.dts new file +13 -0
new file mode 100644
index 0000000..d54363f
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;

arch/arm/boot/dts/imx6q-sabrelite.dts line 23

Quoted 10 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +10 -0
+/include/ "imx6q.dtsi"
+
+/ {
+	model = "Freescale i.MX6 Quad SABRE Lite Board";
+	compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
+
+	chosen {
+		bootargs = "console=ttymxc1,115200";
+	};
+

Maybe we can start dropping this, since kernel is now able to get bootargs from atags even in case that bootloader can not pass dtb and the dtb is appended to kernel image.

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 9 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg = <0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

arch/arm/boot/dts/imx6q-sabrelite.dts line 33

Quoted 1 line
arch/arm/boot/dts/imx6q-sabrelite.dts new file +1 -0
+				phy-reset-gpios = <&gpio2 23 0>; /* gpio3 23 */

Nit: If you want to comment it, please comment it in the consistent way, which is '/* GPIO3_23 */'.

Quoted 5 lines
Quoted 2 lines

Better yet, why don't you name the phandles starting at 1 so the comment isn't needed at all.

Good idea, but it needs another patch, because it effects all imx6 boards. Shawn, what do you think?

When I was firstly working out the dts for imx51, I followed what most dts files do, numbering phandle and label name from 0, while imx reference manual happens to indexing hardware block from 1. This mismatch have been existing in kernel for long time, since kernel is numbering platform device from 0 too.

Quoted 3 lines

I'm not really sure if there is a convention on this. But since Rob (as device tree maintainer) says it can be numbered from 1, I'm fine to accept a patch fixing this up for all imx dts files.

I'll prepare the patch.

Thanks
Richard

Quoted 4 lines
Signature · 3 lines
-- 
Regards,
Shawn
#14 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

In reply to Shawn Guo
Quoted 13 lines · Shawn Guo

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 9 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg =<0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

U-boot now has support for blowing the mac fuses.

i.e.
imxotp blow --force 23 0019 ; imxotp blow --force 22 B800e1f5

for a mac of 00:19:b8:00:e1:f5

Most boards already have this done.

Troy

#15 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 14 lines · Troy Kisky
Quoted 13 lines · Shawn Guo

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 9 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg =<0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

Quoted 8 lines

U-boot now has support for blowing the mac fuses.

i.e.
imxotp blow --force 23 0019 ; imxotp blow --force 22 B800e1f5

for a mac of 00:19:b8:00:e1:f5

Most boards already have this done.

It's software issue here. When use DT, we don't still have patch to read fuse and pass mac address to fec driver. Currently, we can use bootargs fec.macaddr.

Thanks
Richard

Quoted 9 lines

Troy

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

#16 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 20 lines · Richard Zhao
Quoted 19 lines · Troy Kisky
Quoted 13 lines · Shawn Guo

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 9 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg =<0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

U-boot now has support for blowing the mac fuses.

i.e.
imxotp blow --force 23 0019 ; imxotp blow --force 22 B800e1f5

Quoted 7 lines
Quoted 3 lines

for a mac of 00:19:b8:00:e1:f5

Most boards already have this done.

It's software issue here. When use DT, we don't still have patch to read fuse and pass mac address to fec driver. Currently, we can use bootargs fec.macaddr.

Okay, if it's a software issue, we should sort it out right now. Plus the fec phy fixup hook, I have seen two cases that we need to pass platform_data for fec driver, so let us do it.

Regards,
Shawn

#17 lore raw

PATCH 1/7 arm/imx6: add imx6q sabrelite board support

Quoted 23 lines · Shawn Guo
Quoted 22 lines · Richard Zhao
Quoted 21 lines · Troy Kisky
Quoted 13 lines · Shawn Guo

arch/arm/boot/dts/imx6q-sabrelite.dts line 32

Quoted 9 lines
arch/arm/boot/dts/imx6q-sabrelite.dts new file +9 -0
+	memory {
+		reg =<0x10000000 0x40000000>;
+	};
+
+	soc {
+		aips-bus at 02100000 { /* AIPS2 */
+			enet at 02188000 {
+				phy-mode = "rgmii";
+				local-mac-address = [01 04 9F 01 1B 61];

Do we still have no way to figure the mac address from hardware setup (fuse or something) on sabrelite board?

U-boot now has support for blowing the mac fuses.

i.e.
imxotp blow --force 23 0019 ; imxotp blow --force 22 B800e1f5

for a mac of 00:19:b8:00:e1:f5

Quoted 8 lines
Quoted 5 lines
Quoted 1 line

Most boards already have this done.

It's software issue here. When use DT, we don't still have patch to read fuse and pass mac address to fec driver. Currently, we can use bootargs fec.macaddr.

Okay, if it's a software issue, we should sort it out right now. Plus the fec phy fixup hook, I have seen two cases that we need to pass platform_data for fec driver, so let us do it.

right, I'm glad to see patch fix it too. but I think it's out of scope of this patch series. The patch series is for enablement.

Thanks
Richard

Quoted 3 lines

Regards,
Shawn

#18 lore raw

PATCH 2/7 arm/imx: cpufreq: add multi-core support

In reply to Richard Zhao
---
 arch/arm/plat-mxc/cpufreq.c |   99 ++++++++++++++++++++++++++++--------------
 1 files changed, 66 insertions(+), 33 deletions(-)
arch/arm/plat-mxc/cpufreq.c +66 -33
index 74aac96..122b21a 100644
@@ -21,6 +21,7 @@
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/slab.h>
+#include <asm/cpu.h>
 #include <mach/hardware.h>
 #include <mach/clock.h>
 
@@ -33,6 +34,7 @@ static int cpu_freq_khz_min;
 static int cpu_freq_khz_max;
 
 static struct clk *cpu_clk;
+static DEFINE_MUTEX(cpu_lock);
 static struct cpufreq_frequency_table *imx_freq_table;
 
 static int cpu_op_nr;
@@ -58,17 +60,11 @@ static int set_cpu_freq(int freq)
 
 static int mxc_verify_speed(struct cpufreq_policy *policy)
 {
-	if (policy->cpu != 0)
-		return -EINVAL;
-
 	return cpufreq_frequency_table_verify(policy, imx_freq_table);
 }
 
 static unsigned int mxc_get_speed(unsigned int cpu)
 {
-	if (cpu)
-		return 0;
-
 	return clk_get_rate(cpu_clk) / 1000;
 }
 
@@ -76,23 +72,49 @@ static int mxc_set_target(struct cpufreq_policy *policy,
 			  unsigned int target_freq, unsigned int relation)
 {
 	struct cpufreq_freqs freqs;
-	int freq_Hz;
+	int freq_Hz, cpu;
 	int ret = 0;
 	unsigned int index;
 
+	mutex_lock(&cpu_lock);
+
 	cpufreq_frequency_table_target(policy, imx_freq_table,
 			target_freq, relation, &index);
 	freq_Hz = imx_freq_table[index].frequency * 1000;
 
 	freqs.old = clk_get_rate(cpu_clk) / 1000;
-	freqs.new = freq_Hz / 1000;
-	freqs.cpu = 0;
+	freqs.new = clk_round_rate(cpu_clk, freq_Hz);
+	freqs.new = (freqs.new ? freqs.new : freq_Hz) / 1000;
 	freqs.flags = 0;
-	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+
+	if (freqs.old == freqs.new) {
+		mutex_unlock(&cpu_lock);
+		return 0;
+	}
+
+	for_each_possible_cpu(cpu) {
+		freqs.cpu = cpu;
+		cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+	}
 
 	ret = set_cpu_freq(freq_Hz);
 
-	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+#ifdef CONFIG_SMP
+	/* loops_per_jiffy is not updated by the cpufreq core for SMP systems.
+	 * So update it for all CPUs.
+	 */
+	for_each_possible_cpu(cpu)
+		per_cpu(cpu_data, cpu).loops_per_jiffy =
+		cpufreq_scale(per_cpu(cpu_data, cpu).loops_per_jiffy,
+					freqs.old, freqs.new);
+#endif
+
+	for_each_possible_cpu(cpu) {
+		freqs.cpu = cpu;
+		cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+	}
+
+	mutex_unlock(&cpu_lock);
 
 	return ret;
 }
@@ -104,7 +126,7 @@ static int __init mxc_cpufreq_init(struct cpufreq_policy *policy)
 
 	printk(KERN_INFO "i.MXC CPU frequency driver\n");
 
-	if (policy->cpu != 0)
+	if (policy->cpu >= num_possible_cpus())
 		return -EINVAL;
 
 	if (!get_cpu_op)
@@ -116,37 +138,45 @@ static int __init mxc_cpufreq_init(struct cpufreq_policy *policy)
 		return PTR_ERR(cpu_clk);
 	}
 
-	cpu_op_tbl = get_cpu_op(&cpu_op_nr);
+	mutex_lock(&cpu_lock);
+	if (!imx_freq_table) {
+		cpu_op_tbl = get_cpu_op(&cpu_op_nr);
 
-	cpu_freq_khz_min = cpu_op_tbl[0].cpu_rate / 1000;
-	cpu_freq_khz_max = cpu_op_tbl[0].cpu_rate / 1000;
+		cpu_freq_khz_min = cpu_op_tbl[0].cpu_rate / 1000;
+		cpu_freq_khz_max = cpu_op_tbl[0].cpu_rate / 1000;
 
-	imx_freq_table = kmalloc(
-		sizeof(struct cpufreq_frequency_table) * (cpu_op_nr + 1),
-			GFP_KERNEL);
-	if (!imx_freq_table) {
-		ret = -ENOMEM;
-		goto err1;
-	}
+		imx_freq_table = kmalloc(sizeof(struct cpufreq_frequency_table)
+					* (cpu_op_nr + 1), GFP_KERNEL);
+		if (!imx_freq_table) {
+			ret = -ENOMEM;
+			mutex_unlock(&cpu_lock);
+			goto err1;
+		}
 
-	for (i = 0; i < cpu_op_nr; i++) {
-		imx_freq_table[i].index = i;
-		imx_freq_table[i].frequency = cpu_op_tbl[i].cpu_rate / 1000;
+		for (i = 0; i < cpu_op_nr; i++) {
+			imx_freq_table[i].index = i;
+			imx_freq_table[i].frequency =
+					cpu_op_tbl[i].cpu_rate / 1000;
 
-		if ((cpu_op_tbl[i].cpu_rate / 1000) < cpu_freq_khz_min)
-			cpu_freq_khz_min = cpu_op_tbl[i].cpu_rate / 1000;
+			if ((cpu_op_tbl[i].cpu_rate / 1000) < cpu_freq_khz_min)
+				cpu_freq_khz_min =
+					cpu_op_tbl[i].cpu_rate / 1000;
 
-		if ((cpu_op_tbl[i].cpu_rate / 1000) > cpu_freq_khz_max)
-			cpu_freq_khz_max = cpu_op_tbl[i].cpu_rate / 1000;
-	}
+			if ((cpu_op_tbl[i].cpu_rate / 1000) > cpu_freq_khz_max)
+				cpu_freq_khz_max =
+					cpu_op_tbl[i].cpu_rate / 1000;
+		}
 
-	imx_freq_table[i].index = i;
-	imx_freq_table[i].frequency = CPUFREQ_TABLE_END;
+		imx_freq_table[i].index = i;
+		imx_freq_table[i].frequency = CPUFREQ_TABLE_END;
+	}
+	mutex_unlock(&cpu_lock);
 
 	policy->cur = clk_get_rate(cpu_clk) / 1000;
 	policy->min = policy->cpuinfo.min_freq = cpu_freq_khz_min;
 	policy->max = policy->cpuinfo.max_freq = cpu_freq_khz_max;
-
+	policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
+	cpumask_setall(policy->cpus);
 	/* Manual states, that PLL stabilizes in two CLK32 periods */
 	policy->cpuinfo.transition_latency = 2 * NANOSECOND / CLK32_FREQ;
 
@@ -173,7 +203,10 @@ static int mxc_cpufreq_exit(struct cpufreq_policy *policy)
 
 	set_cpu_freq(cpu_freq_khz_max * 1000);
 	clk_put(cpu_clk);
+	mutex_lock(&cpu_lock);
 	kfree(imx_freq_table);
+	imx_freq_table = NULL;
+	mutex_unlock(&cpu_lock);
 	return 0;
 }
 
Signature · 1 line
1.7.5.4
#19 lore raw

PATCH 3/7 ARM: imx: fix cpufreq build errors

In reply to Richard Zhao

From: Richard Zhao <[email protected]>

CC arch/arm/plat-mxc/cpufreq.o
arch/arm/plat-mxc/cpufreq.c:203: error: expected declaration specifiers or '...' before string constant arch/arm/plat-mxc/cpufreq.c:203: warning: data definition has no type or storage class arch/arm/plat-mxc/cpufreq.c:203: warning: type defaults to 'int' in declaration of 'MODULE_AUTHOR' arch/arm/plat-mxc/cpufreq.c:203: warning: function declaration isn't a prototype arch/arm/plat-mxc/cpufreq.c:204: error: expected declaration specifiers or '...' before string constant arch/arm/plat-mxc/cpufreq.c:204: warning: data definition has no type or storage class arch/arm/plat-mxc/cpufreq.c:204: warning: type defaults to 'int' in declaration of 'MODULE_DESCRIPTION' arch/arm/plat-mxc/cpufreq.c:204: warning: function declaration isn't a prototype arch/arm/plat-mxc/cpufreq.c:205: error: expected declaration specifiers or '...' before string constant arch/arm/plat-mxc/cpufreq.c:205: warning: data definition has no type or storage class arch/arm/plat-mxc/cpufreq.c:205: warning: type defaults to 'int' in declaration of 'MODULE_LICENSE' arch/arm/plat-mxc/cpufreq.c:205: warning: function declaration isn't a prototype make[1]: *** [arch/arm/plat-mxc/cpufreq.o] Error 1
make: *** [arch/arm/plat-mxc] Error 2

---
 arch/arm/plat-mxc/cpufreq.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
arch/arm/plat-mxc/cpufreq.c +1 -0
index 122b21a..85d037f 100644
@@ -17,6 +17,7 @@
  * the CPU clock speed on the fly.
  */
 
+#include <linux/module.h>
 #include <linux/cpufreq.h>
 #include <linux/clk.h>
 #include <linux/err.h>
Signature · 1 line
1.7.5.4
#20 lore raw

PATCH 3/7 ARM: imx: fix cpufreq build errors

please ignore this one if it's already been merged.

Thanks
Richard

#21 lore raw

PATCH 4/7 arm/imx: fix cpufreq section mismatch

In reply to Richard Zhao

WARNING: arch/arm/plat-mxc/built-in.o(.data+0x488): Section mismatch in reference from the variable mxc_driver to the function .init.text:mxc_cpufreq_init() The variable mxc_driver references
the function __init mxc_cpufreq_init()
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console

---
 arch/arm/plat-mxc/cpufreq.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/plat-mxc/cpufreq.c +1 -1
index 85d037f..71e0d09 100644
@@ -120,7 +120,7 @@ static int mxc_set_target(struct cpufreq_policy *policy,
 	return ret;
 }
 
-static int __init mxc_cpufreq_init(struct cpufreq_policy *policy)
+static int mxc_cpufreq_init(struct cpufreq_policy *policy)
 {
 	int ret;
 	int i;
Signature · 1 line
1.7.5.4
#22 lore raw

PATCH 5/7 arm/imx: add cpu_voltage to cpu_op

In reply to Richard Zhao

Help cpu_op table have cpu_voltage info and cpufreq driver to change cpu voltage.

---
 arch/arm/plat-mxc/include/mach/mxc.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
arch/arm/plat-mxc/include/mach/mxc.h +1 -0
index a4d36d6..1ff7fe7 100644
@@ -166,6 +166,7 @@ extern unsigned int __mxc_cpu_type;
 
 struct cpu_op {
 	u32 cpu_rate;
+	int cpu_voltage;
 };
 
 int tzic_enable_wake(int is_idle);
Signature · 1 line
1.7.5.4
#23 lore raw

PATCH 6/7 arm/imx6q: add cpufreq support

In reply to Richard Zhao
---
 arch/arm/mach-imx/Kconfig        |    1 +
 arch/arm/mach-imx/Makefile       |    2 +-
 arch/arm/mach-imx/cpu_op-imx6q.c |   78 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 80 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/mach-imx/cpu_op-imx6q.c
arch/arm/mach-imx/Kconfig +1 -0
index fbd414b..7d813a3 100644
@@ -837,6 +837,7 @@ config SOC_IMX6Q
 	select ARM_GIC
 	select CACHE_L2X0
 	select CPU_V7
+	select ARCH_HAS_CPUFREQ
 	select HAVE_ARM_SCU
 	select HAVE_IMX_GPC
 	select HAVE_IMX_MMDC
arch/arm/mach-imx/Makefile +1 -1
index 9cf630a..2dfe4a7 100644
@@ -72,7 +72,7 @@ AFLAGS_head-v7.o :=-Wa,-march=armv7-a
 obj-$(CONFIG_SMP) += platsmp.o
 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
 obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
-obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o pm-imx6q.o
+obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o pm-imx6q.o cpu_op-imx6q.o
 
 # i.MX5 based machines
 obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
arch/arm/mach-imx/cpu_op-imx6q.c new file +78 -0

78 lines not on this page · raw message

Signature · 1 line
1.7.5.4
maintainer
#24 lore raw

PATCH 6/7 arm/imx6q: add cpufreq support

Quoted 49 lines · Richard Zhao
---
 arch/arm/mach-imx/Kconfig        |    1 +
 arch/arm/mach-imx/Makefile       |    2 +-
 arch/arm/mach-imx/cpu_op-imx6q.c |   78 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 80 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/mach-imx/cpu_op-imx6q.c
arch/arm/mach-imx/Kconfig +1 -0
index fbd414b..7d813a3 100644
@@ -837,6 +837,7 @@ config SOC_IMX6Q
 	select ARM_GIC
 	select CACHE_L2X0
 	select CPU_V7
+	select ARCH_HAS_CPUFREQ
 	select HAVE_ARM_SCU
 	select HAVE_IMX_GPC
 	select HAVE_IMX_MMDC
arch/arm/mach-imx/Makefile +1 -1
index 9cf630a..2dfe4a7 100644
@@ -72,7 +72,7 @@ AFLAGS_head-v7.o :=-Wa,-march=armv7-a
 obj-$(CONFIG_SMP) += platsmp.o
 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
 obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
-obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o pm-imx6q.o
+obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o pm-imx6q.o cpu_op-imx6q.o
 
 # i.MX5 based machines
 obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
arch/arm/mach-imx/cpu_op-imx6q.c new file +10 -0
new file mode 100644
index 0000000..8807b96
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html

arch/arm/mach-imx/cpu_op-imx6q.c line 20

Quoted 10 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +10 -0
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <mach/hardware.h>
+
+static u32 arm_max_freq;
+static int num_cpu_op;

Unused variable.

arch/arm/mach-imx/cpu_op-imx6q.c line 22

Quoted 2 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +2 -0
+
+/* working point(wp): 0 - 1GHzMHz; 1 - 800MHz, 3 - 400MHz, 4  - 160MHz */

s/GHzMHz/GHz/

arch/arm/mach-imx/cpu_op-imx6q.c line 27

Quoted 5 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +5 -0
+static struct cpu_op mx6q_cpu_op_1G[] = {
+	{
+	 .cpu_rate = 996000000,
+	 .cpu_voltage = 1225000,},
+	{

Strange indention.

Quoted 21 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +21 -0
+	 .cpu_rate = 792000000,
+	 .cpu_voltage = 1100000,},
+	{
+	  .cpu_rate = 396000000,
+	  .cpu_voltage = 950000,},
+	{
+	 .cpu_rate = 198000000,
+	 .cpu_voltage = 850000,},
+};
+
+static struct cpu_op mx6q_cpu_op[] = {
+	{
+	 .cpu_rate = 792000000,
+	 .cpu_voltage = 1100000,},
+	{
+	  .cpu_rate = 396000000,
+	  .cpu_voltage = 950000,},
+	{
+	 .cpu_rate = 198000000,
+	 .cpu_voltage = 850000,},
+};

arch/arm/mach-imx/cpu_op-imx6q.c line 58

Quoted 10 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +10 -0
+
+struct cpu_op *mx6q_get_cpu_op(int *op)
+{
+	if (arm_max_freq == 1000) {
+		*op =  num_cpu_op = ARRAY_SIZE(mx6q_cpu_op_1G);
+		return mx6q_cpu_op_1G;
+	} else {
+		*op =  num_cpu_op = ARRAY_SIZE(mx6q_cpu_op);
+		return mx6q_cpu_op;
+	}

Why not just return &mx6q_cpu_op[1] instead of creating a second array?

Quoted 10 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +10 -0
+}
+
+static int __init mx6q_cpu_op_init(void)
+{
+	get_cpu_op = mx6q_get_cpu_op;
+	return 0;
+}
+
+core_initcall(mx6q_cpu_op_init);
+

arch/arm/mach-imx/cpu_op-imx6q.c line 78

Quoted 10 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +10 -0
+static int __init set_arm_max_freq(char *p)
+{
+	if (strncmp(p, "1000", 4) == 0)
+		arm_max_freq = 1000;
+	else if (strncmp(p, "800", 3) == 0)
+		arm_max_freq = 800;
+	return 0;
+}
+
+early_param("arm_freq", set_arm_max_freq);

Do we need this? I suppose this should be passed by the device tree if necessary.

Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#25 lore raw

PATCH 6/7 arm/imx6q: add cpufreq support

Quoted 54 lines · Sascha Hauer
Quoted 53 lines · Richard Zhao
---
 arch/arm/mach-imx/Kconfig        |    1 +
 arch/arm/mach-imx/Makefile       |    2 +-
 arch/arm/mach-imx/cpu_op-imx6q.c |   78 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 80 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/mach-imx/cpu_op-imx6q.c
arch/arm/mach-imx/Kconfig +1 -0
index fbd414b..7d813a3 100644
@@ -837,6 +837,7 @@ config SOC_IMX6Q
 	select ARM_GIC
 	select CACHE_L2X0
 	select CPU_V7
+	select ARCH_HAS_CPUFREQ
 	select HAVE_ARM_SCU
 	select HAVE_IMX_GPC
 	select HAVE_IMX_MMDC
arch/arm/mach-imx/Makefile +1 -1
index 9cf630a..2dfe4a7 100644
@@ -72,7 +72,7 @@ AFLAGS_head-v7.o :=-Wa,-march=armv7-a
 obj-$(CONFIG_SMP) += platsmp.o
 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
 obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o
-obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o pm-imx6q.o
+obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o pm-imx6q.o cpu_op-imx6q.o
 
 # i.MX5 based machines
 obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
arch/arm/mach-imx/cpu_op-imx6q.c new file +14 -0
new file mode 100644
index 0000000..8807b96
@@ -0,0 +1,78 @@
+/*
+ * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/types.h>
Quoted 8 lines

arch/arm/mach-imx/cpu_op-imx6q.c line 20

Quoted 6 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +6 -0
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <mach/hardware.h>
+
+static u32 arm_max_freq;
+static int num_cpu_op;

Unused variable.

right, thanks.

Quoted 5 lines

arch/arm/mach-imx/cpu_op-imx6q.c line 22

Quoted 3 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +2 -0
+
+/* working point(wp): 0 - 1GHzMHz; 1 - 800MHz, 3 - 400MHz, 4  - 160MHz */

s/GHzMHz/GHz/

ok

Quoted 8 lines

arch/arm/mach-imx/cpu_op-imx6q.c line 27

Quoted 6 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +5 -0
+static struct cpu_op mx6q_cpu_op_1G[] = {
+	{
+	 .cpu_rate = 996000000,
+	 .cpu_voltage = 1225000,},
+	{

Strange indention.

	{
		.cpu_rate = 996000000,
		.cpu_voltage = 1225000,
	},

I'll change to like above.

Quoted 28 lines
Quoted 28 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +25 -0
+	 .cpu_rate = 792000000,
+	 .cpu_voltage = 1100000,},
+	{
+	  .cpu_rate = 396000000,
+	  .cpu_voltage = 950000,},
+	{
+	 .cpu_rate = 198000000,
+	 .cpu_voltage = 850000,},
+};
+
+static struct cpu_op mx6q_cpu_op[] = {
+	{
+	 .cpu_rate = 792000000,
+	 .cpu_voltage = 1100000,},
+	{
+	  .cpu_rate = 396000000,
+	  .cpu_voltage = 950000,},
+	{
+	 .cpu_rate = 198000000,
+	 .cpu_voltage = 850000,},
+};
+
+struct cpu_op *mx6q_get_cpu_op(int *op)
+{
+	if (arm_max_freq == 1000) {
Quoted 8 lines

arch/arm/mach-imx/cpu_op-imx6q.c line 58

Quoted 6 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +6 -0
+		*op =  num_cpu_op = ARRAY_SIZE(mx6q_cpu_op_1G);
+		return mx6q_cpu_op_1G;
+	} else {
+		*op =  num_cpu_op = ARRAY_SIZE(mx6q_cpu_op);
+		return mx6q_cpu_op;
+	}

Why not just return &mx6q_cpu_op[1] instead of creating a second array?

Good idea.

Quoted 16 lines
Quoted 16 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +15 -0
+}
+
+static int __init mx6q_cpu_op_init(void)
+{
+	get_cpu_op = mx6q_get_cpu_op;
+	return 0;
+}
+
+core_initcall(mx6q_cpu_op_init);
+
+static int __init set_arm_max_freq(char *p)
+{
+	if (strncmp(p, "1000", 4) == 0)
+		arm_max_freq = 1000;
+	else if (strncmp(p, "800", 3) == 0)
Quoted 8 lines

arch/arm/mach-imx/cpu_op-imx6q.c line 78

Quoted 5 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +5 -0
+		arm_max_freq = 800;
+	return 0;
+}
+
+early_param("arm_freq", set_arm_max_freq);

Do we need this? I suppose this should be passed by the device tree if necessary.

Yes, we do. Some boards don't support 1G. Would you let it be a temp solution? Or I'll only support 1G boards.
For long time, maybe we put all operating points to dts or opp. Which one will you prefer? It needs much other work to do.

Thanks
Richard

Quoted 14 lines

Sascha

Signature · 9 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
maintainer
#26 lore raw

PATCH 6/7 arm/imx6q: add cpufreq support

Quoted 12 lines · Richard Zhao
Quoted 4 lines
Quoted 4 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +4 -0
+{
+	if (strncmp(p, "1000", 4) == 0)
+		arm_max_freq = 1000;
+	else if (strncmp(p, "800", 3) == 0)
Quoted 8 lines

arch/arm/mach-imx/cpu_op-imx6q.c line 78

Quoted 5 lines
arch/arm/mach-imx/cpu_op-imx6q.c new file +5 -0
+		arm_max_freq = 800;
+	return 0;
+}
+
+early_param("arm_freq", set_arm_max_freq);

Do we need this? I suppose this should be passed by the device tree if necessary.

Quoted 4 lines

Yes, we do. Some boards don't support 1G. Would you let it be a temp solution? Or I'll only support 1G boards.
For long time, maybe we put all operating points to dts or opp. Which one will you prefer? It needs much other work to do.

I see several boards already having a clock-frequency property in their cpu node, so you could use this as maximum frequency.

Sascha

Signature · 4 lines
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#27 lore raw

PATCH 6/7 arm/imx6q: add cpufreq support

In reply to Richard Zhao
Quoted 13 lines · Richard Zhao
---
 arch/arm/mach-imx/Kconfig        |    1 +
 arch/arm/mach-imx/Makefile       |    2 +-
 arch/arm/mach-imx/cpu_op-imx6q.c |   78 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 80 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/mach-imx/cpu_op-imx6q.c
arch/arm/mach-imx/Kconfig +0 -0
index fbd414b..7d813a3 100644

arch/arm/mach-imx/Kconfig config SOC_IMX6Q · line 840

Quoted 4 lines
arch/arm/mach-imx/Kconfig +1 -0
@@ -837,6 +837,7 @@ config SOC_IMX6Q
 	select ARM_GIC
 	select CACHE_L2X0
 	select CPU_V7
+	select ARCH_HAS_CPUFREQ

ABCDEFGH...etc...

#28 lore raw

PATCH 6/7 arm/imx6q: add cpufreq support

Quoted 9 lines · Russell King - ARM Linux
Quoted 8 lines · Richard Zhao
---
 arch/arm/mach-imx/Kconfig        |    1 +
 arch/arm/mach-imx/Makefile       |    2 +-
 arch/arm/mach-imx/cpu_op-imx6q.c |   78 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 80 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/mach-imx/cpu_op-imx6q.c
Quoted 11 lines

arch/arm/mach-imx/Kconfig config SOC_IMX6Q · line 840

Quoted 9 lines
arch/arm/mach-imx/Kconfig +1 -0
index fbd414b..7d813a3 100644
@@ -837,6 +837,7 @@ config SOC_IMX6Q
 	select ARM_GIC
 	select CACHE_L2X0
 	select CPU_V7
+	select ARCH_HAS_CPUFREQ

ABCDEFGH...etc...

Right. Thanks for your comments.

Richard

Quoted 6 lines

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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

#29 lore raw

PATCH 7/7 arm/imx6q: register arm_clk to clkdev

In reply to Richard Zhao
---
 arch/arm/mach-imx/clock-imx6q.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
arch/arm/mach-imx/clock-imx6q.c +1 -0
index 039a7ab..2525380 100644
@@ -1911,6 +1911,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK(NULL, "gpmi_io_clk", gpmi_io_clk),
 	_REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk),
 	_REGISTER_CLOCK(NULL, "sata_clk", sata_clk),
+	_REGISTER_CLOCK(NULL, "cpu_clk", arm_clk),
 };
 
 int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
Signature · 1 line
1.7.5.4
#30 lore raw

PATCH 7/7 arm/imx6q: register arm_clk to clkdev

Quoted 1 line · Richard Zhao

It's always a good practice to add some commit message even for one line patch. When you try to do that, you can usually find something to note in the message. For this particular example, you may want to note why 'cpu_clk' needs to be in clk_lookup table.

Regards,
Shawn

Quoted 18 lines
---
 arch/arm/mach-imx/clock-imx6q.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
arch/arm/mach-imx/clock-imx6q.c +1 -0
index 039a7ab..2525380 100644
@@ -1911,6 +1911,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK(NULL, "gpmi_io_clk", gpmi_io_clk),
 	_REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk),
 	_REGISTER_CLOCK(NULL, "sata_clk", sata_clk),
+	_REGISTER_CLOCK(NULL, "cpu_clk", arm_clk),
 };
 
 int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
Signature · 1 line
1.7.5.4
#31 lore raw

PATCH 7/7 arm/imx6q: register arm_clk to clkdev

Quoted 7 lines · Shawn Guo
Quoted 1 line · Richard Zhao

It's always a good practice to add some commit message even for one line patch. When you try to do that, you can usually find something to note in the message. For this particular example, you may want to note why 'cpu_clk' needs to be in clk_lookup table.

right, I'll fix it in next version.

Thanks
Richard

Quoted 29 lines

Regards,
Shawn

Quoted 18 lines
---
 arch/arm/mach-imx/clock-imx6q.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
arch/arm/mach-imx/clock-imx6q.c +1 -0
index 039a7ab..2525380 100644
@@ -1911,6 +1911,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK(NULL, "gpmi_io_clk", gpmi_io_clk),
 	_REGISTER_CLOCK(NULL, "usboh3_clk", usboh3_clk),
 	_REGISTER_CLOCK(NULL, "sata_clk", sata_clk),
+	_REGISTER_CLOCK(NULL, "cpu_clk", arm_clk),
 };
 
 int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode)
Signature · 1 line
1.7.5.4

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linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

#32 lore raw

cover arm/imx6: add imx6q sabrelite board and imx6q cpufreq support

In reply to Richard Zhao
Quoted 3 lines · Richard Zhao

- add imx6q sabrelite board support
- add imx6q cpufreq support

It seems that Rob Lee is also working on imx6q cpufreq. We had some talk about this. I would suggest move the existing imx cpufreq driver into drivers/cpufreq before we start adding imx6q support. (Samsung and Omap have already done that.)

Signature · 2 lines
Regards,
Shawn
#33 lore raw

cover arm/imx6: add imx6q sabrelite board and imx6q cpufreq support

Quoted 8 lines · Shawn Guo
Quoted 3 lines · Richard Zhao

- add imx6q sabrelite board support
- add imx6q cpufreq support

It seems that Rob Lee is also working on imx6q cpufreq. We had some talk about this. I would suggest move the existing imx cpufreq driver into drivers/cpufreq before we start adding imx6q support. (Samsung and Omap have already done that.)

yes. There might be duplicate work here.
I agree the migration. Please continue review other parts.

Rob,

Could you review this patch series too and check the fragment?

Thanks
Richard

Quoted 11 lines
Signature · 9 lines
-- 
Regards,
Shawn


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#34 lore raw

cover arm/imx6: add imx6q sabrelite board and imx6q cpufreq support

Quoted 11 lines · Richard Zhao
Quoted 8 lines · Shawn Guo
Quoted 3 lines · Richard Zhao

- add imx6q sabrelite board support
- add imx6q cpufreq support

It seems that Rob Lee is also working on imx6q cpufreq. We had some talk about this. I would suggest move the existing imx cpufreq driver into drivers/cpufreq before we start adding imx6q support. (Samsung and Omap have already done that.)

yes. There might be duplicate work here.
I agree the migration. Please continue review other parts.

Sascha,

About cpufreq, this patch series aim to add imx6 cpufreq support. Migrating to driver/cpufreq/ can leave to other coming patch. Is it ok for you?

Thanks
Richard