ARM: at91: add at91sam9g20 dtsi
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PATCH 1/4 ARM: at91: add at91sam9g20 dtsi
--- arch/arm/boot/dts/at91sam9g20.dtsi | 154 ++++++++++++++++++++++++++++++++++++ 1 files changed, 154 insertions(+), 0 deletions(-) create mode 100644 arch/arm/boot/dts/at91sam9g20.dtsi
arch/arm/boot/dts/at91sam9g20.dtsi new file +154 -0
@@ -0,0 +1,154 @@ +/* + * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC + * + * Copyright (C) 2011 Atmel, + * 2011 Nicolas Ferre <[email protected]> + * 2011 Jean-Christophe PLAGNIOL-VILLARD <[email protected]> + * + * Licensed under GPLv2 or later. + */ + +/include/ "skeleton.dtsi" + +/ { + model = "Atmel AT91SAM9G20 family SoC"; + compatible = "atmel,at91sam9g20"; + interrupt-parent = <&aic>; + + aliases { + serial0 = &dbgu; + serial1 = &usart0; + serial2 = &usart1; + serial3 = &usart2; + serial4 = &usart3; + serial5 = &usart4; + serial6 = &usart5; + }; + cpus { + cpu at 0 { + compatible = "arm,arm926ejs"; + }; + }; + + memory at 20000000 { + reg = <0x20000000 0x08000000>; + }; + + ahb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + apb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + aic: interrupt-controller at fffff000 { + #interrupt-cells = <1>; + compatible = "atmel,at91rm9200-aic"; + interrupt-controller; + interrupt-parent; + reg = <0xfffff000 0x200>; + }; + + dbgu: serial at fffff200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffff200 0x200>; + interrupts = <1>; + }; + + usart0: serial at fffb0000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffb0000 0x200>; + interrupts = <6>; + atmel,use-dma-rx; + atmel,use-dma-tx; + }; + + usart1: serial at fffb4000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffb4000 0x200>; + interrupts = <7>; + atmel,use-dma-rx; + atmel,use-dma-tx; + }; + + usart2: serial at fffb8000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffb8000 0x200>; + interrupts = <8>; + atmel,use-dma-rx; + atmel,use-dma-tx; + }; + + usart3: serial at fffd0000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffd0000 0x200>; + interrupts = <23>; + atmel,use-dma-rx; + atmel,use-dma-tx; + }; + + usart4: serial at fffd4000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffd4000 0x200>; + interrupts = <24>; + atmel,use-dma-rx; + atmel,use-dma-tx; + }; + + usart5: serial at fffd8000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xfffd8000 0x200>; + interrupts = <25>; + atmel,use-dma-rx; + atmel,use-dma-tx; + }; + +/* + smc0: smc at ffffec00 { + compatible = "atmel,at91sam9260-smc"; + reg = <0xffffec00 0x10>; + }; + + smc1: smc at ffffec10 { + compatible = "atmel,at91sam9260-smc"; + reg = <0xffffec00 0x10>; + }; + + smc2: smc at ffffec20 { + compatible = "atmel,at91sam9260-smc"; + reg = <0xffffec00 0x10>; + }; + + smc3: smc at ffffec30 { + compatible = "atmel,at91sam9260-smc"; + reg = <0xffffec00 0x10>; + }; + + smc4: smc at ffffec40 { + compatible = "atmel,at91sam9260-smc"; + reg = <0xffffec00 0x10>; + }; + + smc5: smc at ffffec50 { + compatible = "atmel,at91sam9260-smc"; + reg = <0xffffec00 0x10>; + }; + + smc6: smc at ffffec60 { + compatible = "atmel,at91sam9260-smc"; + reg = <0xffffec00 0x10>; + }; + + smc7: smc at ffffec70 { + compatible = "atmel,at91sam9260-smc"; + reg = <0xffffec00 0x10>; + }; +*/ + }; + }; +};
Signature · 1 line
1.7.7
PATCH 2/4 ARM: at91: add Calao USB A9G20 DT support
In reply to a message not in the archive--- arch/arm/boot/dts/usb_a9g20.dts | 45 ++++++++++++++++++++++++++++++++++++++ arch/arm/mach-at91/Makefile.boot | 2 +- arch/arm/mach-at91/board-dt.c | 1 + 3 files changed, 47 insertions(+), 1 deletions(-) create mode 100644 arch/arm/boot/dts/usb_a9g20.dts
arch/arm/boot/dts/usb_a9g20.dts new file +45 -0
@@ -0,0 +1,45 @@ +/* + * usb_a9g20.dts - Device Tree file for Caloa USB A9G20 board + * + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <[email protected]> + * + * Licensed under GPLv2 or later. + */ +/dts-v1/; +/include/ "at91sam9g20.dtsi" + +/ { + model = "Calao USB A9G20"; + compatible = "calao,usb-a9g20", "atmel,at91sam9g20", "atmel,at91sam9"; + + chosen { + bootargs = "mem=64M console=ttyS0,115200 mtdparts=atmel_nand:4M(bootstrap/uboot/kernel)ro,60M(rootfs),-(data) root=/dev/mtdblock1 rw rootfstype=jffs2"; + }; + + memory at 70000000 { + reg = <0x20000000 0x4000000>; + }; + + ahb { + apb { + usart0: serial at fffb0000 { + status = "disabled"; + }; + usart1: serial at fffb4000 { + status = "disabled"; + }; + usart2: serial at fffb8000 { + status = "disabled"; + }; + usart3: serial at fffd0000 { + status = "disabled"; + }; + usart4: serial at fffd4000 { + status = "disabled"; + }; + usart5: serial at fffd8000 { + status = "disabled"; + }; + }; + }; +};
arch/arm/mach-at91/Makefile.boot +1 -1
@@ -17,4 +17,4 @@ params_phys-y := 0x20000100 initrd_phys-y := 0x20410000 endif -dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb +dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb usb_a9g20.dtb
arch/arm/mach-at91/board-dt.c +1 -0
@@ -108,6 +108,7 @@ static void __init at91_dt_device_init(void)static const char *at91_dt_board_compat[]__initdata = {"atmel,at91sam9m10g45ek" , +"calao,usb-a9g20" ,NULL };
Signature · 1 line
1.7.7
PATCH 3/4 ARM: at91/smc: add DT support
In reply to a message not in the archive--- arch/arm/boot/dts/at91sam9m10g45ek.dts | 16 ++++++ arch/arm/boot/dts/usb_a9g20.dts | 16 ++++++ arch/arm/mach-at91/board-dt.c | 28 ---------- arch/arm/mach-at91/sam9_smc.c | 85 ++++++++++++++++++++++++++++++++ 4 files changed, 117 insertions(+), 28 deletions(-)
arch/arm/boot/dts/at91sam9m10g45ek.dts +16 -0
@@ -32,6 +32,22 @@ usart3: serial at fff98000 { status = "disabled"; }; + smc03: smc at ffffec30 { + compatible = "atmel,at91sam9260-smc"; + reg = <0xffffec30 0x10>; + ncs_read_setup = <0>; + nrd_setup = <2>; + ncs_write_setup = <0>; + nwe_setup = <2>; + ncs_read_pulse = <4>; + nrd_pulse = <4>; + ncs_write_pulse = <4>; + nwe_pulse = <4>; + read_cycle = <7>; + write_cycle = <7>; + mode = <3>; + tdf_cycles = <3>; + }; }; }; };
arch/arm/boot/dts/usb_a9g20.dts +16 -0
@@ -40,6 +40,22 @@ usart5: serial at fffd8000 { status = "disabled"; }; + smc03: smc at ffffec30 { + compatible = "atmel,at91sam9260-smc"; + reg = <0xffffec30 0x10>; + ncs_read_setup = <0>; + nrd_setup = <2>; + ncs_write_setup = <0>; + nwe_setup = <2>; + ncs_read_pulse = <4>; + nrd_pulse = <4>; + ncs_write_pulse = <4>; + nwe_pulse = <4>; + read_cycle = <7>; + write_cycle = <7>; + mode = <3>; + tdf_cycles = <3>; + }; }; }; };
arch/arm/mach-at91/board-dt.c +0 -28
@@ -54,36 +54,8 @@ static struct atmel_nand_data __initdata ek_nand_data = { .enable_pin = AT91_PIN_PC14, }; -static struct sam9_smc_config __initdata ek_nand_smc_config = { - .ncs_read_setup =0 , - .nrd_setup =2 , - .ncs_write_setup =0 , - .nwe_setup =2 , - - .ncs_read_pulse =4 , - .nrd_pulse =4 , - .ncs_write_pulse =4 , - .nwe_pulse =4 , - - .read_cycle =7 , - .write_cycle =7 , - - .mode =AT91_SMC_READMODE |AT91_SMC_WRITEMODE |AT91_SMC_EXNWMODE_DISABLE , - .tdf_cycles =3 , -}; -static void __init ek_add_device_nand (void ) { - ek_nand_data.bus_width_16 =board_have_nand_16bit (); -/* setup bus-width (8 or 16) */ -if (ek_nand_data.bus_width_16) - ek_nand_smc_config.mode |=AT91_SMC_DBW_16 ; -else - ek_nand_smc_config.mode |=AT91_SMC_DBW_8 ; - -/* configure chip-select 3 (NAND) */ -sam9_smc_configure (0 ,3 , &ek_nand_smc_config); -at91_add_device_nand (&ek_nand_data); }
arch/arm/mach-at91/sam9_smc.c +85 -0
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1.7.7
PATCH 4/4 ARM: at91/pit: add DT support
In reply to a message not in the archive--- arch/arm/boot/dts/at91sam9g20.dtsi | 6 +++++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 +++++ arch/arm/mach-at91/at91sam926x_time.c | 37 +++++++++++++++++++++++++++++++- arch/arm/mach-at91/setup.c | 2 + 4 files changed, 49 insertions(+), 2 deletions(-)
arch/arm/boot/dts/at91sam9g20.dtsi +6 -0
@@ -54,6 +54,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1>; + }; + dbgu: serial at fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>;
arch/arm/boot/dts/at91sam9g45.dtsi +6 -0
@@ -53,6 +53,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1>; + }; + dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>;
arch/arm/mach-at91/at91sam926x_time.c +35 -2
@@ -14,6 +14,8 @@#include <linux/kernel.h> #include <linux/clk.h> #include <linux/clockchips.h> +#include <linux/of.h> +#include <linux/of_address.h> #include <asm/mach/time.h>
@@ -133,7 +135,8 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)static struct irqaction at91sam926x_pit_irq = { .name ="at91_tick" , .flags =IRQF_SHARED |IRQF_DISABLED |IRQF_TIMER |IRQF_IRQPOLL , - .handler = at91sam926x_pit_interrupt + .handler = at91sam926x_pit_interrupt, + .irq =AT91_ID_SYS , };static void at91sam926x_pit_reset (void )
@@ -149,6 +152,34 @@ static void at91sam926x_pit_reset(void)pit_write (AT91_PIT_MR , (pit_cycle -1 ) |AT91_PIT_PITEN ); } +#ifdef CONFIG_OF +static struct of_device_id timer_ids[] = { + { .compatible ="atmel,at91sam9260-pit" }, +}; + +void __init of_at91sam926x_pit_init (void ) +{ +struct device_node *np; +const unsigned int *intspec; + + np =of_find_matching_node (NULL , timer_ids); +if (!np) +panic ("unable to find compatible timer node in dtb\n" ); + pit_base_addr =of_iomap (np,0 ); +if (!pit_base_addr) +panic ("unable to map timer cpu registers\n" ); + +/* Get the interrupts property */ + intspec =of_get_property (np,"interrupts" ,NULL ); +BUG_ON (!intspec); + at91sam926x_pit_irq.irq =be32_to_cpup (intspec); + +of_node_put (np); +} +#else +static void __init of_at91sam926x_pit_init (void ) {} +#endif +/* * Set up both clocksource and clockevent support. */
@@ -157,6 +188,8 @@ static void __init at91sam926x_pit_init(void)unsigned long pit_rate;unsigned bits; +of_at91sam926x_pit_init (); +/* * Use our actual MCK to figure out how many MCK/16 ticks per * 1/HZ period (instead of a compile-time constant LATCH).
@@ -177,7 +210,7 @@ static void __init at91sam926x_pit_init(void)clocksource_register_hz (&pit_clk, pit_rate);/* Set up irq handler */ -setup_irq (AT91_ID_SYS , &at91sam926x_pit_irq); +setup_irq (at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);/* Set up and register clockevents */ pit_clkevt.mult =div_sc (pit_rate,NSEC_PER_SEC , pit_clkevt.shift);
arch/arm/mach-at91/setup.c +2 -0
@@ -287,7 +287,9 @@ void __init at91_map_io(void)void __init at91_initialize (unsigned long main_clock) { +#ifndef CONFIG_OF at91_boot_soc.map_register (); +#endif /* Init clock subsystem */ at91_clock_init (main_clock);
Signature · 1 line
1.7.7
PATCH v2 1/1 ARM: at91: pit add DT support
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
--- .../devicetree/bindings/arm/atmel-at91.txt | 8 +++ arch/arm/boot/dts/at91sam9g20.dtsi | 5 ++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++ arch/arm/mach-at91/at91sam926x_time.c | 49 +++++++++++++++++++- 4 files changed, 66 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txt
Documentation/devicetree/bindings/arm/atmel-at91.txt new file +8 -0
@@ -0,0 +1,8 @@ +Atmel AT91 device tree bindings. +================================ + +PIT Timer required properties: +- compatible: Should be "atmel,at91sam9260-pit" +- reg: Should contain registers location and length +- interrupts: Should contain interrupt for the PIT which is the IRQ line + shared across all System Controller members.
arch/arm/boot/dts/at91sam9g20.dtsi +5 -0
@@ -57,6 +57,11 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio";
arch/arm/boot/dts/at91sam9g45.dtsi +6 -0
@@ -58,6 +58,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; + dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>;
arch/arm/mach-at91/at91sam926x_time.c +47 -2
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1.7.5.4
PATCH v2 1/1 ARM: at91: pit add DT support
Hi Nicolas, Jean-Christophe,
Quoted 9 lines · Nicolas Ferre
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>[nicolas.ferre at atmel.com: change error path and interrupts property handling]Signed-off-by Nicolas Ferre <[email protected]>---
[...]
Quoted 6 lines
arch/arm/mach-at91/at91sam926x_time.c +0
-0@@ -14,6 +14,8 @@
[...]
Quoted 5 lines
arch/arm/mach-at91/at91sam926x_time.c +5
-0+static int __init of_at91sam926x_pit_init (void ) +{ +struct device_node *np; + + np =of_find_matching_node (NULL , timer_ids);
arch/arm/mach-at91/at91sam926x_time.c static void at91sam926x_pit_reset(void) · line 175
Quoted 10 lines
arch/arm/mach-at91/at91sam926x_time.c +10
-0+if (!np) + goto err; + + pit_base_addr =of_iomap (np,0 ); +if (!pit_base_addr) + goto node_err; + +/* Get the interrupts property */ +if (of_property_read_u32 (np,"interrupts" , &at91sam926x_pit_irq.irq)) + goto ioremap_err;
I think you want:
at91sam926x_pit_irq.irq = irq_of_parse_and_map(np, 0);
to make sure the IRQ is converted to a Linux IRQ and not a hwirq. Other than that looks fine to me.
Jamie
PATCH v2 1/1 ARM: at91: pit add DT support
On 01/05/2012 01:00 PM, Jamie Iles :
Quoted 38 lines
Hi Nicolas, Jean-Christophe,
Quoted 9 lines · Nicolas Ferre
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>[nicolas.ferre at atmel.com: change error path and interrupts property handling]Signed-off-by Nicolas Ferre <[email protected]>---
[...]
Quoted 6 lines
arch/arm/mach-at91/at91sam926x_time.c +0
-0@@ -14,6 +14,8 @@[...]
Quoted 5 lines
arch/arm/mach-at91/at91sam926x_time.c +5
-0+static int __init of_at91sam926x_pit_init (void ) +{ +struct device_node *np; + + np =of_find_matching_node (NULL , timer_ids);arch/arm/mach-at91/at91sam926x_time.c static void at91sam926x_pit_reset(void) · line 175
Quoted 10 lines
arch/arm/mach-at91/at91sam926x_time.c +10
-0+if (!np) + goto err; + + pit_base_addr =of_iomap (np,0 ); +if (!pit_base_addr) + goto node_err; + +/* Get the interrupts property */ +if (of_property_read_u32 (np,"interrupts" , &at91sam926x_pit_irq.irq)) + goto ioremap_err;I think you want:
Quoted 3 lines
at91sam926x_pit_irq.irq = irq_of_parse_and_map(np, 0);to make sure the IRQ is converted to a Linux IRQ and not a hwirq.
Yes, that definitively makes sense. BTW, without a DT entry, how should I map a hwirq, with the irq_domain_to_irq() helper? But I will need access to the interrupt controller "struct irq_domain"...
Quoted 1 line
Other than that looks fine to me.
Thanks a lot for your review, Jamie.
Best regards,
Signature · 1 line
Nicolas Ferre
PATCH v2 1/1 ARM: at91: pit add DT support
Quoted 39 lines · Nicolas Ferre
On 01/05/2012 01:00 PM, Jamie Iles :
Quoted 38 lines
Hi Nicolas, Jean-Christophe,
Quoted 9 lines · Nicolas Ferre
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>[nicolas.ferre at atmel.com: change error path and interrupts property handling]Signed-off-by Nicolas Ferre <[email protected]>---
[...]
Quoted 6 lines
arch/arm/mach-at91/at91sam926x_time.c +0
-0@@ -14,6 +14,8 @@[...]
Quoted 5 lines
arch/arm/mach-at91/at91sam926x_time.c +5
-0+static int __init of_at91sam926x_pit_init (void ) +{ +struct device_node *np; + + np =of_find_matching_node (NULL , timer_ids);arch/arm/mach-at91/at91sam926x_time.c static void at91sam926x_pit_reset(void) · line 175
Quoted 10 lines
arch/arm/mach-at91/at91sam926x_time.c +10
-0+if (!np) + goto err; + + pit_base_addr =of_iomap (np,0 ); +if (!pit_base_addr) + goto node_err; + +/* Get the interrupts property */ +if (of_property_read_u32 (np,"interrupts" , &at91sam926x_pit_irq.irq)) + goto ioremap_err;I think you want:
Quoted 7 lines
Quoted 3 lines
at91sam926x_pit_irq.irq = irq_of_parse_and_map(np, 0);to make sure the IRQ is converted to a Linux IRQ and not a hwirq.
Yes, that definitively makes sense. BTW, without a DT entry, how should I map a hwirq, with the
irq_domain_to_irq()helper? But I will need access to the interrupt controller "structirq_domain"...
If you aren't booting with DT then at the moment I think on AT91 you have statically assigned irq_descs and IRQ numbers so you don't need to map them, you just know what IRQ number to request at compile time.
Jamie
PATCH v3 1/1 ARM: at91: pit add DT support
In reply to Nicolas FerreFrom: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
---
v3: - use irq_of_parse_and_map() for handling irq numbers specified by DT.
Correction proposed by Jamie Iles.
v2: - new specification of irq numbers in DT (due to modification of AIC code)
- new error path in of_at91sam926x_pit_init()
- fall back to built-in values if an error occurs
- use of of_property_read_u32() to get irq property
.../devicetree/bindings/arm/atmel-at91.txt | 8 +++ arch/arm/boot/dts/at91sam9g20.dtsi | 5 ++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++ arch/arm/mach-at91/at91sam926x_time.c | 53 +++++++++++++++++++- 4 files changed, 70 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txt
Documentation/devicetree/bindings/arm/atmel-at91.txt new file +8 -0
@@ -0,0 +1,8 @@ +Atmel AT91 device tree bindings. +================================ + +PIT Timer required properties: +- compatible: Should be "atmel,at91sam9260-pit" +- reg: Should contain registers location and length +- interrupts: Should contain interrupt for the PIT which is the IRQ line + shared across all System Controller members.
arch/arm/boot/dts/at91sam9g20.dtsi +5 -0
@@ -57,6 +57,11 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio";
arch/arm/boot/dts/at91sam9g45.dtsi +6 -0
@@ -58,6 +58,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; + dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>;
arch/arm/mach-at91/at91sam926x_time.c +51 -2
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1.7.5.4
PATCH v3 1/1 ARM: at91: pit add DT support
Quoted 8 lines · Nicolas Ferre
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>[nicolas.ferre at atmel.com: change error path and interrupts property handling]Signed-off-by Nicolas Ferre <[email protected]>
Jamie
PATCH v3 1/1 ARM: at91: pit add DT support
In reply to Nicolas FerreQuoted 155 lines · Nicolas Ferre
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>[nicolas.ferre at atmel.com: change error path and interrupts property handling]Signed-off-by Nicolas Ferre <[email protected]>---
v3: - useirq_of_parse_and_map()for handling irq numbers specified by DT.
Correction proposed by Jamie Iles.v2: - new specification of irq numbers in DT (due to modification of AIC code)
- new error path inof_at91sam926x_pit_init()
- fall back to built-in values if an error occurs
- use ofof_property_read_u32()to get irq property.../devicetree/bindings/arm/atmel-at91.txt | 8 +++ arch/arm/boot/dts/at91sam9g20.dtsi | 5 ++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++ arch/arm/mach-at91/at91sam926x_time.c | 53 +++++++++++++++++++- 4 files changed, 70 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txtDocumentation/devicetree/bindings/arm/atmel-at91.txt new file +8
-0@@ -0,0 +1,8 @@ +Atmel AT91 device tree bindings. +================================ + +PIT Timer required properties: +- compatible: Should be "atmel,at91sam9260-pit" +- reg: Should contain registers location and length +- interrupts: Should contain interrupt for the PIT which is the IRQ line + shared across all System Controller members.arch/arm/boot/dts/at91sam9g20.dtsi +5
-0@@ -57,6 +57,11 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio";arch/arm/boot/dts/at91sam9g45.dtsi +6
-0@@ -58,6 +58,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; + dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>;arch/arm/mach-at91/at91sam926x_time.c +49
-2@@ -14,6 +14,9 @@#include <linux/kernel.h> #include <linux/clk.h> #include <linux/clockchips.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> #include <asm/mach/time.h> @@ -133,7 +136,8 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)static struct irqaction at91sam926x_pit_irq = { .name ="at91_tick" , .flags =IRQF_SHARED |IRQF_DISABLED |IRQF_TIMER |IRQF_IRQPOLL , - .handler = at91sam926x_pit_interrupt + .handler = at91sam926x_pit_interrupt, + .irq =AT91_ID_SYS , };static void at91sam926x_pit_reset (void )@@ -149,6 +153,49 @@ static void at91sam926x_pit_reset(void)pit_write (AT91_PIT_MR , (pit_cycle -1 ) |AT91_PIT_PITEN ); } +#ifdef CONFIG_OF +static struct of_device_id timer_ids[] = { + { .compatible ="atmel,at91sam9260-pit" }, + {/* sentinel */ } +}; + +static int __init of_at91sam926x_pit_init (void ) +{ +struct device_node *np; +int ret; + + np =of_find_matching_node (NULL , timer_ids); +if (!np) + goto err; + + pit_base_addr =of_iomap (np,0 ); +if (!pit_base_addr) + goto node_err; + +/* Get the interrupts property */ + ret =irq_of_parse_and_map (np,0 ); +if (ret <=0 ) + goto ioremap_err; + at91sam926x_pit_irq.irq = ret; + +of_node_put (np); + +return 0 ; + +ioremap_err: +iounmap (pit_base_addr); +node_err: +of_node_put (np); +err: +return -EINVAL ; +} +#else +static int __init of_at91sam926x_pit_init (void ) +{ +return -EINVAL ; +} +#endif +/* * Set up both clocksource and clockevent support. */ @@ -177,7 +224,7 @@ static void __init at91sam926x_pit_init(void)clocksource_register_hz (&pit_clk, pit_rate);/* Set up irq handler */ -setup_irq (AT91_ID_SYS , &at91sam926x_pit_irq); +setup_irq (at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);/* Set up and register clockevents */ pit_clkevt.mult =div_sc (pit_rate,NSEC_PER_SEC , pit_clkevt.shift);
arch/arm/mach-at91/at91sam926x_time.c static void at91sam926x_pit_suspend(void) · line 244
Quoted 5 lines
arch/arm/mach-at91/at91sam926x_time.c +2
-0@@ -193,6 +240,8 @@ static void at91sam926x_pit_suspend(void)void __init at91sam926x_ioremap_pit (u32 addr) { +if (!of_at91sam926x_pit_init ()) +return ;
This seems backwards to me. I don't have the ioremap changes in my tree, but shouldn't the caller of at91sam926x_ioremap_pit be changed to something like this:
if (of_at91sam926x_pit_init() < 0) at91sam926x_ioremap_pit(addr);
Otherwise,
Rob
Quoted 3 lines
arch/arm/mach-at91/at91sam926x_time.c +0
-0pit_base_addr =ioremap (addr,16 );if (!pit_base_addr)
PATCH v3 1/1 ARM: at91: pit add DT support
On 01/05/2012 05:42 PM, Rob Herring :
Quoted 24 lines · Nicolas Ferre
Quoted 23 lines
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>[nicolas.ferre at atmel.com: change error path and interrupts property handling]Signed-off-by Nicolas Ferre <[email protected]>---
v3: - useirq_of_parse_and_map()for handling irq numbers specified by DT.
Correction proposed by Jamie Iles.v2: - new specification of irq numbers in DT (due to modification of AIC code)
- new error path inof_at91sam926x_pit_init()
- fall back to built-in values if an error occurs
- use ofof_property_read_u32()to get irq property.../devicetree/bindings/arm/atmel-at91.txt | 8 +++ arch/arm/boot/dts/at91sam9g20.dtsi | 5 ++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++ arch/arm/mach-at91/at91sam926x_time.c | 53 +++++++++++++++++++- 4 files changed, 70 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txt
[..]
Quoted 2 lines
Quoted 2 lines
arch/arm/mach-at91/at91sam926x_time.c +0
-0
[..]
Quoted 11 lines
arch/arm/mach-at91/at91sam926x_time.c static void at91sam926x_pit_suspend(void) · line 244
Quoted 4 lines
void
__initat91sam926x_ioremap_pit(u32 addr)
{arch/arm/mach-at91/at91sam926x_time.c +2
-0+if (!of_at91sam926x_pit_init ()) +return ;This seems backwards to me. I don't have the ioremap changes in my tree, but shouldn't the caller of
at91sam926x_ioremap_pitbe changed to something like this:if (of_at91sam926x_pit_init() < 0) at91sam926x_ioremap_pit(addr);
Yes, you are right, it will be more readable the other way around.
I repost another revision now.
Quoted 2 lines
Otherwise,
Acked-by Rob Herring <[email protected]>
Thanks for your review.
Best regards,
Signature · 1 line
Nicolas Ferre
PATCH v3 1/1 ARM: at91: pit add DT support
In reply to Nicolas FerreQuoted 112 lines · Nicolas Ferre
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>[nicolas.ferre at atmel.com: change error path and interrupts property handling]Signed-off-by Nicolas Ferre <[email protected]>---
v3: - useirq_of_parse_and_map()for handling irq numbers specified by DT.
Correction proposed by Jamie Iles.v2: - new specification of irq numbers in DT (due to modification of AIC code)
- new error path inof_at91sam926x_pit_init()
- fall back to built-in values if an error occurs
- use ofof_property_read_u32()to get irq property.../devicetree/bindings/arm/atmel-at91.txt | 8 +++ arch/arm/boot/dts/at91sam9g20.dtsi | 5 ++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++ arch/arm/mach-at91/at91sam926x_time.c | 53 +++++++++++++++++++- 4 files changed, 70 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txtDocumentation/devicetree/bindings/arm/atmel-at91.txt new file +8
-0@@ -0,0 +1,8 @@ +Atmel AT91 device tree bindings. +================================ + +PIT Timer required properties: +- compatible: Should be "atmel,at91sam9260-pit" +- reg: Should contain registers location and length +- interrupts: Should contain interrupt for the PIT which is the IRQ line + shared across all System Controller members.arch/arm/boot/dts/at91sam9g20.dtsi +5
-0@@ -57,6 +57,11 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio";arch/arm/boot/dts/at91sam9g45.dtsi +6
-0@@ -58,6 +58,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; + dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>;arch/arm/mach-at91/at91sam926x_time.c +18
-1@@ -14,6 +14,9 @@#include <linux/kernel.h> #include <linux/clk.h> #include <linux/clockchips.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> #include <asm/mach/time.h> @@ -133,7 +136,8 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)static struct irqaction at91sam926x_pit_irq = { .name ="at91_tick" , .flags =IRQF_SHARED |IRQF_DISABLED |IRQF_TIMER |IRQF_IRQPOLL , - .handler = at91sam926x_pit_interrupt + .handler = at91sam926x_pit_interrupt, + .irq =AT91_ID_SYS , };static void at91sam926x_pit_reset (void )@@ -149,6 +153,49 @@ static void at91sam926x_pit_reset(void)pit_write (AT91_PIT_MR , (pit_cycle -1 ) |AT91_PIT_PITEN ); } +#ifdef CONFIG_OF +static struct of_device_id timer_ids[] = { + { .compatible ="atmel,at91sam9260-pit" }, + {/* sentinel */ } +}; + +static int __init of_at91sam926x_pit_init (void ) +{ +struct device_node *np; +int ret; + + np =of_find_matching_node (NULL , timer_ids); +if (!np)
arch/arm/mach-at91/at91sam926x_time.c static void at91sam926x_pit_reset(void) · line 178
Quoted 10 lines
arch/arm/mach-at91/at91sam926x_time.c +10
-0+ goto err; + + pit_base_addr =of_iomap (np,0 ); +if (!pit_base_addr) + goto node_err; + +/* Get the interrupts property */ + ret =irq_of_parse_and_map (np,0 ); +if (ret <=0 ) + goto ioremap_err;
if (!ret)
The DT irq functions return 0 on failure.
g.
PATCH v3 1/1 ARM: at91: pit add DT support
On 01/05/2012 07:00 PM, Grant Likely :
Quoted 24 lines · Nicolas Ferre
Quoted 23 lines
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>[nicolas.ferre at atmel.com: change error path and interrupts property handling]Signed-off-by Nicolas Ferre <[email protected]>---
v3: - useirq_of_parse_and_map()for handling irq numbers specified by DT.
Correction proposed by Jamie Iles.v2: - new specification of irq numbers in DT (due to modification of AIC code)
- new error path inof_at91sam926x_pit_init()
- fall back to built-in values if an error occurs
- use ofof_property_read_u32()to get irq property.../devicetree/bindings/arm/atmel-at91.txt | 8 +++ arch/arm/boot/dts/at91sam9g20.dtsi | 5 ++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++ arch/arm/mach-at91/at91sam926x_time.c | 53 +++++++++++++++++++- 4 files changed, 70 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txt
[..]
Quoted 2 lines
Quoted 2 lines
arch/arm/mach-at91/at91sam926x_time.c +0
-0
[..]
Quoted 8 lines
arch/arm/mach-at91/at91sam926x_time.c static void at91sam926x_pit_reset(void) · line 178
Quoted 4 lines
arch/arm/mach-at91/at91sam926x_time.c +4
-0+/* Get the interrupts property */ + ret =irq_of_parse_and_map (np,0 ); +if (ret <=0 ) + goto ioremap_err;if (!ret)
The DT irq functions return 0 on failure.
Ok, modified in new revision.
Best regards,
Signature · 1 line
Nicolas Ferre
PATCH v4 1/1 ARM: at91: pit add DT support
In reply to Nicolas FerreFrom: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
---
v4: - change of_at91sam926x_pit_init() return value usage logic as
suggested by Rob Herring
- irq_of_parse_and_map() returns 0 on error: change test according to Grant Likely note.
v3: - use irq_of_parse_and_map() for handling irq numbers specified by DT.
Correction proposed by Jamie Iles.
v2: - new specification of irq numbers in DT (due to modification of AIC code)
- new error path in of_at91sam926x_pit_init()
- fall back to built-in values if an error occurs
- use of of_property_read_u32() to get irq property
.../devicetree/bindings/arm/atmel-at91.txt | 8 +++ arch/arm/boot/dts/at91sam9g20.dtsi | 5 ++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++ arch/arm/mach-at91/at91sam926x_time.c | 60 ++++++++++++++++++-- 4 files changed, 73 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txt
Documentation/devicetree/bindings/arm/atmel-at91.txt new file +8 -0
@@ -0,0 +1,8 @@ +Atmel AT91 device tree bindings. +================================ + +PIT Timer required properties: +- compatible: Should be "atmel,at91sam9260-pit" +- reg: Should contain registers location and length +- interrupts: Should contain interrupt for the PIT which is the IRQ line + shared across all System Controller members.
arch/arm/boot/dts/at91sam9g20.dtsi +5 -0
@@ -57,6 +57,11 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio";
arch/arm/boot/dts/at91sam9g45.dtsi +6 -0
@@ -58,6 +58,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; + dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>;
arch/arm/mach-at91/at91sam926x_time.c +54 -6
90 lines not on this page · raw message
Signature · 1 line
1.7.5.4
PATCH v4 1/1 ARM: at91: pit add DT support
Quoted 164 lines · Nicolas Ferre
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>[nicolas.ferre at atmel.com: change error path and interrupts property handling]Signed-off-by Nicolas Ferre <[email protected]>Reviewed-by Jamie Iles <[email protected]>Acked-by Rob Herring <[email protected]>---
v4: - changeof_at91sam926x_pit_init()return value usage logic as
suggested by Rob Herring
-irq_of_parse_and_map()returns 0 on error: change test according to Grant Likely note.v3: - use
irq_of_parse_and_map()for handling irq numbers specified by DT.
Correction proposed by Jamie Iles.v2: - new specification of irq numbers in DT (due to modification of AIC code)
- new error path inof_at91sam926x_pit_init()
- fall back to built-in values if an error occurs
- use ofof_property_read_u32()to get irq property.../devicetree/bindings/arm/atmel-at91.txt | 8 +++ arch/arm/boot/dts/at91sam9g20.dtsi | 5 ++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++ arch/arm/mach-at91/at91sam926x_time.c | 60 ++++++++++++++++++-- 4 files changed, 73 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txtDocumentation/devicetree/bindings/arm/atmel-at91.txt new file +8
-0@@ -0,0 +1,8 @@ +Atmel AT91 device tree bindings. +================================ + +PIT Timer required properties: +- compatible: Should be "atmel,at91sam9260-pit" +- reg: Should contain registers location and length +- interrupts: Should contain interrupt for the PIT which is the IRQ line + shared across all System Controller members.arch/arm/boot/dts/at91sam9g20.dtsi +5
-0@@ -57,6 +57,11 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio";arch/arm/boot/dts/at91sam9g45.dtsi +6
-0@@ -58,6 +58,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; + dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>;arch/arm/mach-at91/at91sam926x_time.c +49
-2@@ -14,6 +14,9 @@#include <linux/kernel.h> #include <linux/clk.h> #include <linux/clockchips.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> #include <asm/mach/time.h> @@ -133,7 +136,8 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)static struct irqaction at91sam926x_pit_irq = { .name ="at91_tick" , .flags =IRQF_SHARED |IRQF_DISABLED |IRQF_TIMER |IRQF_IRQPOLL , - .handler = at91sam926x_pit_interrupt + .handler = at91sam926x_pit_interrupt, + .irq =AT91_ID_SYS , };static void at91sam926x_pit_reset (void )@@ -149,6 +153,49 @@ static void at91sam926x_pit_reset(void)pit_write (AT91_PIT_MR , (pit_cycle -1 ) |AT91_PIT_PITEN ); } +#ifdef CONFIG_OF +static struct of_device_id timer_ids[] = { + { .compatible ="atmel,at91sam9260-pit" }, + {/* sentinel */ } +}; + +static int __init of_at91sam926x_pit_init (void ) +{ +struct device_node *np; +int ret; + + np =of_find_matching_node (NULL , timer_ids); +if (!np) + goto err; + + pit_base_addr =of_iomap (np,0 ); +if (!pit_base_addr) + goto node_err; + +/* Get the interrupts property */ + ret =irq_of_parse_and_map (np,0 ); +if (!ret) + goto ioremap_err; + at91sam926x_pit_irq.irq = ret; + +of_node_put (np); + +return 0 ; + +ioremap_err: +iounmap (pit_base_addr); +node_err: +of_node_put (np); +err: +return -EINVAL ; +} +#else +static int __init of_at91sam926x_pit_init (void ) +{ +return -EINVAL ; +} +#endif +/* * Set up both clocksource and clockevent support. */ @@ -177,7 +224,7 @@ static void __init at91sam926x_pit_init(void)clocksource_register_hz (&pit_clk, pit_rate);/* Set up irq handler */ -setup_irq (AT91_ID_SYS , &at91sam926x_pit_irq); +setup_irq (at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);/* Set up and register clockevents */ pit_clkevt.mult =div_sc (pit_rate,NSEC_PER_SEC , pit_clkevt.shift);@@ -193,10 +240,11 @@ static void at91sam926x_pit_suspend(void)void __init at91sam926x_ioremap_pit (u32 addr)
arch/arm/mach-at91/at91sam926x_time.c static void at91sam926x_pit_suspend(void) · line 247
Quoted 10 lines
arch/arm/mach-at91/at91sam926x_time.c +5
-4{ - pit_base_addr =ioremap (addr,16 ); - -if (!pit_base_addr) -panic ("Impossible to ioremap PIT\n" ); +if (of_at91sam926x_pit_init () <0 ) { + pit_base_addr =ioremap (addr,16 ); +if (!pit_base_addr) +panic ("Impossible to ioremap PIT\n" ); + }
This is not what I meant. I meant call either at91sam926x_ioremap_pit or of_at91sam926x_pit_init. Don't nest the calls and keep the OF and non-OF init somewhat separate. The fact that you are passing in the physical address and then ignoring it for the OF case is what I have issue with.
Rob
Quoted 3 lines
arch/arm/mach-at91/at91sam926x_time.c +0
-0}struct sys_timer at91sam926x_timer = {
PATCH v4 1/1 ARM: at91: pit add DT support
On 01/06/2012 04:47 PM, Rob Herring :
Quoted 164 lines · Nicolas Ferre
Quoted 163 lines
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>[nicolas.ferre at atmel.com: change error path and interrupts property handling]Signed-off-by Nicolas Ferre <[email protected]>Reviewed-by Jamie Iles <[email protected]>Acked-by Rob Herring <[email protected]>---
v4: - changeof_at91sam926x_pit_init()return value usage logic as
suggested by Rob Herring
-irq_of_parse_and_map()returns 0 on error: change test according to Grant Likely note.v3: - use
irq_of_parse_and_map()for handling irq numbers specified by DT.
Correction proposed by Jamie Iles.v2: - new specification of irq numbers in DT (due to modification of AIC code)
- new error path inof_at91sam926x_pit_init()
- fall back to built-in values if an error occurs
- use ofof_property_read_u32()to get irq property.../devicetree/bindings/arm/atmel-at91.txt | 8 +++ arch/arm/boot/dts/at91sam9g20.dtsi | 5 ++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++ arch/arm/mach-at91/at91sam926x_time.c | 60 ++++++++++++++++++-- 4 files changed, 73 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txtDocumentation/devicetree/bindings/arm/atmel-at91.txt new file +8
-0@@ -0,0 +1,8 @@ +Atmel AT91 device tree bindings. +================================ + +PIT Timer required properties: +- compatible: Should be "atmel,at91sam9260-pit" +- reg: Should contain registers location and length +- interrupts: Should contain interrupt for the PIT which is the IRQ line + shared across all System Controller members.arch/arm/boot/dts/at91sam9g20.dtsi +5
-0@@ -57,6 +57,11 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio";arch/arm/boot/dts/at91sam9g45.dtsi +6
-0@@ -58,6 +58,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; + dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>;arch/arm/mach-at91/at91sam926x_time.c +49
-2@@ -14,6 +14,9 @@#include <linux/kernel.h> #include <linux/clk.h> #include <linux/clockchips.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> #include <asm/mach/time.h> @@ -133,7 +136,8 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)static struct irqaction at91sam926x_pit_irq = { .name ="at91_tick" , .flags =IRQF_SHARED |IRQF_DISABLED |IRQF_TIMER |IRQF_IRQPOLL , - .handler = at91sam926x_pit_interrupt + .handler = at91sam926x_pit_interrupt, + .irq =AT91_ID_SYS , };static void at91sam926x_pit_reset (void )@@ -149,6 +153,49 @@ static void at91sam926x_pit_reset(void)pit_write (AT91_PIT_MR , (pit_cycle -1 ) |AT91_PIT_PITEN ); } +#ifdef CONFIG_OF +static struct of_device_id timer_ids[] = { + { .compatible ="atmel,at91sam9260-pit" }, + {/* sentinel */ } +}; + +static int __init of_at91sam926x_pit_init (void ) +{ +struct device_node *np; +int ret; + + np =of_find_matching_node (NULL , timer_ids); +if (!np) + goto err; + + pit_base_addr =of_iomap (np,0 ); +if (!pit_base_addr) + goto node_err; + +/* Get the interrupts property */ + ret =irq_of_parse_and_map (np,0 ); +if (!ret) + goto ioremap_err; + at91sam926x_pit_irq.irq = ret; + +of_node_put (np); + +return 0 ; + +ioremap_err: +iounmap (pit_base_addr); +node_err: +of_node_put (np); +err: +return -EINVAL ; +} +#else +static int __init of_at91sam926x_pit_init (void ) +{ +return -EINVAL ; +} +#endif +/* * Set up both clocksource and clockevent support. */ @@ -177,7 +224,7 @@ static void __init at91sam926x_pit_init(void)clocksource_register_hz (&pit_clk, pit_rate);/* Set up irq handler */ -setup_irq (AT91_ID_SYS , &at91sam926x_pit_irq); +setup_irq (at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);/* Set up and register clockevents */ pit_clkevt.mult =div_sc (pit_rate,NSEC_PER_SEC , pit_clkevt.shift);@@ -193,10 +240,11 @@ static void at91sam926x_pit_suspend(void)
Quoted 16 lines
arch/arm/mach-at91/at91sam926x_time.c static void at91sam926x_pit_suspend(void) · line 247
Quoted 11 lines
arch/arm/mach-at91/at91sam926x_time.c +5
-4void __init at91sam926x_ioremap_pit (u32 addr) { - pit_base_addr =ioremap (addr,16 ); - -if (!pit_base_addr) -panic ("Impossible to ioremap PIT\n" ); +if (of_at91sam926x_pit_init () <0 ) { + pit_base_addr =ioremap (addr,16 ); +if (!pit_base_addr) +panic ("Impossible to ioremap PIT\n" ); + }This is not what I meant. I meant call either
at91sam926x_ioremap_pitorof_at91sam926x_pit_init. Don't nest the calls and keep the OF and non-OF init somewhat separate. The fact that you are passing in the physical address and then ignoring it for the OF case is what I have issue with.
I see...
I did not understand this way because I was so obsessed by the fact to not introduce another interface to the PIT.
But it is true that as our future SoCs will only rely on DT to get PIT data, we will not have the knowledge of its physical address: this is speaking in favor of what you are saying -> I should keep those init separated and called from the <soc_name>_ioremap_registers() functions.
Jean-Christophe, do you agree with this? If yes, I have already the patch ready and will send a v5 of this one...
Bye,
Signature · 1 line
Nicolas Ferre
PATCH v4 1/1 ARM: at91: pit add DT support
In reply to Rob HerringQuoted 164 lines · Rob Herring
Quoted 163 lines · Nicolas Ferre
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>[nicolas.ferre at atmel.com: change error path and interrupts property handling]Signed-off-by Nicolas Ferre <[email protected]>Reviewed-by Jamie Iles <[email protected]>Acked-by Rob Herring <[email protected]>---
v4: - changeof_at91sam926x_pit_init()return value usage logic as
suggested by Rob Herring
-irq_of_parse_and_map()returns 0 on error: change test according to Grant Likely note.v3: - use
irq_of_parse_and_map()for handling irq numbers specified by DT.
Correction proposed by Jamie Iles.v2: - new specification of irq numbers in DT (due to modification of AIC code)
- new error path inof_at91sam926x_pit_init()
- fall back to built-in values if an error occurs
- use ofof_property_read_u32()to get irq property.../devicetree/bindings/arm/atmel-at91.txt | 8 +++ arch/arm/boot/dts/at91sam9g20.dtsi | 5 ++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++ arch/arm/mach-at91/at91sam926x_time.c | 60 ++++++++++++++++++-- 4 files changed, 73 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txtDocumentation/devicetree/bindings/arm/atmel-at91.txt new file +8
-0@@ -0,0 +1,8 @@ +Atmel AT91 device tree bindings. +================================ + +PIT Timer required properties: +- compatible: Should be "atmel,at91sam9260-pit" +- reg: Should contain registers location and length +- interrupts: Should contain interrupt for the PIT which is the IRQ line + shared across all System Controller members.arch/arm/boot/dts/at91sam9g20.dtsi +5
-0@@ -57,6 +57,11 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio";arch/arm/boot/dts/at91sam9g45.dtsi +6
-0@@ -58,6 +58,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; + dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>;arch/arm/mach-at91/at91sam926x_time.c +49
-2@@ -14,6 +14,9 @@#include <linux/kernel.h> #include <linux/clk.h> #include <linux/clockchips.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> #include <asm/mach/time.h> @@ -133,7 +136,8 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)static struct irqaction at91sam926x_pit_irq = { .name ="at91_tick" , .flags =IRQF_SHARED |IRQF_DISABLED |IRQF_TIMER |IRQF_IRQPOLL , - .handler = at91sam926x_pit_interrupt + .handler = at91sam926x_pit_interrupt, + .irq =AT91_ID_SYS , };static void at91sam926x_pit_reset (void )@@ -149,6 +153,49 @@ static void at91sam926x_pit_reset(void)pit_write (AT91_PIT_MR , (pit_cycle -1 ) |AT91_PIT_PITEN ); } +#ifdef CONFIG_OF +static struct of_device_id timer_ids[] = { + { .compatible ="atmel,at91sam9260-pit" }, + {/* sentinel */ } +}; + +static int __init of_at91sam926x_pit_init (void ) +{ +struct device_node *np; +int ret; + + np =of_find_matching_node (NULL , timer_ids); +if (!np) + goto err; + + pit_base_addr =of_iomap (np,0 ); +if (!pit_base_addr) + goto node_err; + +/* Get the interrupts property */ + ret =irq_of_parse_and_map (np,0 ); +if (!ret) + goto ioremap_err; + at91sam926x_pit_irq.irq = ret; + +of_node_put (np); + +return 0 ; + +ioremap_err: +iounmap (pit_base_addr); +node_err: +of_node_put (np); +err: +return -EINVAL ; +} +#else +static int __init of_at91sam926x_pit_init (void ) +{ +return -EINVAL ; +} +#endif +/* * Set up both clocksource and clockevent support. */ @@ -177,7 +224,7 @@ static void __init at91sam926x_pit_init(void)clocksource_register_hz (&pit_clk, pit_rate);/* Set up irq handler */ -setup_irq (AT91_ID_SYS , &at91sam926x_pit_irq); +setup_irq (at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);/* Set up and register clockevents */ pit_clkevt.mult =div_sc (pit_rate,NSEC_PER_SEC , pit_clkevt.shift);@@ -193,10 +240,11 @@ static void at91sam926x_pit_suspend(void)
Quoted 16 lines
arch/arm/mach-at91/at91sam926x_time.c static void at91sam926x_pit_suspend(void) · line 247
Quoted 11 lines
arch/arm/mach-at91/at91sam926x_time.c +5
-4void __init at91sam926x_ioremap_pit (u32 addr) { - pit_base_addr =ioremap (addr,16 ); - -if (!pit_base_addr) -panic ("Impossible to ioremap PIT\n" ); +if (of_at91sam926x_pit_init () <0 ) { + pit_base_addr =ioremap (addr,16 ); +if (!pit_base_addr) +panic ("Impossible to ioremap PIT\n" ); + }This is not what I meant. I meant call either
at91sam926x_ioremap_pitorof_at91sam926x_pit_init. Don't nest the calls and keep the OF and non-OF init somewhat separate. The fact that you are passing in the physical address and then ignoring it for the OF case is what I have issue with.
the DT pure soc will pass NULL for soc that support both or only non of we pass the PHY addr
Best Regards,
J.
PATCH v4 1/1 ARM: at91: pit add DT support
On 01/09/2012 06:39 PM, Jean-Christophe PLAGNIOL-VILLARD :
Quoted 182 lines · Rob Herring
Quoted 164 lines · Nicolas Ferre
Quoted 163 lines
From: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Fall back to built-in values if an error occurs.
Signed-off-by Jean-Christophe PLAGNIOL-VILLARD <[email protected]>[nicolas.ferre at atmel.com: change error path and interrupts property handling]Signed-off-by Nicolas Ferre <[email protected]>Reviewed-by Jamie Iles <[email protected]>Acked-by Rob Herring <[email protected]>---
v4: - changeof_at91sam926x_pit_init()return value usage logic as
suggested by Rob Herring
-irq_of_parse_and_map()returns 0 on error: change test according to Grant Likely note.v3: - use
irq_of_parse_and_map()for handling irq numbers specified by DT.
Correction proposed by Jamie Iles.v2: - new specification of irq numbers in DT (due to modification of AIC code)
- new error path inof_at91sam926x_pit_init()
- fall back to built-in values if an error occurs
- use ofof_property_read_u32()to get irq property.../devicetree/bindings/arm/atmel-at91.txt | 8 +++ arch/arm/boot/dts/at91sam9g20.dtsi | 5 ++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++ arch/arm/mach-at91/at91sam926x_time.c | 60 ++++++++++++++++++-- 4 files changed, 73 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txtDocumentation/devicetree/bindings/arm/atmel-at91.txt new file +8
-0@@ -0,0 +1,8 @@ +Atmel AT91 device tree bindings. +================================ + +PIT Timer required properties: +- compatible: Should be "atmel,at91sam9260-pit" +- reg: Should contain registers location and length +- interrupts: Should contain interrupt for the PIT which is the IRQ line + shared across all System Controller members.arch/arm/boot/dts/at91sam9g20.dtsi +5
-0@@ -57,6 +57,11 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio";arch/arm/boot/dts/at91sam9g45.dtsi +6
-0@@ -58,6 +58,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; + dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>;arch/arm/mach-at91/at91sam926x_time.c +49
-2@@ -14,6 +14,9 @@#include <linux/kernel.h> #include <linux/clk.h> #include <linux/clockchips.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> #include <asm/mach/time.h> @@ -133,7 +136,8 @@ static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)static struct irqaction at91sam926x_pit_irq = { .name ="at91_tick" , .flags =IRQF_SHARED |IRQF_DISABLED |IRQF_TIMER |IRQF_IRQPOLL , - .handler = at91sam926x_pit_interrupt + .handler = at91sam926x_pit_interrupt, + .irq =AT91_ID_SYS , };static void at91sam926x_pit_reset (void )@@ -149,6 +153,49 @@ static void at91sam926x_pit_reset(void)pit_write (AT91_PIT_MR , (pit_cycle -1 ) |AT91_PIT_PITEN ); } +#ifdef CONFIG_OF +static struct of_device_id timer_ids[] = { + { .compatible ="atmel,at91sam9260-pit" }, + {/* sentinel */ } +}; + +static int __init of_at91sam926x_pit_init (void ) +{ +struct device_node *np; +int ret; + + np =of_find_matching_node (NULL , timer_ids); +if (!np) + goto err; + + pit_base_addr =of_iomap (np,0 ); +if (!pit_base_addr) + goto node_err; + +/* Get the interrupts property */ + ret =irq_of_parse_and_map (np,0 ); +if (!ret) + goto ioremap_err; + at91sam926x_pit_irq.irq = ret; + +of_node_put (np); + +return 0 ; + +ioremap_err: +iounmap (pit_base_addr); +node_err: +of_node_put (np); +err: +return -EINVAL ; +} +#else +static int __init of_at91sam926x_pit_init (void ) +{ +return -EINVAL ; +} +#endif +/* * Set up both clocksource and clockevent support. */ @@ -177,7 +224,7 @@ static void __init at91sam926x_pit_init(void)clocksource_register_hz (&pit_clk, pit_rate);/* Set up irq handler */ -setup_irq (AT91_ID_SYS , &at91sam926x_pit_irq); +setup_irq (at91sam926x_pit_irq.irq, &at91sam926x_pit_irq);/* Set up and register clockevents */ pit_clkevt.mult =div_sc (pit_rate,NSEC_PER_SEC , pit_clkevt.shift);@@ -193,10 +240,11 @@ static void at91sam926x_pit_suspend(void)Quoted 16 lines
arch/arm/mach-at91/at91sam926x_time.c static void at91sam926x_pit_suspend(void) · line 247
Quoted 11 lines
arch/arm/mach-at91/at91sam926x_time.c +5
-4void __init at91sam926x_ioremap_pit (u32 addr) { - pit_base_addr =ioremap (addr,16 ); - -if (!pit_base_addr) -panic ("Impossible to ioremap PIT\n" ); +if (of_at91sam926x_pit_init () <0 ) { + pit_base_addr =ioremap (addr,16 ); +if (!pit_base_addr) +panic ("Impossible to ioremap PIT\n" ); + }This is not what I meant. I meant call either
at91sam926x_ioremap_pitorof_at91sam926x_pit_init. Don't nest the calls and keep the OF and non-OF init somewhat separate. The fact that you are passing in the physical address and then ignoring it for the OF case is what I have issue with.
Quoted 2 lines
the DT pure soc will pass NULL for soc that support both or only non of we pass the PHY addr
Yes, but don't your prefer to have another call that we can use as the interface? In the future we will only have DT enabled SoC so maintaining the need for this NULL parameter does not make much sense...
Bye,
Signature · 1 line
Nicolas Ferre
PATCH v5 1/2 ARM: at91: pit add DT support
In reply to Nicolas FerreFrom: Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
Retreive registers address and IRQ from device tree entry. Called from at91_dt_init_irq() so that timers are up-n-running when timers initialization will occur.
---
Hi,
I have removed Rob's "Acked-by" and Jamie's "Reviewed-by" because I have changed the way PIT is initialized. Do you want to put it back?
v5: - of_at91sam926x_pit_init() now called from at91sam926x_pit_init()
which is the init function of the system tick timer.
- get out of at91sam926x_ioremap_pit() if matching node found in DT.
v4: - change of_at91sam926x_pit_init() return value usage logic as
suggested by Rob Herring
- irq_of_parse_and_map() returns 0 on error: change test according to Grant Likely note.
v3: - use irq_of_parse_and_map() for handling irq numbers specified by DT.
Correction proposed by Jamie Iles.
v2: - new specification of irq numbers in DT (due to modification of AIC code)
- new error path in of_at91sam926x_pit_init()
- fall back to built-in values if an error occurs
- use of of_property_read_u32() to get irq property
.../devicetree/bindings/arm/atmel-at91.txt | 8 +++ arch/arm/boot/dts/at91sam9g20.dtsi | 6 ++ arch/arm/boot/dts/at91sam9g45.dtsi | 6 ++ arch/arm/mach-at91/at91sam926x_time.c | 63 +++++++++++++++++++- arch/arm/mach-at91/at91sam9x5.c | 2 - arch/arm/mach-at91/generic.h | 1 + 6 files changed, 82 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/atmel-at91.txt
Documentation/devicetree/bindings/arm/atmel-at91.txt new file +8 -0
@@ -0,0 +1,8 @@ +Atmel AT91 device tree bindings. +================================ + +PIT Timer required properties: +- compatible: Should be "atmel,at91sam9260-pit" +- reg: Should contain registers location and length +- interrupts: Should contain interrupt for the PIT which is the IRQ line + shared across all System Controller members.
arch/arm/boot/dts/at91sam9g20.dtsi +6 -0
@@ -57,6 +57,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; + pioA: gpio at fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>;
arch/arm/boot/dts/at91sam9g45.dtsi +6 -0
@@ -58,6 +58,12 @@ reg = <0xfffff000 0x200>; }; + pit: timer at fffffd30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffd30 0xf>; + interrupts = <1 4>; + }; + dma: dma-controller at ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>;
arch/arm/mach-at91/at91sam926x_time.c +61 -2
99 lines not on this page · raw message
arch/arm/mach-at91/at91sam9x5.c +0 -2
@@ -301,8 +301,6 @@ static void __init at91sam9x5_map_io(void)static void __init at91sam9x5_ioremap_registers (void ) { -if (of_at91sam926x_pit_init () <0 ) -panic ("Impossible to find PIT\n" ); }void __init at91sam9x5_initialize (void )
arch/arm/mach-at91/generic.h +1 -0
@@ -33,6 +33,7 @@ extern int __init at91_aic_of_init(struct device_node *node,/* Timer */ struct sys_timer ;extern struct sys_timer at91rm9200_timer; +extern int of_at91sam926x_pit_init (void );extern void at91sam926x_ioremap_pit (u32 addr);extern struct sys_timer at91sam926x_timer;extern struct sys_timer at91x40_timer;
Signature · 1 line
1.7.9
PATCH v5 2/2 ARM: at91/pit: add traces in case of error
Traces related to IRQ management are useful for timers in case of non-working IRQ subsystem (switch to irq_domain for instance).
--- arch/arm/mach-at91/at91sam926x_time.c | 9 +++++++-- 1 files changed, 7 insertions(+), 2 deletions(-)
arch/arm/mach-at91/at91sam926x_time.c +7 -2
@@ -174,8 +174,10 @@ int __init of_at91sam926x_pit_init(void)/* Get the interrupts property */ ret =irq_of_parse_and_map (np,0 ); -if (!ret) +if (!ret) { +pr_crit ("AT91: PIT: Unable to get IRQ from DT\n" ); goto ioremap_err; + } at91sam926x_pit_irq.irq = ret;of_node_put (np);
@@ -203,6 +205,7 @@ static void __init at91sam926x_pit_init(void) {unsigned long pit_rate;unsigned bits; +int ret;/* For device tree enabled device: initialize here */ of_at91sam926x_pit_init ();
@@ -227,7 +230,9 @@ static void __init at91sam926x_pit_init(void)clocksource_register_hz (&pit_clk, pit_rate);/* Set up irq handler */ -setup_irq (at91sam926x_pit_irq.irq, &at91sam926x_pit_irq); + ret =setup_irq (at91sam926x_pit_irq.irq, &at91sam926x_pit_irq); +if (ret) +pr_crit ("AT91: PIT: Unable to setup IRQ\n" );/* Set up and register clockevents */ pit_clkevt.mult =div_sc (pit_rate,NSEC_PER_SEC , pit_clkevt.shift);
Signature · 1 line
1.7.9