mmc: access mxcmmc from mx31 boards

PATCH Superseded Helmut Raiger 2 participants 27 messages Oct 24, 2011 – Jan 30, 2012

Subsystems (3)

Arm (32-bit) Arm i.MX and Layerscape MMC, SD and SDIO

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Helmut Raiger

author

2011-10-24 16:45 UTC #0 lore raw

PATCH 1/1 mmc: access mxcmmc from mx31 boards

This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards.
Both use the same SD controller, but have different clock set-ups.
The clock access was renamed to imx_get_mmcclk() to allow both architectures to provide their respective clock. Pins, base address and prototypes for board_init_mmc() are provided.

Signed-off-by Helmut Raiger <[email protected]>

---
 arch/arm/cpu/arm1136/mx31/generic.c        |    5 +++++
 arch/arm/include/asm/arch-mx27/clock.h     |    1 +
 arch/arm/include/asm/arch-mx31/clock.h     |    1 +
 arch/arm/include/asm/arch-mx31/imx-regs.h  |   11 +++++++++++
 arch/arm/include/asm/arch-mx31/sys_proto.h |    3 ++-
 drivers/mmc/mxcmmc.c                       |    8 +++-----
 6 files changed, 23 insertions(+), 6 deletions(-)

arch/arm/cpu/arm1136/mx31/generic.c +5 -0

index 7ab5631..3008099 100644
@@ -99,6 +99,11 @@ u32 imx_get_uartclk(void)
 	return mxc_get_clock(MXC_UART_CLK);
 }
 
+u32 imx_get_mmcclk(void)
+{
+	return mxc_get_clock(MXC_IPG_PERCLK);
+}
+
 void mx31_gpio_mux(unsigned long mode)
 {
 	unsigned long reg, shift, tmp;

arch/arm/include/asm/arch-mx27/clock.h +1 -0

index 7e9c7aa..2c078d5 100644
@@ -38,5 +38,6 @@ ulong imx_get_ahbclk(void);
 
 #define imx_get_uartclk imx_get_perclk1
 #define imx_get_fecclk imx_get_ahbclk
+#define imx_get_mmcclk imx_get_perclk2
 
 #endif /* __ASM_ARCH_CLOCK_H */

arch/arm/include/asm/arch-mx31/clock.h +1 -0

index 0270d96..c420d63 100644
@@ -34,6 +34,7 @@ enum mxc_clock {
 
 unsigned int mxc_get_clock(enum mxc_clock clk);
 extern u32 imx_get_uartclk(void);
+extern u32 imx_get_mmcclk(void);
 extern void mx31_gpio_mux(unsigned long mode);
 extern void mx31_set_pad(enum iomux_pins pin, u32 config);

arch/arm/include/asm/arch-mx31/imx-regs.h +11 -0

index f7a39f1..448a2c8 100644
@@ -646,6 +646,13 @@ struct esdc_regs {
 #define MUX_CTL_CSPI3_SPI_RDY	0x0e
 #define MUX_CTL_CSPI3_MOSI		0x13
 
+#define MUX_CTL_SD1_DATA1	0x18
+#define MUX_CTL_SD1_DATA2	0x19
+#define MUX_CTL_SD1_DATA3	0x1a
+#define MUX_CTL_SD1_CMD		0x1d
+#define MUX_CTL_SD1_CLK		0x1e
+#define MUX_CTL_SD1_DATA0	0x1f
+
 #define MUX_CTL_USBH2_DATA1	0x40
 #define MUX_CTL_USBH2_DIR	0x44
 #define MUX_CTL_USBH2_STP	0x45

@@ -792,6 +799,10 @@ struct esdc_regs {
  */
 #define NFC_BASE_ADDR	0xB8000000
 
+/* SD card controller */
+#define SDHC1_BASE_ADDR	0x50004000
+#define SDHC2_BASE_ADDR	0x50008000
+
 /*
  * Internal RAM (16KB)
  */

arch/arm/include/asm/arch-mx31/sys_proto.h +2 -1

index 7600303..bdce074 100644
@@ -31,5 +31,6 @@ struct mxc_weimcs {
 };
 
 void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs);
-
+/* for mx27 in mxcmmc.h, but another file for a single prototype ? */
+int mxc_mmc_init(bd_t *bis);
 #endif

drivers/mmc/mxcmmc.c +3 -5

index ab1fc82..fbceb46 100644
@@ -25,9 +25,7 @@
 #include <mmc.h>
 #include <asm/errno.h>
 #include <asm/io.h>
-#ifdef CONFIG_MX27
 #include <asm/arch/clock.h>
-#endif
 
 #define DRIVER_NAME "mxc-mmc"

@@ -422,7 +420,7 @@ static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios)
 {
 	unsigned int divider;
 	int prescaler = 0;
-	unsigned long clk_in = imx_get_perclk2();
+	unsigned long clk_in = imx_get_mmcclk();
 
 	while (prescaler <= 0x800) {
 		for (divider = 1; divider <= 0xF; divider++) {

@@ -508,8 +506,8 @@ static int mxcmci_initialize(bd_t *bis)
 
 	mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
 
-	mmc->f_min = imx_get_perclk2() >> 7;
-	mmc->f_max = imx_get_perclk2() >> 1;
+	mmc->f_min = imx_get_mmcclk() >> 7;
+	mmc->f_max = imx_get_mmcclk() >> 1;
 
 	mmc->b_max = 0;

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Stefano Babic

2011-10-25 09:43 UTC #1 lore raw

PATCH 1/1 mmc: access mxcmmc from mx31 boards

Quoted 24 lines · Helmut Raiger

This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards.
Both use the same SD controller, but have different clock set-ups.
The clock access was renamed to imx_get_mmcclk() to allow both architectures to provide their respective clock. Pins, base address and prototypes for board_init_mmc() are provided.
Signed-off-by Helmut Raiger <[email protected]>
---
 arch/arm/cpu/arm1136/mx31/generic.c        |    5 +++++
 arch/arm/include/asm/arch-mx27/clock.h     |    1 +
 arch/arm/include/asm/arch-mx31/clock.h     |    1 +
 arch/arm/include/asm/arch-mx31/imx-regs.h  |   11 +++++++++++
 arch/arm/include/asm/arch-mx31/sys_proto.h |    3 ++-
 drivers/mmc/mxcmmc.c                       |    8 +++-----
 6 files changed, 23 insertions(+), 6 deletions(-)
arch/arm/cpu/arm1136/mx31/generic.c +0 -0
index 7ab5631..3008099 100644

arch/arm/cpu/arm1136/mx31/generic.c u32 imx_get_uartclk(void) · line 105

Quoted 7 lines

arch/arm/cpu/arm1136/mx31/generic.c +4 -0

@@ -99,6 +99,11 @@ u32 imx_get_uartclk(void)
 	return mxc_get_clock(MXC_UART_CLK);
 }
 
+u32 imx_get_mmcclk(void)
+{
+	return mxc_get_clock(MXC_IPG_PERCLK);
+}

This introduces a new function and does not use the mxc_get_clock() that hides the specific implementation for each SOC (if any).

The common way to get a clock for a i.MX SOC is to call the mxc_get_clock() passing as parameter the peripheral (in this case, the MMC) you need. In this way we hide if a SOC is using perclk and another one perclk2 or maybe something else. We have MXC_CSPI_CLK, MXC_UART_CLK, MXC_FEC_CLK,MXC_USB_CLK.

There is already MXC_ESDHC_CLK (check in the mx35 directory). Please use the same interface and add only the case for MXC_ESDHC_CLK to the SOC you requires.

arch/arm/include/asm/arch-mx27/clock.h ulong imx_get_ahbclk(void); · line 41

Quoted 13 lines

arch/arm/cpu/arm1136/mx31/generic.c +1 -0

+
 void mx31_gpio_mux(unsigned long mode)
 {
 	unsigned long reg, shift, tmp;

arch/arm/include/asm/arch-mx27/clock.h +1 -0

index 7e9c7aa..2c078d5 100644
@@ -38,5 +38,6 @@ ulong imx_get_ahbclk(void);
 
 #define imx_get_uartclk imx_get_perclk1
 #define imx_get_fecclk imx_get_ahbclk
+#define imx_get_mmcclk imx_get_perclk2

also for i.mx27 we should call mxc_get_clk()

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

Helmut Raiger

author

2011-10-27 12:19 UTC #2 lore raw

PATCH v2 1/1 mmc: access mxcmmc from mx31 boards

This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use.

Signed-off-by Helmut Raiger <[email protected]>

---
V2:
- uses mxc_get_clock() instead of old imx_get_XXX functions
- moved mx27 stuff to mxc_get_clock() aswell

 arch/arm/cpu/arm1136/mx31/generic.c        |    1 +
 arch/arm/cpu/arm926ejs/mx27/generic.c      |   35 ++++++++++++++++++++-------
 arch/arm/include/asm/arch-mx27/clock.h     |   22 +++++++----------
 arch/arm/include/asm/arch-mx31/clock.h     |    3 +-
 arch/arm/include/asm/arch-mx31/imx-regs.h  |   11 ++++++++
 arch/arm/include/asm/arch-mx31/sys_proto.h |    2 +-
 drivers/mmc/mxcmmc.c                       |    8 ++----
 7 files changed, 53 insertions(+), 29 deletions(-)

arch/arm/cpu/arm1136/mx31/generic.c +1 -0

index 4f27e25..136d4c9 100644
@@ -103,6 +103,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
 	case MXC_IPG_PERCLK:
 	case MXC_CSPI_CLK:
 	case MXC_UART_CLK:
+	case MXC_ESDHC_CLK:
 		return mx31_get_ipg_clk();
 	case MXC_IPU_CLK:
 		return mx31_get_hsp_clk();

arch/arm/cpu/arm926ejs/mx27/generic.c +26 -9

index 222a8e9..8964a75 100644
@@ -23,6 +23,7 @@
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
+#include <asm/arch/clock.h>
 #ifdef CONFIG_MXC_MMC
 #include <asm/arch/mxcmmc.h>
 #endif

@@ -34,7 +35,7 @@
  *  f = 2 * f_ref * --------------------
  *                        pd + 1
  */
-unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
+static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
 {
 	unsigned int mfi = (pll >> 10) & 0xf;
 	unsigned int mfn = pll & 0x3ff;

@@ -64,7 +65,7 @@ static ulong clk_in_26m(void)
 	}
 }
 
-ulong imx_get_mpllclk(void)
+static ulong imx_get_mpllclk(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 	ulong cscr = readl(&pll->cscr);

@@ -78,7 +79,7 @@ ulong imx_get_mpllclk(void)
 	return imx_decode_pll(readl(&pll->mpctl0), fref);
 }
 
-ulong imx_get_armclk(void)
+static ulong imx_get_armclk(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 	ulong cscr = readl(&pll->cscr);

@@ -93,7 +94,7 @@ ulong imx_get_armclk(void)
 	return lldiv(fref, div);
 }
 
-ulong imx_get_ahbclk(void)
+static ulong imx_get_ahbclk(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 	ulong cscr = readl(&pll->cscr);

@@ -105,7 +106,7 @@ ulong imx_get_ahbclk(void)
 	return lldiv(fref * 2, 3 * div);
 }
 
-ulong imx_get_spllclk(void)
+static __attribute__((unused)) ulong imx_get_spllclk(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 	ulong cscr = readl(&pll->cscr);

@@ -124,34 +125,50 @@ static ulong imx_decode_perclk(ulong div)
 	return lldiv((imx_get_mpllclk() * 2), (div * 3));
 }
 
-ulong imx_get_perclk1(void)
+static ulong imx_get_perclk1(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 
 	return imx_decode_perclk((readl(&pll->pcdr1) & 0x3f) + 1);
 }
 
-ulong imx_get_perclk2(void)
+static ulong imx_get_perclk2(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 
 	return imx_decode_perclk(((readl(&pll->pcdr1) >> 8) & 0x3f) + 1);
 }
 
-ulong imx_get_perclk3(void)
+static __attribute__((unused)) ulong imx_get_perclk3(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 
 	return imx_decode_perclk(((readl(&pll->pcdr1) >> 16) & 0x3f) + 1);
 }
 
-ulong imx_get_perclk4(void)
+static __attribute__((unused)) ulong imx_get_perclk4(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 
 	return imx_decode_perclk(((readl(&pll->pcdr1) >> 24) & 0x3f) + 1);
 }
 
+unsigned int mxc_get_clock(enum mxc_clock clk)
+{
+	switch (clk) {
+	case MXC_ARM_CLK:
+		return imx_get_armclk();
+	case MXC_UART_CLK:
+		return imx_get_perclk1();
+	case MXC_FEC_CLK:
+		return imx_get_ahbclk();
+	case MXC_ESDHC_CLK:
+		return imx_get_perclk2();
+	}
+	return -1;
+}
+
+
 #if defined(CONFIG_DISPLAY_CPUINFO)
 int print_cpuinfo (void)
 {

arch/arm/include/asm/arch-mx27/clock.h +9 ~~-13~~

index 7e9c7aa..fd062d3 100644
@@ -23,20 +23,16 @@
 
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
-unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref);
 
-ulong imx_get_mpllclk(void);
-ulong imx_get_armclk(void);
-ulong imx_get_spllclk(void);
-ulong imx_get_fclk(void);
-ulong imx_get_hclk(void);
-ulong imx_get_bclk(void);
-ulong imx_get_perclk1(void);
-ulong imx_get_perclk2(void);
-ulong imx_get_perclk3(void);
-ulong imx_get_ahbclk(void);
+enum mxc_clock {
+	MXC_ARM_CLK,
+	MXC_UART_CLK,
+	MXC_ESDHC_CLK,
+	MXC_FEC_CLK,
+};
 
-#define imx_get_uartclk imx_get_perclk1
-#define imx_get_fecclk imx_get_ahbclk
+unsigned int mxc_get_clock(enum mxc_clock clk);
+#define imx_get_uartclk() mxc_get_clock(MXC_UART_CLK)
+#define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK)
 
 #endif /* __ASM_ARCH_CLOCK_H */

arch/arm/include/asm/arch-mx31/clock.h +2 -1

index 253a0e1..852c19c 100644
@@ -30,7 +30,8 @@ enum mxc_clock {
 	MXC_IPG_PERCLK,
 	MXC_CSPI_CLK,
 	MXC_UART_CLK,
-	MXC_IPU_CLK
+	MXC_IPU_CLK,
+	MXC_ESDHC_CLK,
 };
 
 unsigned int mxc_get_clock(enum mxc_clock clk);

arch/arm/include/asm/arch-mx31/imx-regs.h +11 -0

index afdaa1c..2aa3697 100644
@@ -698,6 +698,13 @@ struct esdc_regs {
 #define MUX_CTL_CSPI3_SPI_RDY	0x0e
 #define MUX_CTL_CSPI3_MOSI		0x13
 
+#define MUX_CTL_SD1_DATA1	0x18
+#define MUX_CTL_SD1_DATA2	0x19
+#define MUX_CTL_SD1_DATA3	0x1a
+#define MUX_CTL_SD1_CMD		0x1d
+#define MUX_CTL_SD1_CLK		0x1e
+#define MUX_CTL_SD1_DATA0	0x1f
+
 #define MUX_CTL_USBH2_DATA1	0x40
 #define MUX_CTL_USBH2_DIR	0x44
 #define MUX_CTL_USBH2_STP	0x45

@@ -844,6 +851,10 @@ struct esdc_regs {
  */
 #define NFC_BASE_ADDR	0xB8000000
 
+/* SD card controller */
+#define SDHC1_BASE_ADDR	0x50004000
+#define SDHC2_BASE_ADDR	0x50008000
+
 /*
  * Internal RAM (16KB)
  */

arch/arm/include/asm/arch-mx31/sys_proto.h +1 -1

index 7600303..ded481c 100644
@@ -31,5 +31,5 @@ struct mxc_weimcs {
 };
 
 void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs);
-
+int mxc_mmc_init(bd_t *bis);
 #endif

drivers/mmc/mxcmmc.c +3 -5

index ab1fc82..ff2bb51 100644
@@ -25,9 +25,7 @@
 #include <mmc.h>
 #include <asm/errno.h>
 #include <asm/io.h>
-#ifdef CONFIG_MX27
 #include <asm/arch/clock.h>
-#endif
 
 #define DRIVER_NAME "mxc-mmc"

@@ -422,7 +420,7 @@ static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios)
 {
 	unsigned int divider;
 	int prescaler = 0;
-	unsigned long clk_in = imx_get_perclk2();
+	unsigned long clk_in = mxc_get_clock(MXC_ESDHC_CLK);
 
 	while (prescaler <= 0x800) {
 		for (divider = 1; divider <= 0xF; divider++) {

@@ -508,8 +506,8 @@ static int mxcmci_initialize(bd_t *bis)
 
 	mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
 
-	mmc->f_min = imx_get_perclk2() >> 7;
-	mmc->f_max = imx_get_perclk2() >> 1;
+	mmc->f_min = mxc_get_clock(MXC_ESDHC_CLK) >> 7;
+	mmc->f_max = mxc_get_clock(MXC_ESDHC_CLK) >> 1;
 
 	mmc->b_max = 0;

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Helmut Raiger

author

2011-11-02 07:02 UTC #3 lore raw

PATCH v2 1/1 imx: mmc: access mxcmmc from mx31 boards

Quoted 12 lines · Helmut Raiger

This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use.

Quoted 1 line

Signed-off-by Helmut Raiger<[email protected]>

I just re-titled the patch to make it visible for the imx community, it concerns i.MX27 and i.MX31, so mmc: is probably the wrong category anyway.

Helmut

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Helmut Raiger

author

2011-11-07 07:59 UTC #4 lore raw

PATCH v2 1/1 imx: mmc: access mxcmmc from mx31 boards

Quoted 13 lines · Helmut Raiger

Quoted 12 lines · Helmut Raiger
This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use.

Quoted 7 lines

Quoted 1 line
Signed-off-by Helmut Raiger<[email protected]>
I just re-titled the patch to make it visible for the imx community, it concerns i.MX27 and i.MX31, so mmc: is probably the wrong category anyway.
Helmut

Anything amiss?
Helmut

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Stefano Babic

2011-11-07 09:04 UTC #5 lore raw

PATCH v2 1/1 imx: mmc: access mxcmmc from mx31 boards

Quoted 14 lines · Helmut Raiger

Quoted 13 lines · Helmut Raiger
Quoted 12 lines · Helmut Raiger
This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use.

Quoted 7 lines

Quoted 7 lines
Quoted 1 line
Signed-off-by Helmut Raiger<[email protected]>
I just re-titled the patch to make it visible for the imx community, it concerns i.MX27 and i.MX31, so mmc: is probably the wrong category anyway.
Helmut

Hi Helmut,

Quoted 2 lines

Anything amiss?
Helmut

I have seen your message regarding your patch "tt01: add MMC and video support" asking to ignore it, and I have ignored this patch, too....

I will review it soo - however, there is no use case for MMC on the i.MX31 until you submit a patch for your board supporting MMC.

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

Helmut Raiger

author

2011-11-14 09:06 UTC #6 lore raw

PATCH v2 1/1 imx: mmc: access mxcmmc from mx31 boards

Quoted 25 lines · Stefano Babic

Quoted 14 lines · Helmut Raiger
Quoted 13 lines · Helmut Raiger
Quoted 12 lines · Helmut Raiger
This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use.
Quoted 6 lines
Quoted 6 lines
Quoted 1 line
Signed-off-by Helmut Raiger<[email protected]>
I just re-titled the patch to make it visible for the imx community, it concerns i.MX27 and i.MX31, so mmc: is probably the wrong category anyway.
Helmut
Hi Helmut,
Quoted 2 lines
Anything amiss?
Helmut

Quoted 9 lines

I have seen your message regarding your patch "tt01: add MMC and video support" asking to ignore it, and I have ignored this patch, too....
I will review it soo - however, there is no use case for MMC on the i.MX31 until you submit a patch for your board supporting MMC.
Best regards,
Stefano Babic

Hi,

Stefano I don't want to be pushing, but this sits here since 3
weeks, can I be of some help?
Concerning the TT-01 extension patch, I meant it has to wait until this patch is through.
So if you don't like the idea of having a patch no-one is using, simply apply both of them.
For your reference:

http://patchwork.ozlabs.org/patch/122139/ this one
http://patchwork.ozlabs.org/patch/122176/ board support
extension

Thanks in advance,
Helmut

Helmut

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Stefano Babic

2011-11-14 10:55 UTC #7 lore raw

PATCH v2 1/1 imx: mmc: access mxcmmc from mx31 boards

Quoted 3 lines · Helmut Raiger

Quoted 1 line
Hi,

Hi Helmut,

Quoted 2 lines

Stefano I don't want to be pushing, but this sits here since 3
weeks, can I be of some help?

in my answer I post the question about the fact there is no use case for this code until you will submit also the patch for your board adding MMC. So please resubmit both as patchset, else this single patch is as dead code, and this is not accepted in u-boot, even if it is a preparation for further patches - we cannot know if and then the follow up patches will be sent.

Quoted 2 lines

Concerning the TT-01 extension patch, I meant it has to wait until this patch is through.

No, we do not add code that is never compiled. And it is easier to see some problem in review if it is shown as the code is used.

Quoted 1 line

So if you don't like the idea of having a patch no-one is using,

Yes, I do not like it.

Quoted 7 lines

simply
apply both of them.
For your reference:
http://patchwork.ozlabs.org/patch/122139/ this one
http://patchwork.ozlabs.org/patch/122176/ board support
extension

Does it mean the last patch is ready for review ? Then I will go on with both.

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

Helmut Raiger

author

2011-11-14 15:37 UTC #8 lore raw

PATCH v2 1/1 imx: mmc: access mxcmmc from mx31 boards

Quoted 26 lines · Stefano Babic

Quoted 2 lines · Helmut Raiger
Hi,
Hi Helmut,
Quoted 2 lines
Stefano I don't want to be pushing, but this sits here since 3
weeks, can I be of some help?
in my answer I post the question about the fact there is no use case for this code until you will submit also the patch for your board adding MMC. So please resubmit both as patchset, else this single patch is as dead code, and this is not accepted in u-boot, even if it is a preparation for further patches - we cannot know if and then the follow up patches will be sent.
Quoted 2 lines
Concerning the TT-01 extension patch, I meant it has to wait until this patch is through.
No, we do not add code that is never compiled. And it is easier to see some problem in review if it is shown as the code is used.
Quoted 1 line
So if you don't like the idea of having a patch no-one is using,
Yes, I do not like it.
Quoted 4 lines
simply
apply both of them.
For your reference:

Quoted 9 lines

Quoted 3 lines
http://patchwork.ozlabs.org/patch/122139/ this one
http://patchwork.ozlabs.org/patch/122176/ board support
extension
Does it mean the last patch is ready for review ? Then I will go on with both.
Best regards,
Stefano Babic

Hi Stefan,

I will check the proposition you made for the board support
extension (which
removes the awkward HALE logo from the u-boot source tree, which didn't feel quite right
when I was adding it.)

So you may ignore these for now and I will send a patch set that contains both patches
with your suggested changes.

Thanx, Helmut

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Helmut Raiger

author

2012-01-11 13:59 UTC #9 lore raw

PATCH v3 1/1 mmc: access mxcmmc from mx31 boards

In reply to Stefano Babic

This is a resend of these patches
http://patchwork.ozlabs.org/patch/122139/ like this one
http://patchwork.ozlabs.org/patch/122176/ board support (including gfx)

They are rebased to the current master and the board support only adds MMC as opposed to the original patch that added some gfx support as-well. The actual mmc patch was not changed since V2.

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Helmut Raiger

author

2012-01-11 13:59 UTC #10 lore raw

PATCH 1/2 mmc: access mxcmmc from mx31 boards

Signed-off-by Helmut Raiger <[email protected]>

---

V3:
- rebased to current master
- added support in TT-01 board code for it (see other patch)
V2:
- uses mxc_get_clock() instead of old imx_get_XXX functions
- moved mx27 stuff to mxc_get_clock() aswell

 arch/arm/cpu/arm1136/mx31/generic.c        |    1 +
 arch/arm/cpu/arm926ejs/mx27/generic.c      |   35 ++++++++++++++++++++-------
 arch/arm/include/asm/arch-mx27/clock.h     |   22 +++++++----------
 arch/arm/include/asm/arch-mx31/clock.h     |    3 +-
 arch/arm/include/asm/arch-mx31/imx-regs.h  |   11 ++++++++
 arch/arm/include/asm/arch-mx31/sys_proto.h |    2 +-
 drivers/mmc/mxcmmc.c                       |    8 ++----
 7 files changed, 53 insertions(+), 29 deletions(-)

arch/arm/cpu/arm1136/mx31/generic.c +1 -0

index f458281..d60afc9 100644
@@ -101,6 +101,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
 	case MXC_IPG_PERCLK:
 	case MXC_CSPI_CLK:
 	case MXC_UART_CLK:
+	case MXC_ESDHC_CLK:
 		return mx31_get_ipg_clk();
 	case MXC_IPU_CLK:
 		return mx31_get_hsp_clk();

arch/arm/cpu/arm926ejs/mx27/generic.c +26 -9

index 222a8e9..8964a75 100644
@@ -23,6 +23,7 @@
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
+#include <asm/arch/clock.h>
 #ifdef CONFIG_MXC_MMC
 #include <asm/arch/mxcmmc.h>
 #endif

@@ -34,7 +35,7 @@
  *  f = 2 * f_ref * --------------------
  *                        pd + 1
  */
-unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
+static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
 {
 	unsigned int mfi = (pll >> 10) & 0xf;
 	unsigned int mfn = pll & 0x3ff;

@@ -64,7 +65,7 @@ static ulong clk_in_26m(void)
 	}
 }
 
-ulong imx_get_mpllclk(void)
+static ulong imx_get_mpllclk(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 	ulong cscr = readl(&pll->cscr);

@@ -78,7 +79,7 @@ ulong imx_get_mpllclk(void)
 	return imx_decode_pll(readl(&pll->mpctl0), fref);
 }
 
-ulong imx_get_armclk(void)
+static ulong imx_get_armclk(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 	ulong cscr = readl(&pll->cscr);

@@ -93,7 +94,7 @@ ulong imx_get_armclk(void)
 	return lldiv(fref, div);
 }
 
-ulong imx_get_ahbclk(void)
+static ulong imx_get_ahbclk(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 	ulong cscr = readl(&pll->cscr);

@@ -105,7 +106,7 @@ ulong imx_get_ahbclk(void)
 	return lldiv(fref * 2, 3 * div);
 }
 
-ulong imx_get_spllclk(void)
+static __attribute__((unused)) ulong imx_get_spllclk(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 	ulong cscr = readl(&pll->cscr);

@@ -124,34 +125,50 @@ static ulong imx_decode_perclk(ulong div)
 	return lldiv((imx_get_mpllclk() * 2), (div * 3));
 }
 
-ulong imx_get_perclk1(void)
+static ulong imx_get_perclk1(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 
 	return imx_decode_perclk((readl(&pll->pcdr1) & 0x3f) + 1);
 }
 
-ulong imx_get_perclk2(void)
+static ulong imx_get_perclk2(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 
 	return imx_decode_perclk(((readl(&pll->pcdr1) >> 8) & 0x3f) + 1);
 }
 
-ulong imx_get_perclk3(void)
+static __attribute__((unused)) ulong imx_get_perclk3(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 
 	return imx_decode_perclk(((readl(&pll->pcdr1) >> 16) & 0x3f) + 1);
 }
 
-ulong imx_get_perclk4(void)
+static __attribute__((unused)) ulong imx_get_perclk4(void)
 {
 	struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
 
 	return imx_decode_perclk(((readl(&pll->pcdr1) >> 24) & 0x3f) + 1);
 }
 
+unsigned int mxc_get_clock(enum mxc_clock clk)
+{
+	switch (clk) {
+	case MXC_ARM_CLK:
+		return imx_get_armclk();
+	case MXC_UART_CLK:
+		return imx_get_perclk1();
+	case MXC_FEC_CLK:
+		return imx_get_ahbclk();
+	case MXC_ESDHC_CLK:
+		return imx_get_perclk2();
+	}
+	return -1;
+}
+
+
 #if defined(CONFIG_DISPLAY_CPUINFO)
 int print_cpuinfo (void)
 {

arch/arm/include/asm/arch-mx27/clock.h +9 ~~-13~~

index 7e9c7aa..fd062d3 100644
@@ -23,20 +23,16 @@
 
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
-unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref);
 
-ulong imx_get_mpllclk(void);
-ulong imx_get_armclk(void);
-ulong imx_get_spllclk(void);
-ulong imx_get_fclk(void);
-ulong imx_get_hclk(void);
-ulong imx_get_bclk(void);
-ulong imx_get_perclk1(void);
-ulong imx_get_perclk2(void);
-ulong imx_get_perclk3(void);
-ulong imx_get_ahbclk(void);
+enum mxc_clock {
+	MXC_ARM_CLK,
+	MXC_UART_CLK,
+	MXC_ESDHC_CLK,
+	MXC_FEC_CLK,
+};
 
-#define imx_get_uartclk imx_get_perclk1
-#define imx_get_fecclk imx_get_ahbclk
+unsigned int mxc_get_clock(enum mxc_clock clk);
+#define imx_get_uartclk() mxc_get_clock(MXC_UART_CLK)
+#define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK)
 
 #endif /* __ASM_ARCH_CLOCK_H */

arch/arm/include/asm/arch-mx31/clock.h +2 -1

index 253a0e1..852c19c 100644
@@ -30,7 +30,8 @@ enum mxc_clock {
 	MXC_IPG_PERCLK,
 	MXC_CSPI_CLK,
 	MXC_UART_CLK,
-	MXC_IPU_CLK
+	MXC_IPU_CLK,
+	MXC_ESDHC_CLK,
 };
 
 unsigned int mxc_get_clock(enum mxc_clock clk);

arch/arm/include/asm/arch-mx31/imx-regs.h +11 -0

index 6a517dd..798cc74 100644
@@ -709,6 +709,13 @@ struct esdc_regs {
 #define MUX_CTL_CSPI3_SPI_RDY	0x0e
 #define MUX_CTL_CSPI3_MOSI		0x13
 
+#define MUX_CTL_SD1_DATA1	0x18
+#define MUX_CTL_SD1_DATA2	0x19
+#define MUX_CTL_SD1_DATA3	0x1a
+#define MUX_CTL_SD1_CMD		0x1d
+#define MUX_CTL_SD1_CLK		0x1e
+#define MUX_CTL_SD1_DATA0	0x1f
+
 #define MUX_CTL_USBH2_DATA1	0x40
 #define MUX_CTL_USBH2_DIR	0x44
 #define MUX_CTL_USBH2_STP	0x45

@@ -855,6 +862,10 @@ struct esdc_regs {
  */
 #define NFC_BASE_ADDR	0xB8000000
 
+/* SD card controller */
+#define SDHC1_BASE_ADDR	0x50004000
+#define SDHC2_BASE_ADDR	0x50008000
+
 /*
  * Internal RAM (16KB)
  */

arch/arm/include/asm/arch-mx31/sys_proto.h +1 -1

index 7600303..ded481c 100644
@@ -31,5 +31,5 @@ struct mxc_weimcs {
 };
 
 void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs);
-
+int mxc_mmc_init(bd_t *bis);
 #endif

drivers/mmc/mxcmmc.c +3 -5

index ab1fc82..ff2bb51 100644
@@ -25,9 +25,7 @@
 #include <mmc.h>
 #include <asm/errno.h>
 #include <asm/io.h>
-#ifdef CONFIG_MX27
 #include <asm/arch/clock.h>
-#endif
 
 #define DRIVER_NAME "mxc-mmc"

@@ -422,7 +420,7 @@ static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios)
 {
 	unsigned int divider;
 	int prescaler = 0;
-	unsigned long clk_in = imx_get_perclk2();
+	unsigned long clk_in = mxc_get_clock(MXC_ESDHC_CLK);
 
 	while (prescaler <= 0x800) {
 		for (divider = 1; divider <= 0xF; divider++) {

@@ -508,8 +506,8 @@ static int mxcmci_initialize(bd_t *bis)
 
 	mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
 
-	mmc->f_min = imx_get_perclk2() >> 7;
-	mmc->f_max = imx_get_perclk2() >> 1;
+	mmc->f_min = mxc_get_clock(MXC_ESDHC_CLK) >> 7;
+	mmc->f_max = mxc_get_clock(MXC_ESDHC_CLK) >> 1;
 
 	mmc->b_max = 0;

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Stefano Babic

2012-01-13 08:28 UTC #11 lore raw

PATCH 1/2 mmc: access mxcmmc from mx31 boards

Quoted 12 lines · Helmut Raiger

This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use.

Quoted 2 lines

Signed-off-by Helmut Raiger <[email protected]>
---

It looks fine to me.

Acked-by Stefano Babic <[email protected]>

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

Stefano Babic

2012-01-17 09:56 UTC #12 lore raw

PATCH 1/2 mmc: access mxcmmc from mx31 boards

In reply to Helmut Raiger

Quoted 12 lines · Helmut Raiger

This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use.

Quoted 3 lines

Signed-off-by Helmut Raiger <[email protected]>
---

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

Helmut Raiger

author

2012-01-11 13:59 UTC #13 lore raw

PATCH 2/2 tt01: add MMC support

In reply to Helmut Raiger

board_mmc_init() initializes the pins of SDHC1 and turns on V_MMC1 of the PMIC. Config adds support for EXT2 and FAT.

Signed-off-by Helmut Raiger <[email protected]>

---
 board/hale/tt01/tt01.c |   32 ++++++++++++++++++++++++++++++--
 include/configs/tt01.h |   12 ++++++++++++
 2 files changed, 42 insertions(+), 2 deletions(-)

board/hale/tt01/tt01.c +30 -2

index 2995c8f..4b6e770 100644
@@ -175,8 +175,6 @@ int board_init(void)
 
 int board_late_init(void)
 {
-	pmic_init();
-
 #ifdef CONFIG_HW_WATCHDOG
 	mxc_hw_watchdog_enable();
 #endif

@@ -190,6 +188,36 @@ int checkboard(void)
 	return 0;
 }
 
+#ifdef CONFIG_MXC_MMC
+int board_mmc_init(bd_t *bis)
+{
+	u32 val;
+	struct pmic *p;
+
+	/*
+	* this is the first driver to use the pmic, so call
+	* pmic_init() here. board_late_init() is too late for
+	* the MMC driver.
+	*/
+	pmic_init();
+	p = get_pmic();
+
+	/* configure pins for SDHC1 only */
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC));
+
+	/* turn on power V_MMC1, bit 18 is the VMMC1 enable */
+	if (pmic_reg_read(p, 33, &val) < 0)
+		pmic_reg_write(p, 33, val | 0x040000);
+
+	return mxc_mmc_init(bis);
+}
+#endif
+
 int board_eth_init(bd_t *bis)
 {
 	int rc = 0;

include/configs/tt01.h +12 -0

index a553712..6846816 100644
@@ -180,6 +180,11 @@
 #define CONFIG_SMC911X_BASE		(CS4_BASE+0x200000)
 #define CONFIG_SMC911X_16_BIT
 
+/* mmc driver */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_MXC_MCI_REGS_BASE       SDHC1_BASE_ADDR
 /*
  * Command definition
  */

@@ -229,6 +234,13 @@
 
 #define CONFIG_CMDLINE_EDITING
 
+/* MMC boot support */
+#define CONFIG_CMD_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+
 #define CONFIG_NAND_MXC
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_MAX_CHIPS		1

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Helmut Raiger

author

2012-01-12 10:15 UTC #14 lore raw

PATCH 2/2 imx: tt01: add MMC support

Hi,
this is imx related, subject wasn't taken from the compose email.

Helmut

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Stefano Babic

2012-01-13 08:32 UTC #15 lore raw

PATCH 2/2 tt01: add MMC support

In reply to Helmut Raiger

Quoted 6 lines · Helmut Raiger

board_mmc_init() initializes the pins of SDHC1 and turns on V_MMC1 of the PMIC. Config adds support for EXT2 and FAT.
Signed-off-by Helmut Raiger <[email protected]>
---

Hi Helmut,

board/hale/tt01/tt01.c int checkboard(void) · line 214

Quoted 3 lines

board/hale/tt01/tt01.c +3 -0

+
+	/* turn on power V_MMC1, bit 18 is the VMMC1 enable */
+	if (pmic_reg_read(p, 33, &val) < 0)

Sure do we have not constants to be used insstead of fixed values ? If not, can you add such constants ?

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [email protected]
=====================================================================

Helmut Raiger

author

2012-01-16 11:10 UTC #16 lore raw

PATCH v2 1/1 tt01: add MMC support

Modification suggested by Stefano.

[PATCH 1/2] fsl_pmic.h: add regulator mode 0 and 1 bits [PATCH 2/2] tt01: add MMC support

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Helmut Raiger

author

2012-01-16 11:10 UTC #17 lore raw

PATCH 1/2 fsl_pmic.h: add regulator mode 0 and 1 bits

Add bit definitions for register 32 and 33 of Freescale PMIC.

Signed-off-by Helmut Raiger <[email protected]>

---
 include/fsl_pmic.h |   52 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 52 insertions(+), 0 deletions(-)

include/fsl_pmic.h +52 -0

index 742f2e1..17e7b82 100644
@@ -102,6 +102,58 @@ enum {
 	PMIC_NUM_OF_REGS,
 };
 
+/* REG_MODE_0 */
+#define VAUDIOEN	(1 << 0)
+#define VAUDIOSTBY	(1 << 1)
+#define VAUDIOMODE	(1 << 2)
+#define VIOHIEN		(1 << 3)
+#define VIOHISTBY	(1 << 4)
+#define VIOHIMODE	(1 << 5)
+#define VIOLOEN		(1 << 6)
+#define VIOLOSTBY	(1 << 7)
+#define VIOLOMODE	(1 << 8)
+#define VDIGEN 		(1 << 9)
+#define VDIGSTBY	(1 << 10)
+#define VDIGMODE	(1 << 11)
+#define VGENEN		(1 << 12)
+#define VGENSTBY	(1 << 13)
+#define VGENMODE	(1 << 14)
+#define VRFDIGEN	(1 << 15)
+#define VRFDIGSTBY	(1 << 16)
+#define VRFDIGMODE	(1 << 17)
+#define VRFREFEN	(1 << 18)
+#define VRFREFSTBY	(1 << 19)
+#define VRFREFMODE	(1 << 20)
+#define VRFCPEN		(1 << 21)
+#define VRFCPSTBY	(1 << 22)
+#define VRFCPMODE	(1 << 23)
+
+/* REG_MODE_1 */
+#define VSIMEN		(1 << 0)
+#define VSIMSTBY	(1 << 1)
+#define VSIMMODE	(1 << 2)
+#define VESIMEN		(1 << 3)
+#define VESIMSTBY	(1 << 4)
+#define VESIMMODE	(1 << 5)
+#define VCAMEN		(1 << 6)
+#define VCAMSTBY	(1 << 7)
+#define VCAMMODE	(1 << 8)
+#define VRFBGEN		(1 << 9)
+#define VRFBGSTBY	(1 << 10)
+#define VVIBEN		(1 << 11)
+#define VRF1EN		(1 << 12)
+#define VRF1STBY	(1 << 13)
+#define VRF1MODE	(1 << 14)
+#define VRF2EN		(1 << 15)
+#define VRF2STBY	(1 << 16)
+#define VRF2MODE	(1 << 17)
+#define VMMC1EN		(1 << 18)
+#define VMMC1STBY	(1 << 19)
+#define VMMC1MODE	(1 << 20)
+#define VMMC2EN		(1 << 21)
+#define VMMC2STBY	(1 << 22)
+#define VMMC2MODE	(1 << 23)
+
 /* REG_POWER_MISC */
 #define GPO1EN		(1 << 6)
 #define GPO1STBY	(1 << 7)

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Stefano Babic

2012-01-17 10:12 UTC #18 lore raw

PATCH 1/2 fsl_pmic.h: add regulator mode 0 and 1 bits

Quoted 7 lines · Helmut Raiger

Add bit definitions for register 32 and 33 of Freescale PMIC.
Signed-off-by Helmut Raiger <[email protected]>
---
 include/fsl_pmic.h |   52 ++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 52 insertions(+), 0 deletions(-)

Hi Helmut,

include/fsl_pmic.h enum { · line 107

Quoted 11 lines

include/fsl_pmic.h +3 -0

index 742f2e1..17e7b82 100644
@@ -102,6 +102,58 @@ enum {
 	PMIC_NUM_OF_REGS,
 };
 
+/* REG_MODE_0 */
+#define VAUDIOEN	(1 << 0)
+#define VAUDIOSTBY	(1 << 1)

No, this is not correct. I explain it better. Freescale's PMIC that we currently support have the same register names, but their layout differs. What you are defining here is valid for the MC13783, but conflicts with the mc13892.

See the comments inside fsl_pmic.h:

/*
* The registers of different PMIC has the same meaning
* but the bit positions of the fields can differ or
* some fields has a meaning only on some devices.
* You have to check with the internal SPI bitmap
* (see Freescale Documentation) to set the registers
* for the device you are using
*/

I checked the REG_0 registers in both PMIC and they differ. The way to do is to have a pmic specific header file with the bit definitions. We have already include/mc13892.h, and you can add include/mc13783.h with the constants you need.

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: [email protected]
=====================================================================

Helmut Raiger

author

2012-01-18 10:41 UTC #19 lore raw

PATCH v3 1/2 mc13783.h: create and add regulator mode 0 and 1

Add bit definitions for register 32 and 33 of Freescale MC13783.

Signed-off-by Helmut Raiger <[email protected]>

---

V3: moved change from fsl_pmic.h to mc13783.h (mc13892 differs!)
V2: pmic_reg_(read|write) use constants from fsl_pmic.h now

 include/mc13783.h |   80 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 80 insertions(+), 0 deletions(-)
 create mode 100644 include/mc13783.h

include/mc13783.h new file +80 -0

new file mode 100644
index 0000000..5e41c3e
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2011
+ * Helmut Raiger, HALE electronic GmbH, helmut.raiger at hale.at
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#ifndef __MC13783_H__
+#define __MC13783_H__
+
+/* REG_MODE_0 */
+#define VAUDIOEN	(1 << 0)
+#define VAUDIOSTBY	(1 << 1)
+#define VAUDIOMODE	(1 << 2)
+#define VIOHIEN		(1 << 3)
+#define VIOHISTBY	(1 << 4)
+#define VIOHIMODE	(1 << 5)
+#define VIOLOEN		(1 << 6)
+#define VIOLOSTBY	(1 << 7)
+#define VIOLOMODE	(1 << 8)
+#define VDIGEN 		(1 << 9)
+#define VDIGSTBY	(1 << 10)
+#define VDIGMODE	(1 << 11)
+#define VGENEN		(1 << 12)
+#define VGENSTBY	(1 << 13)
+#define VGENMODE	(1 << 14)
+#define VRFDIGEN	(1 << 15)
+#define VRFDIGSTBY	(1 << 16)
+#define VRFDIGMODE	(1 << 17)
+#define VRFREFEN	(1 << 18)
+#define VRFREFSTBY	(1 << 19)
+#define VRFREFMODE	(1 << 20)
+#define VRFCPEN		(1 << 21)
+#define VRFCPSTBY	(1 << 22)
+#define VRFCPMODE	(1 << 23)
+
+/* REG_MODE_1 */
+#define VSIMEN		(1 << 0)
+#define VSIMSTBY	(1 << 1)
+#define VSIMMODE	(1 << 2)
+#define VESIMEN		(1 << 3)
+#define VESIMSTBY	(1 << 4)
+#define VESIMMODE	(1 << 5)
+#define VCAMEN		(1 << 6)
+#define VCAMSTBY	(1 << 7)
+#define VCAMMODE	(1 << 8)
+#define VRFBGEN		(1 << 9)
+#define VRFBGSTBY	(1 << 10)
+#define VVIBEN		(1 << 11)
+#define VRF1EN		(1 << 12)
+#define VRF1STBY	(1 << 13)
+#define VRF1MODE	(1 << 14)
+#define VRF2EN		(1 << 15)
+#define VRF2STBY	(1 << 16)
+#define VRF2MODE	(1 << 17)
+#define VMMC1EN		(1 << 18)
+#define VMMC1STBY	(1 << 19)
+#define VMMC1MODE	(1 << 20)
+#define VMMC2EN		(1 << 21)
+#define VMMC2STBY	(1 << 22)
+#define VMMC2MODE	(1 << 23)
+
+#endif

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Helmut Raiger

author

2012-01-18 10:41 UTC #20 lore raw

PATCH v3 2/2 tt01: add MMC support

board_mmc_init() initializes the pins of SDHC1 and turns on V_MMC1 of the PMIC. Config adds support for EXT2 and FAT.

Signed-off-by Helmut Raiger <[email protected]>

---
V3: moved change from fsl_pmic.h to mc13783.h (mc13892 differs!)
V2: pmic_reg_(read|write) use constants from fsl_pmic.h now

 board/hale/tt01/tt01.c |   55 ++++++++++++++++++++++++++++++++++++++++++++++-
 include/configs/tt01.h |   12 ++++++++++
 2 files changed, 65 insertions(+), 2 deletions(-)

board/hale/tt01/tt01.c +53 -2

index 2995c8f..bcbe5ec 100644
@@ -26,6 +26,8 @@
 #include <netdev.h>
 #include <command.h>
 #include <pmic.h>
+#include <fsl_pmic.h>
+#include <mc13783.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>

@@ -175,8 +177,6 @@ int board_init(void)
 
 int board_late_init(void)
 {
-	pmic_init();
-
 #ifdef CONFIG_HW_WATCHDOG
 	mxc_hw_watchdog_enable();
 #endif

@@ -190,6 +190,36 @@ int checkboard(void)
 	return 0;
 }
 
+#ifdef CONFIG_MXC_MMC
+int board_mmc_init(bd_t *bis)
+{
+	u32 val;
+	struct pmic *p;
+
+	/*
+	* this is the first driver to use the pmic, so call
+	* pmic_init() here. board_late_init() is too late for
+	* the MMC driver.
+	*/
+	pmic_init();
+	p = get_pmic();
+
+	/* configure pins for SDHC1 only */
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC));
+
+	/* turn on power V_MMC1 */
+	if (pmic_reg_read(p, REG_MODE_1, &val) < 0)
+		pmic_reg_write(p, REG_MODE_1, val | VMMC1EN);
+
+	return mxc_mmc_init(bis);
+}
+#endif
+
 int board_eth_init(bd_t *bis)
 {
 	int rc = 0;

@@ -198,3 +228,24 @@ int board_eth_init(bd_t *bis)
 #endif
 	return rc;
 }
+
+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+void video_get_info_str(int line_number, char *info)
+{
+	u32 srev = get_cpu_rev();
+
+	switch (line_number) {
+	case 2:
+		sprintf(info, " CPU  : Freescale i.MX31 rev %d.%d%s@%d MHz",
+				(srev & 0xF0) >> 4, (srev & 0x0F),
+				((srev & 0x8000) ? " unknown" : ""),
+				mxc_get_clock(MXC_ARM_CLK) / 1000000);
+		break;
+	case 3:
+		strcpy(info, " " BOARD_STRING);
+		break;
+	default:
+		info[0] = 0;
+	}
+}
+#endif

include/configs/tt01.h +12 -0

index a553712..6846816 100644
@@ -180,6 +180,11 @@
 #define CONFIG_SMC911X_BASE		(CS4_BASE+0x200000)
 #define CONFIG_SMC911X_16_BIT
 
+/* mmc driver */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_MXC_MCI_REGS_BASE       SDHC1_BASE_ADDR
 /*
  * Command definition
  */

@@ -229,6 +234,13 @@
 
 #define CONFIG_CMDLINE_EDITING
 
+/* MMC boot support */
+#define CONFIG_CMD_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+
 #define CONFIG_NAND_MXC
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_MAX_CHIPS		1

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Stefano Babic

2012-01-18 12:37 UTC #21 lore raw

PATCH v3 2/2 tt01: add MMC support

Quoted 6 lines · Helmut Raiger

board_mmc_init() initializes the pins of SDHC1 and turns on V_MMC1 of the PMIC. Config adds support for EXT2 and FAT.
Signed-off-by Helmut Raiger <[email protected]>
---

Hi Helmut,

board/hale/tt01/tt01.c int board_eth_init(bd_t *bis) · line 233

Quoted 2 lines

board/hale/tt01/tt01.c +2 -0

+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+void video_get_info_str(int line_number, char *info)

This has nothing with MCC. Please extend your commit message to explain you are also adding this feature.

board/hale/tt01/tt01.c int board_eth_init(bd_t *bis) · line 242

Quoted 9 lines

board/hale/tt01/tt01.c +9 -0

+{
+	u32 srev = get_cpu_rev();
+
+	switch (line_number) {
+	case 2:
+		sprintf(info, " CPU  : Freescale i.MX31 rev %d.%d%s at %d MHz",
+				(srev & 0xF0) >> 4, (srev & 0x0F),
+				((srev & 0x8000) ? " unknown" : ""),
+				mxc_get_clock(MXC_ARM_CLK) / 1000000);

I know it is only one line, but it is not related to your board because it is really print_cpuinfo() into a buffer. So this cpu part should be moved into the SOC place (arch/arm/cpu/arm1136/mx31/generic.c).

However, which is the real reason to do that ? I have supposed that setting video as stdout it is enough to redirect all output to the LCD, and then the usual print_cpuinfo() works, without adding / duplicating function that already use printf() for the output.

I do not see a lot of boards implementing video_get_info_str(), and I understand that it is a way to customize the output. However, is it the correct way ? Does print_cpuinfo() not work if redirect to the video ? I have added Anatolji (video maintainer in CC) to get his opinion.

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

Helmut Raiger

author

2012-01-19 07:21 UTC #22 lore raw

PATCH v3 2/2 tt01: add MMC support

Quoted 6 lines · Stefano Babic

Hi Helmut,
board/hale/tt01/tt01.c int board_eth_init(bd_t *bis) · line 233
Quoted 2 lines
board/hale/tt01/tt01.c +2 -0
+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+void video_get_info_str(int line_number, char *info)
This has nothing with MCC. Please extend your commit message to explain you are also adding this feature.

I simply mixed in a different branch, which was not the intention, sorry for the noise, I'll resend.

Quoted 18 lines

board/hale/tt01/tt01.c int board_eth_init(bd_t *bis) · line 242
Quoted 9 lines
board/hale/tt01/tt01.c +9 -0
+{
+	u32 srev = get_cpu_rev();
+
+	switch (line_number) {
+	case 2:
+		sprintf(info, " CPU  : Freescale i.MX31 rev %d.%d%s at %d MHz",
+				(srev&  0xF0)>>  4, (srev&  0x0F),
+				((srev&  0x8000) ? " unknown" : ""),
+				mxc_get_clock(MXC_ARM_CLK) / 1000000);
I know it is only one line, but it is not related to your board because it is really print_cpuinfo() into a buffer. So this cpu part should be moved into the SOC place (arch/arm/cpu/arm1136/mx31/generic.c).
However, which is the real reason to do that ? I have supposed that setting video as stdout it is enough to redirect all output to the LCD, and then the usual print_cpuinfo() works, without adding / duplicating function that already use printf() for the output.

Quoted 8 lines

I do not see a lot of boards implementing video_get_info_str(), and I understand that it is a way to customize the output. However, is it the correct way ? Does print_cpuinfo() not work if redirect to the video ? I have added Anatolji (video maintainer in CC) to get his opinion.
Best regards,
Stefano Babic

Actually the above is only a glitch, the output sits there since more than a year (probably adjusted at some point).
I just didn't realize that print_cpuinfo does the same.
I'll be contributing the video stuff in one of the next patches for tt01 and fix it then, so thanks for your review, even though I'll remove it from this patch.

Helmut

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Helmut Raiger

author

2012-01-19 07:27 UTC #23 lore raw

PATCH v4 1/1 tt01: add MMC support

board_mmc_init() initializes the pins of SDHC1 and turns on V_MMC1 of the PMIC. Config adds support for EXT2 and FAT.

Signed-off-by Helmut Raiger <[email protected]>

---
V4: removed unrelated video_get_info_str() stuff
V3: moved change from fsl_pmic.h to mc13783.h (mc13892 differs!)
V2: pmic_reg_(read|write) use constants from fsl_pmic.h now

 board/hale/tt01/tt01.c |   34 ++++++++++++++++++++++++++++++++--
 include/configs/tt01.h |   12 ++++++++++++
 2 files changed, 44 insertions(+), 2 deletions(-)

board/hale/tt01/tt01.c +32 -2

index 2995c8f..ed3fa6e 100644
@@ -26,6 +26,8 @@
 #include <netdev.h>
 #include <command.h>
 #include <pmic.h>
+#include <fsl_pmic.h>
+#include <mc13783.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>

@@ -175,8 +177,6 @@ int board_init(void)
 
 int board_late_init(void)
 {
-	pmic_init();
-
 #ifdef CONFIG_HW_WATCHDOG
 	mxc_hw_watchdog_enable();
 #endif

@@ -190,6 +190,36 @@ int checkboard(void)
 	return 0;
 }
 
+#ifdef CONFIG_MXC_MMC
+int board_mmc_init(bd_t *bis)
+{
+	u32 val;
+	struct pmic *p;
+
+	/*
+	* this is the first driver to use the pmic, so call
+	* pmic_init() here. board_late_init() is too late for
+	* the MMC driver.
+	*/
+	pmic_init();
+	p = get_pmic();
+
+	/* configure pins for SDHC1 only */
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC));
+
+	/* turn on power V_MMC1 */
+	if (pmic_reg_read(p, REG_MODE_1, &val) < 0)
+		pmic_reg_write(p, REG_MODE_1, val | VMMC1EN);
+
+	return mxc_mmc_init(bis);
+}
+#endif
+
 int board_eth_init(bd_t *bis)
 {
 	int rc = 0;

include/configs/tt01.h +12 -0

index a553712..6846816 100644
@@ -180,6 +180,11 @@
 #define CONFIG_SMC911X_BASE		(CS4_BASE+0x200000)
 #define CONFIG_SMC911X_16_BIT
 
+/* mmc driver */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_MXC_MCI_REGS_BASE       SDHC1_BASE_ADDR
 /*
  * Command definition
  */

@@ -229,6 +234,13 @@
 
 #define CONFIG_CMDLINE_EDITING
 
+/* MMC boot support */
+#define CONFIG_CMD_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+
 #define CONFIG_NAND_MXC
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_MAX_CHIPS		1

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Stefano Babic

2012-01-30 14:35 UTC #24 lore raw

PATCH v4 1/1 tt01: add MMC support

Quoted 6 lines · Helmut Raiger

board_mmc_init() initializes the pins of SDHC1 and turns on V_MMC1 of the PMIC. Config adds support for EXT2 and FAT.
Signed-off-by Helmut Raiger <[email protected]>
---

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

Stefano Babic

2012-01-30 14:38 UTC #25 lore raw

PATCH v3 1/2 mc13783.h: create and add regulator mode 0 and 1

In reply to Helmut Raiger

Quoted 4 lines · Helmut Raiger

Add bit definitions for register 32 and 33 of Freescale MC13783.
Signed-off-by Helmut Raiger <[email protected]>
---

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

Helmut Raiger

author

2012-01-16 11:10 UTC #26 lore raw

PATCH 2/2 tt01: add MMC support

In reply to Helmut Raiger

board_mmc_init() initializes the pins of SDHC1 and turns on V_MMC1 of the PMIC. Config adds support for EXT2 and FAT.

Signed-off-by Helmut Raiger <[email protected]>

---
V2: pmic_reg_(read|write) use constants from fsl_pmic.h now

 board/hale/tt01/tt01.c |   54 ++++++++++++++++++++++++++++++++++++++++++++++-
 include/configs/tt01.h |   12 ++++++++++
 2 files changed, 64 insertions(+), 2 deletions(-)

board/hale/tt01/tt01.c +52 -2

index 2995c8f..10f4548 100644
@@ -26,6 +26,7 @@
 #include <netdev.h>
 #include <command.h>
 #include <pmic.h>
+#include <fsl_pmic.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>

@@ -175,8 +176,6 @@ int board_init(void)
 
 int board_late_init(void)
 {
-	pmic_init();
-
 #ifdef CONFIG_HW_WATCHDOG
 	mxc_hw_watchdog_enable();
 #endif

@@ -190,6 +189,36 @@ int checkboard(void)
 	return 0;
 }
 
+#ifdef CONFIG_MXC_MMC
+int board_mmc_init(bd_t *bis)
+{
+	u32 val;
+	struct pmic *p;
+
+	/*
+	* this is the first driver to use the pmic, so call
+	* pmic_init() here. board_late_init() is too late for
+	* the MMC driver.
+	*/
+	pmic_init();
+	p = get_pmic();
+
+	/* configure pins for SDHC1 only */
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC));
+	mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC));
+
+	/* turn on power V_MMC1 */
+	if (pmic_reg_read(p, REG_MODE_1, &val) < 0)
+		pmic_reg_write(p, REG_MODE_1, val | VMMC1EN);
+
+	return mxc_mmc_init(bis);
+}
+#endif
+
 int board_eth_init(bd_t *bis)
 {
 	int rc = 0;

@@ -198,3 +227,24 @@ int board_eth_init(bd_t *bis)
 #endif
 	return rc;
 }
+
+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+void video_get_info_str(int line_number, char *info)
+{
+	u32 srev = get_cpu_rev();
+
+	switch (line_number) {
+	case 2:
+		sprintf(info, " CPU  : Freescale i.MX31 rev %d.%d%s@%d MHz",
+				(srev & 0xF0) >> 4, (srev & 0x0F),
+				((srev & 0x8000) ? " unknown" : ""),
+				mxc_get_clock(MXC_ARM_CLK) / 1000000);
+		break;
+	case 3:
+		strcpy(info, " " BOARD_STRING);
+		break;
+	default:
+		info[0] = 0;
+	}
+}
+#endif

include/configs/tt01.h +12 -0

index a553712..6846816 100644
@@ -180,6 +180,11 @@
 #define CONFIG_SMC911X_BASE		(CS4_BASE+0x200000)
 #define CONFIG_SMC911X_16_BIT
 
+/* mmc driver */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_MXC_MCI_REGS_BASE       SDHC1_BASE_ADDR
 /*
  * Command definition
  */

@@ -229,6 +234,13 @@
 
 #define CONFIG_CMDLINE_EDITING
 
+/* MMC boot support */
+#define CONFIG_CMD_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+
 #define CONFIG_NAND_MXC
 #define CONFIG_SYS_MAX_NAND_DEVICE		1
 #define CONFIG_SYS_NAND_MAX_CHIPS		1

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