Create generic board init for ARM, x86, PPC

index f30b9fc..df1c7c6 100644
@@ -37,7 +37,7 @@
 #define _U_BOOT_H_	1
 
 typedef struct bd_info {
-    int			bi_baudrate;	/* serial console baudrate */
+	unsigned long	bi_baudrate;	/* serial console baudrate */
     unsigned long	bi_ip_addr;	/* IP Address */
     ulong	        bi_arch_number;	/* unique id for this board */
     ulong	        bi_boot_params;	/* where this board expects params */

index 67cb0da..ddb0afc 100644
@@ -361,7 +361,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	print_eth(0);
 	printf("ip_addr     = %pI4\n", &bd->bi_ip_addr);
 #endif
-	printf("baudrate    = %d bps\n", bd->bi_baudrate);
+	printf("baudrate    = %ld bps\n", bd->bi_baudrate);
 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 	print_num("TLB addr", gd->tlb_addr);
 #endif

index 26450eb..dd42209 100644
@@ -49,7 +49,7 @@ typedef struct bd_info {
 	unsigned short	bi_ethspeed;	/* Ethernet speed in Mbps */
 	unsigned long	bi_intfreq;	/* Internal Freq, in MHz */
 	unsigned long	bi_busfreq;	/* Bus Freq, in MHz */
-	unsigned int	bi_baudrate;	/* Console Baudrate */
+	unsigned long	bi_baudrate;	/* Console Baudrate */
 	unsigned long   bi_boot_params;	/* where this board expects params */
 	struct				/* RAM configuration */
 	{

index ddb0afc..ac8e78d 100644
@@ -422,7 +422,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	printf("ip_addr     = %pI4\n", &bd->bi_ip_addr);
 	print_mhz("ethspeed",	    bd->bi_ethspeed);
 #endif
-	printf("baudrate    = %d bps\n", bd->bi_baudrate);
+	printf("baudrate    = %ld bps\n", bd->bi_baudrate);
 
 	return 0;
 }

index ac8e78d..cdc595e 100644
@@ -369,7 +369,9 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	print_num("reloc off", gd->reloc_off);
 	print_num("irq_sp", gd->irq_sp);	/* irq stack pointer */
 	print_num("sp start ", gd->start_addr_sp);
+#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
 	print_num("FB base  ", gd->fb_base);
+#endif
 	return 0;
 }
 

index 495a694..7f812dc 100644
@@ -81,7 +81,7 @@ void sc520_udelay(unsigned long usec)
 	long temp;
 
 	temp = readw(&sc520_mmcr->swtmrmilli);
-	temp = readw(&sc520_mmcr->swtmrmicro);
+	temp += readw(&sc520_mmcr->swtmrmicro);
 
 	do {
 		m += readw(&sc520_mmcr->swtmrmilli);

index 429fe1b..2f26470 100644
@@ -178,11 +178,6 @@ void show_boot_progress(int val)
 
 int last_stage_init(void)
 {
-	int minor;
-	int major;
-
-	major = minor = 0;
-
 	outb(0x00, LED_LATCH_ADDRESS);
 
 	register_timer_isr(enet_timer_isr);

index 9b757d4..b12bdd8 100644
@@ -234,4 +234,12 @@ static inline phys_addr_t virt_to_phys(void * vaddr)
 	return (phys_addr_t)(vaddr);
 }
 
+/*
+ * TODO: The kernel offers some more advanced versions of barriers, it might
+ * have some advantages to use them instead of the simple one here.
+ */
+#define dmb()		__asm__ __volatile__ ("" : : : "memory")
+#define __iormb()	dmb()
+#define __iowmb()	dmb()
+
 #endif

index 56ac9fe..d246fd8 100644
@@ -318,4 +318,12 @@ static inline phys_addr_t virt_to_phys(void * vaddr)
 #endif
 }
 
+/*
+ * TODO: The kernel offers some more advanced versions of barriers, it might
+ * have some advantages to use them instead of the simple one here.
+ */
+#define dmb()		__asm__ __volatile__ ("" : : : "memory")
+#define __iormb()	dmb()
+#define __iowmb()	dmb()
+
 #endif

new file mode 100644
index 0000000..6199926
@@ -0,0 +1,115 @@
+/*
+ * (C) Copyright 2002-2010
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef	__ASM_GENERIC_GBL_DATA_H
+#define __ASM_GENERIC_GBL_DATA_H
+/*
+ * The following data structure is placed in some memory which is
+ * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
+ * some locked parts of the data cache) to allow for a minimum set of
+ * global variables during system initialization (until we have set
+ * up the memory controller so that we can use RAM).
+ *
+ * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t)
+ *
+ * sjg at chromium.org: Well it would be nice to have a generic one of these
+ * since so many fields are similar. But it means that everyone architecture
+ * will want to add its own nutty fields. Perhaps that is no bad thing since
+ * it shows up inconsistences and might produce downward pressure on the
+ * number of fields.
+ */
+
+#ifndef __ASSEMBLY__
+typedef struct global_data {
+	bd_t		*bd;
+	unsigned long	flags;
+	unsigned long	baudrate;
+#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
+	unsigned long	fb_base;	/* Base address of framebuffer mem */
+#endif
+#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+	unsigned long	post_log_word;  /* Record POST activities */
+	unsigned long	post_log_res; /* success of POST test */
+	unsigned long	post_init_f_time;  /* When post_init_f started */
+#endif
+	unsigned long	have_console;	/* serial_init() was called */
+#ifdef CONFIG_PRE_CONSOLE_BUFFER
+	unsigned long	precon_buf_idx;	/* Pre-Console buffer index */
+#endif
+	unsigned long	env_addr;	/* Address  of Environment struct */
+	unsigned long	env_valid;	/* Checksum of Environment valid? */
+	/* Here begins ARM-specific things. Needs discussion */
+#ifdef CONFIG_AT91FAMILY
+	/* "static data" needed by at91's clock.c */
+	unsigned long	cpu_clk_rate_hz;
+	unsigned long	main_clk_rate_hz;
+	unsigned long	mck_rate_hz;
+	unsigned long	plla_rate_hz;
+	unsigned long	pllb_rate_hz;
+	unsigned long	at91_pllb_usb_init;
+#endif
+#ifdef CONFIG_ARM
+	/* "static data" needed by most of timer.c on ARM platforms */
+	unsigned long	timer_rate_hz;
+	unsigned long	tbl;
+	unsigned long	tbu;
+	unsigned long long	timer_reset_value;
+	unsigned long	lastinc;
+#endif
+#ifdef CONFIG_IXP425
+	unsigned long	timestamp;
+#endif
+	/* TODO: is this the same as relocaddr, or something else? */
+	unsigned long	dest_addr;	/* Post-relocation address of U-Boot */
+	unsigned long	dest_addr_sp;
+	unsigned long	ram_top;	/* Top address of RAM used by U-Boot */
+
+	unsigned long	relocaddr;	/* Start address of U-Boot in RAM */
+	phys_size_t	ram_size;	/* RAM size */
+	unsigned long	mon_len;	/* monitor len */
+	unsigned long	irq_sp;		/* irq stack pointer */
+	unsigned long	start_addr_sp;	/* start_addr_stackpointer */
+	unsigned long	reloc_off;
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+	unsigned long	tlb_addr;
+#endif
+	struct global_data *new_gd;	/* relocated global data */
+	const void	*fdt_blob;	/* Our device tree, NULL if none */
+	void		**jt;		/* jump table */
+	char		env_buf[32];	/* buffer for getenv() before reloc. */
+} gd_t;
+#endif
+
+/*
+ * Global Data Flags
+ */
+#define	GD_FLG_RELOC		0x00001	/* Code was relocated to RAM	   */
+#define	GD_FLG_DEVINIT		0x00002	/* Devices have been initialized   */
+#define	GD_FLG_SILENT		0x00004	/* Silent mode			   */
+#define	GD_FLG_POSTFAIL		0x00008	/* Critical POST test failed	   */
+#define	GD_FLG_POSTSTOP		0x00010	/* POST seqeunce aborted	   */
+#define	GD_FLG_LOGINIT		0x00020	/* Log Buffer has been initialized */
+#define GD_FLG_DISABLE_CONSOLE	0x00040	/* Disable console (in & out)	   */
+#define GD_FLG_ENV_READY	0x00080	/* Env. imported into hash table   */
+
+#endif /* __ASM_GENERIC_GBL_DATA_H */

new file mode 100644
index 0000000..98a8a21
@@ -0,0 +1,155 @@
+/*
+ * (C) Copyright 2000 - 2002
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ ********************************************************************
+ * NOTE: This header file defines an interface to U-Boot. Including
+ * this (unmodified) header file in another file is considered normal
+ * use of U-Boot, and does *not* fall under the heading of "derived
+ * work".
+ ********************************************************************
+ */
+
+#ifndef __ASM_GENERIC_U_BOOT_H__
+#define __ASM_GENERIC_U_BOOT_H__
+
+/*
+ * Board information passed to Linux kernel from U-Boot
+ *
+ * include/asm-ppc/u-boot.h
+ */
+
+#ifndef __ASSEMBLY__
+
+typedef struct bd_info {
+	unsigned long	bi_memstart;	/* start of DRAM memory */
+	phys_size_t	bi_memsize;	/* size	 of DRAM memory in bytes */
+	unsigned long	bi_flashstart;	/* start of FLASH memory */
+	unsigned long	bi_flashsize;	/* size	 of FLASH memory */
+	unsigned long	bi_flashoffset; /* reserved area for startup monitor */
+	unsigned long	bi_sramstart;	/* start of SRAM memory */
+	unsigned long	bi_sramsize;	/* size	 of SRAM memory */
+#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) \
+	|| defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
+	unsigned long	bi_immr_base;	/* base of IMMR register */
+#endif
+#if defined(CONFIG_MPC5xxx)
+	unsigned long	bi_mbar_base;	/* base of internal registers */
+#endif
+#if defined(CONFIG_MPC83xx)
+	unsigned long	bi_immrbar;
+#endif
+#if defined(CONFIG_MPC8220)
+	unsigned long	bi_mbar_base;	/* base of internal registers */
+	unsigned long   bi_inpfreq;     /* Input Freq, In MHz */
+	unsigned long   bi_pcifreq;     /* PCI Freq, in MHz */
+	unsigned long   bi_pevfreq;     /* PEV Freq, in MHz */
+	unsigned long   bi_flbfreq;     /* Flexbus Freq, in MHz */
+	unsigned long   bi_vcofreq;     /* VCO Freq, in MHz */
+#endif
+	unsigned long	bi_bootflags;	/* boot / reboot flag (Unused) */
+	unsigned long	bi_ip_addr;	/* IP Address */
+	unsigned char	bi_enetaddr[6];	/* OLD: see README.enetaddr */
+	unsigned short	bi_ethspeed;	/* Ethernet speed in Mbps */
+	unsigned long	bi_intfreq;	/* Internal Freq, in MHz */
+	unsigned long	bi_busfreq;	/* Bus Freq, in MHz */
+#if defined(CONFIG_CPM2)
+	unsigned long	bi_cpmfreq;	/* CPM_CLK Freq, in MHz */
+	unsigned long	bi_brgfreq;	/* BRG_CLK Freq, in MHz */
+	unsigned long	bi_sccfreq;	/* SCC_CLK Freq, in MHz */
+	unsigned long	bi_vco;		/* VCO Out from PLL, in MHz */
+#endif
+#if defined(CONFIG_MPC512X)
+	unsigned long	bi_ipsfreq;	/* IPS Bus Freq, in MHz */
+#endif /* CONFIG_MPC512X */
+#if defined(CONFIG_MPC5xxx)
+	unsigned long	bi_ipbfreq;	/* IPB Bus Freq, in MHz */
+	unsigned long	bi_pcifreq;	/* PCI Bus Freq, in MHz */
+#endif
+	unsigned long	bi_baudrate;	/* Console Baudrate */
+#if defined(CONFIG_405)   || \
+		defined(CONFIG_405GP) || \
+		defined(CONFIG_405CR) || \
+		defined(CONFIG_405EP) || \
+		defined(CONFIG_405EZ) || \
+		defined(CONFIG_405EX) || \
+		defined(CONFIG_440)
+	unsigned char	bi_s_version[4];	/* Version of this structure */
+	unsigned char	bi_r_version[32];	/* Version of the ROM (AMCC) */
+	unsigned int	bi_procfreq;	/* CPU (Internal) Freq, in Hz */
+	unsigned int	bi_plb_busfreq;	/* PLB Bus speed, in Hz */
+	unsigned int	bi_pci_busfreq;	/* PCI Bus speed, in Hz */
+	unsigned char	bi_pci_enetaddr[6];	/* PCI Ethernet MAC address */
+#endif
+#if defined(CONFIG_HYMOD)
+	hymod_conf_t	bi_hymod_conf;	/* hymod configuration information */
+#endif
+
+#ifdef CONFIG_HAS_ETH1
+	unsigned char   bi_enet1addr[6];	/* OLD: see README.enetaddr */
+#endif
+#ifdef CONFIG_HAS_ETH2
+	unsigned char	bi_enet2addr[6];	/* OLD: see README.enetaddr */
+#endif
+#ifdef CONFIG_HAS_ETH3
+	unsigned char   bi_enet3addr[6];	/* OLD: see README.enetaddr */
+#endif
+#ifdef CONFIG_HAS_ETH4
+	unsigned char   bi_enet4addr[6];	/* OLD: see README.enetaddr */
+#endif
+#ifdef CONFIG_HAS_ETH5
+	unsigned char   bi_enet5addr[6];	/* OLD: see README.enetaddr */
+#endif
+
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
+		defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \
+		defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+		defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+		defined(CONFIG_460EX) || defined(CONFIG_460GT)
+	unsigned int	bi_opbfreq;		/* OPB clock in Hz */
+	int		bi_iic_fast[2];		/* Use fast i2c mode */
+#endif
+#if defined(CONFIG_NX823)
+	unsigned char	bi_sernum[8];
+#endif
+#if defined(CONFIG_4xx)
+#if defined(CONFIG_440GX) || \
+		defined(CONFIG_460EX) || defined(CONFIG_460GT)
+	int		bi_phynum[4];           /* Determines phy mapping */
+	int		bi_phymode[4];          /* Determines phy mode */
+#elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440)
+	int		bi_phynum[2];           /* Determines phy mapping */
+	int		bi_phymode[2];          /* Determines phy mode */
+#else
+	int		bi_phynum[1];           /* Determines phy mapping */
+	int		bi_phymode[1];          /* Determines phy mode */
+#endif
+#endif /* defined(CONFIG_4xx) */
+	ulong	        bi_arch_number;	/* unique id for this board */
+	ulong	        bi_boot_params;	/* where this board expects params */
+#ifdef CONFIG_NR_DRAM_BANKS
+	struct {			/* RAM configuration */
+		ulong start;
+		ulong size;
+	} bi_dram[CONFIG_NR_DRAM_BANKS];
+#endif /* CONFIG_NR_DRAM_BANKS */
+} bd_t;
+
+#endif /* __ASSEMBLY__ */
+
+#endif	/* __ASM_GENERIC_U_BOOT_H__ */

new file mode 100644
index 0000000..62c68f0
@@ -0,0 +1,124 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* Taken from Linux kernel */
+
+#ifndef _ASM_GENERIC_SECTIONS_H_
+#define _ASM_GENERIC_SECTIONS_H_
+
+/* References to section boundaries */
+
+extern char _text[], _stext[], _etext[];
+extern char _data[], _sdata[], _edata[];
+extern char __bss_start[], __bss_stop[];
+extern char __init_begin[], __init_end[];
+extern char _sinittext[], _einittext[];
+extern char _end[];
+extern char __per_cpu_load[], __per_cpu_start[], __per_cpu_end[];
+extern char __kprobes_text_start[], __kprobes_text_end[];
+extern char __entry_text_start[], __entry_text_end[];
+extern char __initdata_begin[], __initdata_end[];
+extern char __start_rodata[], __end_rodata[];
+
+/* Start and end of .ctors section - used for constructor calls. */
+extern char __ctors_start[], __ctors_end[];
+
+/* function descriptor handling (if any).  Override
+ * in asm/sections.h */
+#ifndef dereference_function_descriptor
+#define dereference_function_descriptor(p) (p)
+#endif
+
+/* random extra sections (if any).  Override
+ * in asm/sections.h */
+#ifndef arch_is_kernel_text
+static inline int arch_is_kernel_text(unsigned long addr)
+{
+	return 0;
+}
+#endif
+
+#ifndef arch_is_kernel_data
+static inline int arch_is_kernel_data(unsigned long addr)
+{
+	return 0;
+}
+#endif
+
+#include <elf.h>
+
+/* U-Boot-specific things begin here */
+
+/* Start of U-Boot text region */
+extern char __text_start[];
+
+/* This marks the end of the text region which must be relocated */
+extern char __image_copy_end[];
+
+/*
+ * This is the U-Boot entry point - prior to relocation it should be same
+ * as __text_start
+ */
+extern void _start(void);
+
+/*
+ * ARM needs to use offsets for symbols, since the values of some symbols
+ * are not resolved prior to relocation (and are just 0). Maybe this can be
+ * resolved, or maybe other architectures are similar, iwc this should be
+ * promoted to an architecture option.
+ */
+#ifdef CONFIG_ARM
+#define CONFIG_SYS_SYM_OFFSETS
+#endif
+
+#ifdef CONFIG_SYS_SYM_OFFSETS
+/* Start/end of the relocation entries, as an offset from _start */
+extern ulong _rel_dyn_start_ofs;
+extern ulong _rel_dyn_end_ofs;
+
+/* Start/end of the relocation symbol table, as an offset from _start */
+extern ulong _dynsym_start_ofs;
+
+/* End of the region to be relocated, as an offset form _start */
+extern ulong _image_copy_end_ofs;
+
+extern ulong _bss_start_ofs;	/* BSS start relative to _start */
+extern ulong _bss_end_ofs;		/* BSS end relative to _start */
+extern ulong _end_ofs;		/* end of image relative to _start */
+
+extern ulong _TEXT_BASE;	/* code start */
+
+#else /* don't use offsets: */
+
+/* Exports from the Linker Script */
+extern ulong __data_end;
+extern ulong __rel_dyn_start;
+extern ulong __rel_dyn_end;
+extern ulong __bss_end;
+
+extern ulong _TEXT_BASE;	/* code start */
+
+#endif
+
+/* Some link scripts put a double underscore on the end, so for now... */
+#define __bss_end__ __bss_end
+
+#endif /* _ASM_GENERIC_SECTIONS_H_ */

index 4ca75f9..7cfae9b 100644
@@ -30,12 +30,8 @@
 #define _U_BOOT_ARM_H_	1
 
 /* for the following variables, see start.S */
-extern ulong _bss_start_ofs;	/* BSS start relative to _start */
-extern ulong _bss_end_ofs;		/* BSS end relative to _start */
-extern ulong _end_ofs;		/* end of image relative to _start */
 extern ulong IRQ_STACK_START;	/* top of IRQ stack */
 extern ulong FIQ_STACK_START;	/* top of FIQ stack */
-extern ulong _TEXT_BASE;	/* code start */
 extern ulong _datarel_start_ofs;
 extern ulong _datarelrolocal_start_ofs;
 extern ulong _datarellocal_start_ofs;

index 3d78274..a95edb8 100644
@@ -39,6 +39,7 @@
  */
 
 #include <common.h>
+#include <asm-generic/sections.h>
 #include <command.h>
 #include <malloc.h>
 #include <stdio_dev.h>

index 5522bf0..641d46f 100644
@@ -28,6 +28,7 @@
  */
 
 #include <common.h>
+#include <asm-generic/sections.h>
 #include <linux/byteorder/swab.h>
 
 

index 5522bf0..641d46f 100644
@@ -28,6 +28,7 @@
  */
 
 #include <common.h>
+#include <asm-generic/sections.h>
 #include <linux/byteorder/swab.h>
 
 

index a6add6a..aa1a7a6 100644
@@ -203,16 +203,15 @@ void __attribute__((unused)) dummy(void)
 #include <_exports.h>
 }
 
-extern unsigned long __bss_start, _end;
+#include <asm-generic/sections.h>
 
 void app_startup(char * const *argv)
 {
-	unsigned char * cp = (unsigned char *) &__bss_start;
+	char *cp = __bss_start;
 
 	/* Zero out BSS */
-	while (cp < (unsigned char *)&_end) {
+	while (cp < _end)
 		*cp++ = 0;
-	}
 
 #if defined(CONFIG_X86)
 	/* x86 does not have a dedicated register for passing global_data */

new file mode 100644
index 0000000..9e54fa5
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+typedef int (*init_fnc_t)(void);
+
+int initcall_run_list(init_fnc_t init_sequence[]);

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index ef24bc0..94f316c 100644
@@ -305,6 +305,7 @@ static int reserve_uboot(void)
 	return 0;
 }
 
+#ifndef CONFIG_SPL_BUILD
 /* reserve memory for malloc() area */
 static int reserve_malloc(void)
 {

@@ -324,6 +325,7 @@ static int reserve_board(void)
 			sizeof(bd_t), gd->dest_addr_sp);
 	return 0;
 }
+#endif
 
 static int setup_machine(void)
 {

@@ -342,6 +344,7 @@ static int reserve_global_data(void)
 	return 0;
 }
 
+#ifndef CONFIG_SPL_BUILD
 static int reserve_stacks(void)
 {
 	/* setup stack pointer for exceptions */

@@ -359,6 +362,17 @@ static int reserve_stacks(void)
 
 	return 0;
 }
+#endif
+
+#ifdef CONFIG_SPL_BUILD
+static int reserve_stacks_spl(void)
+{
+	/* Why not -= ? */
+	gd->dest_addr_sp += 128;	/* leave 32 words for abort-stack */
+	gd->irq_sp = gd->dest_addr_sp;
+	return 0;
+}
+#endif
 
 static int display_new_sp(void)
 {

@@ -458,11 +472,17 @@ static init_fnc_t init_sequence_f[] = {
 	reserve_lcd,
 #endif
 	reserve_uboot,
+#ifndef CONFIG_SPL_BUILD
 	reserve_malloc,
 	reserve_board,
+#endif
 	setup_machine,
 	reserve_global_data,
+#ifdef CONFIG_SPL_BUILD
+	reserve_stacks_spl,
+#else
 	reserve_stacks,
+#endif
 	setup_baud_rate,
 	display_new_sp,
 	jump_to_copy,

index c3ff789..aced4fe 100644
@@ -23,6 +23,11 @@
 
 #ifndef	__ASM_GBL_DATA_H
 #define __ASM_GBL_DATA_H
+
+#ifdef CONFIG_SYS_GENERIC_BOARD
+/* Use the generic board which requires a unified global_data */
+#include <asm-generic/global_data.h>
+#else
 /*
  * The following data structure is placed in some memory which is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -98,6 +103,8 @@ typedef	struct	global_data {
 #define GD_FLG_DISABLE_CONSOLE	0x00040	/* Disable console (in & out)		*/
 #define GD_FLG_ENV_READY	0x00080	/* Environment imported into hash table	*/
 
+#endif /* nCONFIG_SYS_GENERIC_BOARD */
+
 #define DECLARE_GLOBAL_DATA_PTR     register volatile gd_t *gd asm ("r8")
 
 #endif /* __ASM_GBL_DATA_H */

index df1c7c6..c6290ef 100644
@@ -36,6 +36,12 @@
 #ifndef _U_BOOT_H_
 #define _U_BOOT_H_	1
 
+#ifdef CONFIG_SYS_GENERIC_BOARD
+/* Use the generic board which requires a unified bd_info */
+#include <asm-generic/u-boot.h>
+#else
+
+#ifndef __ASSEMBLY__
 typedef struct bd_info {
 	unsigned long	bi_baudrate;	/* serial console baudrate */
     unsigned long	bi_ip_addr;	/* IP Address */

@@ -47,6 +53,9 @@ typedef struct bd_info {
 	ulong size;
     }			bi_dram[CONFIG_NR_DRAM_BANKS];
 } bd_t;
+#endif
+
+#endif /* nCONFIG_SYS_GENERIC_BOARD */
 
 /* For image.h:image_check_target_arch() */
 #define IH_ARCH_DEFAULT IH_ARCH_ARM

index 94f316c..2aa2cf1 100644
@@ -108,8 +108,13 @@ static int display_text_info(void)
 {
 	ulong bss_start, bss_end;
 
+#ifdef CONFIG_SYS_SYM_OFFSETS
 	bss_start = _bss_start_ofs + _TEXT_BASE;
 	bss_end = _bss_end_ofs + _TEXT_BASE;
+#else
+	bss_start = (ulong)&__bss_start;
+	bss_end = (ulong)&__bss_end;
+#endif
 	debug("U-Boot code: %08X -> %08lX  BSS: -> %08lX\n",
 	      CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
 

@@ -186,7 +191,11 @@ static int zero_global_data(void)
 
 static int setup_mon_len(void)
 {
+#ifdef CONFIG_SYS_SYM_OFFSETS
 	gd->mon_len = _bss_end_ofs;
+#else
+	gd->mon_len = (ulong)&__bss_end - (ulong)&__text_start;
+#endif
 	return 0;
 }
 

@@ -423,6 +432,7 @@ static int jump_to_copy(void)
 
 static init_fnc_t init_sequence_f[] = {
 	setup_global_data_ptr,
+	zero_global_data,
 	setup_fdt,
 	setup_mon_len,
 #if defined(CONFIG_ARCH_CPU_INIT)

@@ -457,6 +467,7 @@ static init_fnc_t init_sequence_f[] = {
 #ifdef CONFIG_POST
 	init_post,
 #endif
+	setup_dram_config,
 	setup_reloc,
 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 	reserve_logbuffer,

index 755f88a..d3e2f4c 100644
@@ -24,14 +24,6 @@
 #ifndef _U_BOOT_I386_H_
 #define _U_BOOT_I386_H_	1
 
-/* Exports from the Linker Script */
-extern ulong __text_start;
-extern ulong __data_end;
-extern ulong __rel_dyn_start;
-extern ulong __rel_dyn_end;
-extern ulong __bss_start;
-extern ulong __bss_end;
-
 /* cpu/.../cpu.c */
 int x86_cpu_init_r(void);
 int cpu_init_r(void);

index d742fec..b9e9f0a 100644
@@ -41,6 +41,7 @@
 #include <ide.h>
 #include <serial.h>
 #include <asm/u-boot-x86.h>
+#include <asm-generic/sections.h>
 #include <elf.h>
 
 #ifdef CONFIG_BITBANGMII

index 6199926..fb976f9 100644
@@ -44,6 +44,8 @@ typedef struct global_data {
 	bd_t		*bd;
 	unsigned long	flags;
 	unsigned long	baudrate;
+	unsigned long	cpu_clk;	/* CPU clock in Hz!		*/
+	unsigned long	bus_clk;
 #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
 	unsigned long	fb_base;	/* Base address of framebuffer mem */
 #endif

index 05a2139..c5df175 100644
@@ -23,6 +23,11 @@
 
 #ifndef	__ASM_GBL_DATA_H
 #define __ASM_GBL_DATA_H
+
+#ifdef CONFIG_SYS_GENERIC_BOARD
+/* Use the generic board which requires a unified global_data */
+#include <asm-generic/global_data.h>
+#else
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -73,6 +78,8 @@ extern gd_t *gd;
 #define GD_FLG_DISABLE_CONSOLE	0x00040	/* Disable console (in & out)		*/
 #define GD_FLG_ENV_READY	0x00080	/* Environment imported into hash table	*/
 
+#endif /* nCONFIG_SYS_GENERIC_BOARD */
+
 #if 0
 #define DECLARE_GLOBAL_DATA_PTR
 #else

index dd42209..ef8b7d5 100644
@@ -36,6 +36,13 @@
 #ifndef _U_BOOT_H_
 #define _U_BOOT_H_	1
 
+#ifdef CONFIG_SYS_GENERIC_BOARD
+/* Use the generic board which requires a unified bd_info */
+#include <asm-generic/u-boot.h>
+#else
+
+#ifndef __ASSEMBLY__
+
 typedef struct bd_info {
 	unsigned long	bi_memstart;	/* start of DRAM memory */
 	phys_size_t	bi_memsize;	/* size	 of DRAM memory in bytes */

@@ -58,6 +65,10 @@ typedef struct bd_info {
 	}bi_dram[CONFIG_NR_DRAM_BANKS];
 } bd_t;
 
+#endif /* __ASSEMBLY__ */
+
+#endif /* nCONFIG_SYS_GENERIC_BOARD */
+
 /* For image.h:image_check_target_arch() */
 #define IH_ARCH_DEFAULT IH_ARCH_I386
 

index d63c138..807aec8 100644
@@ -56,12 +56,15 @@ static int initr_reloc(void)
  * Some of these functions are needed purely because the functions they
  * call return void. If we change them to return 0, these stubs can go away.
  */
+#ifdef CONFIG_ARM
 static int initr_caches(void)
 {
+	/* TODO: sort out x86 code here */
 	/* Enable caches */
 	enable_caches();
 	return 0;
 }
+#endif
 
 static int initr_reloc_global_data(void)
 {

@@ -232,11 +235,13 @@ static int initr_api(void)
 #endif
 
 /* enable exceptions */
+#ifdef CONFIG_ARM
 static int initr_enable_interrupts(void)
 {
 	enable_interrupts();
 	return 0;
 }
+#endif
 
 #ifdef CONFIG_CMD_NET
 static int initr_ethaddr(void)

index fb976f9..fb2891e 100644
@@ -46,6 +46,114 @@ typedef struct global_data {
 	unsigned long	baudrate;
 	unsigned long	cpu_clk;	/* CPU clock in Hz!		*/
 	unsigned long	bus_clk;
+#if defined(CONFIG_8xx)
+	unsigned long	brg_clk;
+#endif
+#if defined(CONFIG_CPM2)
+	/* There are many clocks on the MPC8260 - see page 9-5 */
+	unsigned long	vco_out;
+	unsigned long	cpm_clk;
+	unsigned long	scc_clk;
+	unsigned long	brg_clk;
+#ifdef CONFIG_PCI
+	unsigned long	pci_clk;
+#endif
+#endif
+	unsigned long   mem_clk;
+#if defined(CONFIG_MPC83xx)
+	/* There are other clocks in the MPC83XX */
+	u32 csb_clk;
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+	defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
+	u32 tsec1_clk;
+	u32 tsec2_clk;
+	u32 usbdr_clk;
+#endif
+#if defined(CONFIG_MPC834x)
+	u32 usbmph_clk;
+#endif /* CONFIG_MPC834x */
+#if defined(CONFIG_MPC8315)
+	u32 tdm_clk;
+#endif
+	u32 core_clk;
+	u32 enc_clk;
+	u32 lbiu_clk;
+	u32 lclk_clk;
+	u32 pci_clk;
+#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
+	defined(CONFIG_MPC837x)
+	u32 pciexp1_clk;
+	u32 pciexp2_clk;
+#endif
+#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)
+	u32 sata_clk;
+#endif
+#if defined(CONFIG_MPC8360)
+	u32  mem_sec_clk;
+#endif /* CONFIG_MPC8360 */
+#endif
+#if defined(CONFIG_FSL_ESDHC)
+	u32 sdhc_clk;
+#endif
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
+	u32 lbc_clk;
+	void *cpu;
+#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
+#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) \
+		|| defined(CONFIG_MPC86xx)
+	u32 i2c1_clk;
+	u32 i2c2_clk;
+#endif
+#if defined(CONFIG_QE)
+	u32 qe_clk;
+	u32 brg_clk;
+	uint mp_alloc_base;
+	uint mp_alloc_top;
+#endif /* CONFIG_QE */
+#if defined(CONFIG_FSL_LAW)
+	u32 used_laws;
+#endif
+#if defined(CONFIG_E500)
+	u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32];
+#endif
+#if defined(CONFIG_MPC5xxx)
+	unsigned long	ipb_clk;
+	unsigned long	pci_clk;
+#endif
+#if defined(CONFIG_MPC512X)
+	u32 ips_clk;
+	u32 csb_clk;
+	u32 pci_clk;
+#endif /* CONFIG_MPC512X */
+#if defined(CONFIG_MPC8220)
+	unsigned long   bExtUart;
+	unsigned long   inp_clk;
+	unsigned long   pci_clk;
+	unsigned long   vco_clk;
+	unsigned long   pev_clk;
+	unsigned long   flb_clk;
+#endif
+	unsigned long	reset_status;	/* reset status register at boot */
+#if defined(CONFIG_MPC83xx)
+	unsigned long	arbiter_event_attributes;
+	unsigned long	arbiter_event_address;
+#endif
+#if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2)
+	unsigned int	dp_alloc_base;
+	unsigned int	dp_alloc_top;
+#endif
+#if defined(CONFIG_4xx)
+	u32  uart_clk;
+#endif /* CONFIG_4xx */
+#if defined(CONFIG_SYS_GT_6426x)
+	unsigned int	mirror_hack[16];
+#endif
+#if defined(CONFIG_A3000)	|| \
+		defined(CONFIG_HIDDEN_DRAGON)  || \
+		defined(CONFIG_MUSENKI)	||  \
+		defined(CONFIG_SANDPOINT)
+	void *console_addr;
+#endif
 #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
 	unsigned long	fb_base;	/* Base address of framebuffer mem */
 #endif

@@ -54,6 +162,22 @@ typedef struct global_data {
 	unsigned long	post_log_res; /* success of POST test */
 	unsigned long	post_init_f_time;  /* When post_init_f started */
 #endif
+#ifdef CONFIG_BOARD_TYPES
+	unsigned long	board_type;
+#endif
+#ifdef CONFIG_MODEM_SUPPORT
+	unsigned long do_mdm_init;
+	unsigned long be_quiet;
+#endif
+#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
+	unsigned long kbd_status;
+#endif
+#ifdef CONFIG_SYS_FPGA_COUNT
+	unsigned fpga_state[CONFIG_SYS_FPGA_COUNT];
+#endif
+#if defined(CONFIG_WD_MAX_RATE)
+	unsigned long long wdt_last;	/* trace watch-dog triggering rate */
+#endif
 	unsigned long	have_console;	/* serial_init() was called */
 #ifdef CONFIG_PRE_CONSOLE_BUFFER
 	unsigned long	precon_buf_idx;	/* Pre-Console buffer index */

index 2aa2cf1..88c3f71 100644
@@ -31,10 +31,31 @@
 #include <version.h>
 #include <asm-generic/sections.h>
 #include <asm/io.h>
+#ifdef CONFIG_MP
+#include <asm/mp.h>
+#endif
 #include <environment.h>
+#if defined(CONFIG_CMD_IDE)
+#include <ide.h>
+#endif
+#include <i2c.h>
 #include <initcall.h>
 #include <logbuff.h>
+
+/* TODO: Can we move these into arch/ headers? */
+#ifdef CONFIG_8xx
+#include <mpc8xx.h>
+#endif
+#ifdef CONFIG_5xx
+#include <mpc5xx.h>
+#endif
+#ifdef CONFIG_MPC5xxx
+#include <mpc5xxx.h>
+#endif
+
 #include <post.h>
+#include <spi.h>
+#include <watchdog.h>
 
 /*
  * Pointer to initial global data area

@@ -98,6 +119,34 @@ void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
  * Could the CONFIG_SPL_BUILD infection become a flag in gd?
  */
 
+#if defined(CONFIG_WATCHDOG)
+static int init_func_watchdog_init(void)
+{
+	puts("       Watchdog enabled\n");
+	WATCHDOG_RESET();
+	return 0;
+}
+
+#define INIT_FUNC_WATCHDOG_INIT	init_func_watchdog_init,
+
+int init_func_watchdog_reset(void)
+{
+	WATCHDOG_RESET();
+	return 0;
+}
+
+#else
+#define INIT_FUNC_WATCHDOG_INIT
+#endif /* CONFIG_WATCHDOG */
+
+void __board_add_ram_info(int use_default)
+{
+	/* please define platform specific board_add_ram_info() */
+}
+
+void board_add_ram_info(int)
+	__attribute__ ((weak, alias("__board_add_ram_info")));
+
 static int init_baud_rate(void)
 {
 	gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);

@@ -135,6 +184,25 @@ static int announce_dram_init(void)
 	return 0;
 }
 
+#ifdef CONFIG_PPC
+static int init_func_ram(void)
+{
+#ifdef	CONFIG_BOARD_TYPES
+	int board_type = gd->board_type;
+#else
+	int board_type = 0;	/* use dummy arg */
+#endif
+
+	gd->ram_size = initdram(board_type);
+
+	if (gd->ram_size > 0)
+		return 0;
+
+	puts("*** failed ***\n");
+	return 1;
+}
+#endif
+
 static int display_dram_config(void)
 {
 	ulong size;

@@ -155,11 +223,24 @@ static int display_dram_config(void)
 	size = gd->ram_size;
 #endif
 
-	print_size(size, "\n");
+	print_size(size, "");
+	board_add_ram_info(0);
+	putc('\n');
 
 	return 0;
 }
 
+ulong get_effective_memsize(void)
+{
+#ifndef	CONFIG_VERY_BIG_RAM
+	return gd->ram_size;
+#else
+	/* limit stack to what we can reasonable map */
+	return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
+		CONFIG_MAX_MEM_MAPPED : gd->ram_size);
+#endif
+}
+
 void __dram_init_banksize(void)
 {
 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)

@@ -171,10 +252,37 @@ void __dram_init_banksize(void)
 void dram_init_banksize(void)
 	__attribute__((weak, alias("__dram_init_banksize")));
 
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+static int init_func_i2c(void)
+{
+	puts("I2C:   ");
+	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+	puts("ready\n");
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_HARD_SPI)
+static int init_func_spi(void)
+{
+	puts("SPI:   ");
+	spi_init();
+	puts("ready\n");
+	return 0;
+}
+#endif
+
 static int setup_global_data_ptr(void)
 {
-	/* Pointer is writable since we allocated a register for it */
+	/*
+	 * Pointer is writable since we allocated a register for it.
+	 * Can we choose one of these two methods instead of offering both?
+	 */
+#ifdef CONFIG_SYS_INIT_SP_ADDR
 	gd = (gd_t *) ((CONFIG_SYS_INIT_SP_ADDR) & ~0x07);
+#else
+	gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
+#endif
 
 	/* compiler optimization barrier needed for GCC >= 3.4 */
 	dmb();

@@ -182,6 +290,7 @@ static int setup_global_data_ptr(void)
 	return 0;
 }
 
+__maybe_unused
 static int zero_global_data(void)
 {
 	memset((void *)gd, '\0', sizeof(gd_t));

@@ -194,7 +303,8 @@ static int setup_mon_len(void)
 #ifdef CONFIG_SYS_SYM_OFFSETS
 	gd->mon_len = _bss_end_ofs;
 #else
-	gd->mon_len = (ulong)&__bss_end - (ulong)&__text_start;
+	/* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
+	gd->mon_len = (ulong)&__bss_end__ - CONFIG_SYS_MONITOR_BASE;
 #endif
 	return 0;
 }

@@ -234,7 +344,22 @@ static int setup_reloc(void)
 	 */
 	gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
 #endif
+#ifdef CONFIG_NR_DRAM_BANKS
 	gd->dest_addr = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
+#else
+	gd->dest_addr = CONFIG_SYS_SDRAM_BASE + get_effective_memsize();
+#endif
+	gd->ram_top = gd->dest_addr;
+#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
+	/*
+	 * We need to make sure the location we intend to put secondary core
+	 * boot code is reserved and not used by any part of u-boot
+	 */
+	if (gd->dest_addr > determine_mp_bootpg()) {
+		gd->dest_addr = determine_mp_bootpg();
+		debug("Reserving MP boot page to %08lx\n", gd->dest_addr);
+	}
+#endif
 	gd->dest_addr_sp = gd->dest_addr;
 	return 0;
 }

@@ -300,6 +425,19 @@ static int reserve_lcd(void)
 }
 #endif /* CONFIG_LCD */
 
+/* TODO: We should be able to just use CONFIG_VIDEO here */
+#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
+		&& !defined(CONFIG_ARM)
+static int reserve_video(void)
+{
+	/* reserve memory for video display (always full pages) */
+	gd->dest_addr = video_setmem(gd->dest_addr);
+	gd->fb_base = gd->dest_addr;
+
+	return 0;
+}
+#endif
+
 static int reserve_uboot(void)
 {
 	/*

@@ -308,6 +446,10 @@ static int reserve_uboot(void)
 	 */
 	gd->dest_addr -= gd->mon_len;
 	gd->dest_addr &= ~(4096 - 1);
+#ifdef CONFIG_E500
+	/* round down to next 64 kB limit so that IVPR stays aligned */
+	gd->dest_addr &= ~(65536 - 1);
+#endif
 
 	debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
 	      gd->dest_addr);

@@ -356,7 +498,13 @@ static int reserve_global_data(void)
 #ifndef CONFIG_SPL_BUILD
 static int reserve_stacks(void)
 {
+#ifdef CONFIG_PPC
+	ulong *s;
+#endif
+
 	/* setup stack pointer for exceptions */
+	gd->dest_addr_sp -= 16;
+	gd->dest_addr_sp &= ~0xf;
 	gd->irq_sp = gd->dest_addr_sp;
 #ifdef CONFIG_USE_IRQ
 	gd->dest_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);

@@ -369,6 +517,14 @@ static int reserve_stacks(void)
 	/* leave 3 words for abort-stack, plus 1 for alignment */
 	gd->dest_addr_sp -= 16;
 
+#ifdef CONFIG_PPC
+	/* Clear initial stack frame */
+	s = (ulong *) gd->dest_addr_sp;
+	*s-- = 0;
+	*s-- = 0;
+	gd->dest_addr_sp = (ulong) s;
+#endif
+
 	return 0;
 }
 #endif

@@ -390,6 +546,106 @@ static int display_new_sp(void)
 	return 0;
 }
 
+#ifdef CONFIG_PPC
+static int setup_board_part1(void)
+{
+	bd_t *bd = gd->bd;
+
+	/*
+	 * Save local variables to board info struct
+	 */
+
+	bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;	/* start of memory */
+	bd->bi_memsize = gd->ram_size;			/* size in bytes */
+
+#ifdef CONFIG_SYS_SRAM_BASE
+	bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;	/* start of SRAM */
+	bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;		/* size  of SRAM */
+#endif
+
+#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
+		defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
+	bd->bi_immr_base = CONFIG_SYS_IMMR;	/* base  of IMMR register     */
+#endif
+#if defined(CONFIG_MPC5xxx)
+	bd->bi_mbar_base = CONFIG_SYS_MBAR;	/* base of internal registers */
+#endif
+#if defined(CONFIG_MPC83xx)
+	bd->bi_immrbar = CONFIG_SYS_IMMR;
+#endif
+#if defined(CONFIG_MPC8220)
+	bd->bi_mbar_base = CONFIG_SYS_MBAR;	/* base of internal registers */
+	bd->bi_inpfreq = gd->inp_clk;
+	bd->bi_pcifreq = gd->pci_clk;
+	bd->bi_vcofreq = gd->vco_clk;
+	bd->bi_pevfreq = gd->pev_clk;
+	bd->bi_flbfreq = gd->flb_clk;
+
+	/* store bootparam to sram (backward compatible), here? */
+	{
+		u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
+
+		*sram++ = gd->ram_size;
+		*sram++ = gd->bus_clk;
+		*sram++ = gd->inp_clk;
+		*sram++ = gd->cpu_clk;
+		*sram++ = gd->vco_clk;
+		*sram++ = gd->flb_clk;
+		*sram++ = 0xb8c3ba11;	/* boot signature */
+	}
+#endif
+
+	return 0;
+}
+
+static int setup_board_part2(void)
+{
+	bd_t *bd = gd->bd;
+
+	bd->bi_intfreq = gd->cpu_clk;	/* Internal Freq, in Hz */
+	bd->bi_busfreq = gd->bus_clk;	/* Bus Freq,      in Hz */
+#if defined(CONFIG_CPM2)
+	bd->bi_cpmfreq = gd->cpm_clk;
+	bd->bi_brgfreq = gd->brg_clk;
+	bd->bi_sccfreq = gd->scc_clk;
+	bd->bi_vco = gd->vco_out;
+#endif /* CONFIG_CPM2 */
+#if defined(CONFIG_MPC512X)
+	bd->bi_ipsfreq = gd->ips_clk;
+#endif /* CONFIG_MPC512X */
+#if defined(CONFIG_MPC5xxx)
+	bd->bi_ipbfreq = gd->ipb_clk;
+	bd->bi_pcifreq = gd->pci_clk;
+#endif /* CONFIG_MPC5xxx */
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_SYS_EXTBDINFO
+static int setup_board_extra(void)
+{
+	bd_t *bd = gd->bd;
+
+	strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
+	strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
+		sizeof(bd->bi_r_version));
+
+	bd->bi_procfreq = gd->cpu_clk;	/* Processor Speed, In Hz */
+	bd->bi_plb_busfreq = gd->bus_clk;
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
+		defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+		defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+	bd->bi_pci_busfreq = get_PCI_freq();
+	bd->bi_opbfreq = get_OPB_freq();
+#elif defined(CONFIG_XILINX_405)
+	bd->bi_pci_busfreq = get_PCI_freq();
+#endif
+
+	return 0;
+}
+#endif
+
 #ifdef CONFIG_POST
 static int init_post(void)
 {

@@ -432,9 +688,17 @@ static int jump_to_copy(void)
 
 static init_fnc_t init_sequence_f[] = {
 	setup_global_data_ptr,
+#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
+		!defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
+		!defined(CONFIG_MPC86xx)
 	zero_global_data,
+#endif
 	setup_fdt,
 	setup_mon_len,
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
+	/* TODO: can this go into arch_cpu_init()? */
+	probecpu,
+#endif
 #if defined(CONFIG_ARCH_CPU_INIT)
 	arch_cpu_init,		/* basic arch cpu dependent setup */
 #endif

@@ -444,30 +708,119 @@ static init_fnc_t init_sequence_f[] = {
 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 	board_early_init_f,
 #endif
+	/* TODO: can any of this go into arch_cpu_init()? */
+#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
+	get_clocks,		/* get CPU and bus clocks (etc.) */
+#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
+		&& !defined(CONFIG_TQM885D)
+	adjust_sdram_tbs_8xx,
+#endif
+	/* TODO: can we rename this to timer_init()? */
+	init_timebase,
+#endif
+#if defined(CONFIG_BOARD_EARLY_INIT_F)
+	board_early_init_f,
+#endif
+#ifdef CONFIG_ARM
 	timer_init,		/* initialize timer */
+#endif
 #ifdef CONFIG_FSL_ESDHC
 	get_clocks,
 #endif
+#ifdef CONFIG_SYS_ALLOC_DPRAM
+#if !defined(CONFIG_CPM2)
+	dpram_init,
+#endif
+#endif
+#if defined(CONFIG_BOARD_POSTCLK_INIT)
+	board_postclk_init,
+#endif
 	env_init,		/* initialize environment */
+#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
+	/* get CPU and bus clocks according to the environment variable */
+	get_clocks_866,
+	/* adjust sdram refresh rate according to the new clock */
+	sdram_adjust_866,
+	init_timebase,
+#endif
 	init_baud_rate,		/* initialze baudrate settings */
 	serial_init,		/* serial communications setup */
 	console_init_f,		/* stage 1 init of console */
 	display_options,	/* say that we are here */
 	display_text_info,	/* show debugging info if required */
+#if defined(CONFIG_8260)
+	prt_8260_rsr,
+	prt_8260_clks,
+#endif /* CONFIG_8260 */
+#if defined(CONFIG_MPC83xx)
+	prt_83xx_rsr,
+#endif
+#ifdef CONFIG_PPC
+	checkcpu,
+#endif
 #if defined(CONFIG_DISPLAY_CPUINFO)
 	print_cpuinfo,		/* display cpu info (and speed) */
 #endif
+#if defined(CONFIG_MPC5xxx)
+	prt_mpc5xxx_clks,
+#endif /* CONFIG_MPC5xxx */
+#if defined(CONFIG_MPC8220)
+	prt_mpc8220_clks,
+#endif
 #if defined(CONFIG_DISPLAY_BOARDINFO)
 	checkboard,		/* display board info */
 #endif
+	INIT_FUNC_WATCHDOG_INIT
+#if defined(CONFIG_MISC_INIT_F)
+	misc_init_f,
+#endif
+	INIT_FUNC_WATCHDOG_RESET
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+	init_func_i2c,
+#endif
+#if defined(CONFIG_HARD_SPI)
+	init_func_spi,
+#endif
 	announce_dram_init,
+	/* TODO: unify all these dram functions? */
+#ifdef CONFIG_ARM
 	dram_init,		/* configure available RAM banks */
 	setup_dram_config,
+#endif
+#ifdef CONFIG_X86
+	dram_init_f,		/* configure available RAM banks */
+#endif
+#ifdef CONFIG_PPC
+	init_func_ram,
+#endif
 	display_dram_config,
 #ifdef CONFIG_POST
+	post_init_f,
+#endif
+	INIT_FUNC_WATCHDOG_RESET
+#if defined(CONFIG_SYS_DRAM_TEST)
+	testdram,
+#endif /* CONFIG_SYS_DRAM_TEST */
+	INIT_FUNC_WATCHDOG_RESET
+
+#ifdef CONFIG_POST
 	init_post,
 #endif
+	INIT_FUNC_WATCHDOG_RESET
 	setup_dram_config,
+
+	/*
+	 * Now that we have DRAM mapped and working, we can
+	 * relocate the code and continue running from DRAM.
+	 *
+	 * Reserve memory at end of RAM for (top down in that order):
+	 *  - area that won't get touched by U-Boot and Linux (optional)
+	 *  - kernel log buffer
+	 *  - protected RAM
+	 *  - LCD framebuffer
+	 *  - monitor code
+	 *  - board info struct
+	 */
 	setup_reloc,
 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
 	reserve_logbuffer,

@@ -482,6 +835,11 @@ static init_fnc_t init_sequence_f[] = {
 #ifdef CONFIG_LCD
 	reserve_lcd,
 #endif
+	/* TODO: Why the dependency on CONFIG_8xx? */
+#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
+		&& !defined(CONFIG_ARM)
+	reserve_video,
+#endif
 	reserve_uboot,
 #ifndef CONFIG_SPL_BUILD
 	reserve_malloc,

@@ -494,8 +852,17 @@ static init_fnc_t init_sequence_f[] = {
 #else
 	reserve_stacks,
 #endif
+#ifdef CONFIG_PPC
+	setup_board_part1,
+	INIT_FUNC_WATCHDOG_RESET
+	setup_board_part2,
+#endif
 	setup_baud_rate,
 	display_new_sp,
+#ifdef CONFIG_SYS_EXTBDINFO
+	setup_board_extra,
+#endif
+	INIT_FUNC_WATCHDOG_RESET
 	jump_to_copy,
 	NULL,
 };

index 59e0b00..31ff221 100644
@@ -285,6 +285,22 @@ extern ulong monitor_flash_len;
 int mac_read_from_eeprom(void);
 extern u8 _binary_dt_dtb_start[];	/* embedded device tree blob */
 
+#ifdef CONFIG_SYS_GENERIC_BOARD
+/*
+ * Reset the watchdog timer, always returns 0
+ *
+ * This function is here since it is shared between board_f() and board_r().
+ */
+int init_func_watchdog_reset(void);
+#endif
+
+#if defined(CONFIG_WATCHDOG)
+#define INIT_FUNC_WATCHDOG_RESET	init_func_watchdog_reset,
+#else
+#define INIT_FUNC_WATCHDOG_RESET	/* undef */
+#endif /* CONFIG_WATCHDOG */
+
+
 /*
  * Called when console output is requested before the console is available.
  * The board should do its best to get the character out to the user any way

index 807aec8..33080e6 100644
@@ -28,23 +28,84 @@
 
 #include <common.h>
 #include <asm-generic/sections.h>
+
+/* TODO: can we just include all these headers whether needed or not? */
+#ifdef CONFIG_ADDR_MAP
+#include <asm/mmu.h>
+#endif
+#if defined(CONFIG_CMD_BEDBUG)
+#include <bedbug/type.h>
+#endif
 #ifdef CONFIG_HAS_DATAFLASH
 #include <dataflash.h>
 #endif
 #include <environment.h>
+#if defined(CONFIG_CMD_IDE)
+#include <ide.h>
+#endif
 #include <initcall.h>
+#ifdef CONFIG_PS2KBD
+#include <keyboard.h>
+#endif
+#if defined(CONFIG_CMD_KGDB)
+#include <kgdb.h>
+#endif
 #include <logbuff.h>
 #include <malloc.h>
+#ifdef CONFIG_BITBANGMII
+#include <miiphy.h>
+#endif
 #include <mmc.h>
 #include <nand.h>
 #include <onenand_uboot.h>
+#include <scsi.h>
 #include <serial.h>
+#include <spi.h>
 #include <stdio_dev.h>
+#include <watchdog.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 ulong monitor_flash_len;
 
+/* TODO: Move this prototype to a header? */
+#ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
+extern int update_flash_size(int flash_size);
+#endif
+
+int __board_flash_wp_on(void)
+{
+	/*
+	 * Most flashes can't be detected when write protection is enabled,
+	 * so provide a way to let U-Boot gracefully ignore write protected
+	 * devices.
+	 */
+	return 0;
+}
+
+int board_flash_wp_on(void)
+	__attribute__ ((weak, alias("__board_flash_wp_on")));
+
+void __cpu_secondary_init_r(void)
+{
+}
+
+void cpu_secondary_init_r(void)
+	__attribute__ ((weak, alias("__cpu_secondary_init_r")));
+
+static int initr_secondary_cpu(void)
+{
+	/*
+	 * after non-volatile devices & environment is setup and cpu code have
+	 * another round to deal with any initialization that might require
+	 * full access to the environment or loading of some image (firmware)
+	 * from a non-volatile device
+	 */
+	/* TODO: maybe define this for all archs? */
+	cpu_secondary_init_r();
+
+	return 0;
+}
 
 static int initr_reloc(void)
 {

@@ -73,6 +134,25 @@ static int initr_reloc_global_data(void)
 #else
 	monitor_flash_len = (ulong)&__init_end - gd->dest_addr;
 #endif
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
+	/*
+	 * The gd->cpu pointer is set to an address in flash before relocation.
+	 * We need to update it to point to the same CPU entry in RAM.
+	 * TODO: why not just add gd->reloc_ofs?
+	 */
+	gd->cpu += gd->dest_addr - CONFIG_SYS_MONITOR_BASE;
+#endif
+#ifdef CONFIG_SYS_EXTRA_ENV_RELOC
+	/*
+	 * Some systems need to relocate the env_addr pointer early because the
+	 * location it points to will get invalidated before env_relocate is
+	 * called.  One example is on systems that might use a L2 or L3 cache
+	 * in SRAM mode and initialize that cache from SRAM mode back to being
+	 * a cache in cpu_init_r.
+	 */
+	gd->env_addr += gd->dest_addr - CONFIG_SYS_MONITOR_BASE;
+#endif
+	return 0;
 }
 
 #ifdef CONFIG_SERIAL_MULTI

@@ -83,6 +163,27 @@ static int initr_serial(void)
 }
 #endif
 
+#ifdef CONFIG_PPC
+static int initr_trap(void)
+{
+	/*
+	 * Setup trap handlers
+	 */
+	trap_init(gd->dest_addr);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_ADDR_MAP
+static int initr_addr_map(void)
+{
+	init_addr_map();
+
+	return 0;
+}
+#endif
+
 #ifdef CONFIG_LOGBUFFER
 unsigned long logbuffer_base(void)
 {

@@ -104,6 +205,50 @@ static int initr_post_backlog(void)
 }
 #endif
 
+#ifdef CONFIG_SYS_DELAYED_ICACHE
+static int initr_icache_enable(void)
+{
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
+static int initr_unlock_ram_in_cache(void)
+{
+	unlock_ram_in_cache();	/* it's time to unlock D-cache in e500 */
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_PCI
+static int initr_pci(void)
+{
+	pci_init();
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_WINBOND_83C553
+static int initr_w83c553f(void)
+{
+	/*
+	 * Initialise the ISA bridge
+	 */
+	initialise_w83c553f();
+	return 0;
+}
+#endif
+
+static int initr_barrier(void)
+{
+#ifdef CONFIG_PPC
+	/* TODO: Can we not use dmb() macros for this? */
+	asm("sync ; isync");
+#endif
+	return 0;
+}
+
 static int initr_malloc(void)
 {
 	ulong malloc_start;

@@ -123,13 +268,26 @@ static int initr_announce(void)
 #if !defined(CONFIG_SYS_NO_FLASH)
 static int initr_flash(void)
 {
-	ulong flash_size;
+	ulong flash_size = 0;
+	bd_t *bd = gd->bd;
+	int ok;
 
 	puts("Flash: ");
 
-	flash_size = flash_init();
-	if (flash_size <= 0) {
+	if (board_flash_wp_on()) {
+		printf("Uninitialized - Write Protect On\n");
+		/* Since WP is on, we can't find real size.  Set to 0 */
+		ok = 1;
+	} else {
+		flash_size = flash_init();
+		ok = flash_size > 0;
+	}
+	if (!ok) {
 		puts("*** failed ***\n");
+#ifdef CONFIG_PPC
+		/* Why does PPC do this? */
+		hang();
+#endif
 		return -1;
 	}
 	print_size(flash_size, "");

@@ -152,6 +310,40 @@ static int initr_flash(void)
 	}
 #endif /* CONFIG_SYS_FLASH_CHECKSUM */
 	putc('\n');
+
+	/* update start of FLASH memory    */
+#ifdef CONFIG_SYS_FLASH_BASE
+	bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
+#endif
+	/* size of FLASH memory (final value) */
+	bd->bi_flashsize = flash_size;
+
+#if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
+	/* Make a update of the Memctrl. */
+	update_flash_size(flash_size);
+#endif
+
+
+#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
+	/* flash mapped at end of memory map */
+	bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
+#elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
+	bd->bi_flashoffset = monitor_flash_len;	/* reserved area for monitor */
+#endif
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_PPC
+static int initr_spi(void)
+{
+	/* PPC does this here */
+#ifdef CONFIG_SPI
+#if !defined(CONFIG_ENV_IS_IN_EEPROM)
+	spi_init_f();
+#endif
+	spi_init_r();
+#endif
 	return 0;
 }
 #endif

@@ -216,8 +408,55 @@ static int initr_env(void)
 			copy_filename(BootFile, s, sizeof(BootFile));
 	}
 #endif
+#if defined(CONFIG_SYS_EXTBDINFO)
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
+#if defined(CONFIG_I2CFAST)
+	/*
+	 * set bi_iic_fast for linux taking environment variable
+	 * "i2cfast" into account
+	 */
+	{
+		char *s = getenv("i2cfast");
+
+		if (s && ((*s == 'y') || (*s == 'Y'))) {
+			gd->bd->bi_iic_fast[0] = 1;
+			gd->bd->bi_iic_fast[1] = 1;
+		}
+	}
+#endif /* CONFIG_I2CFAST */
+#endif /* CONFIG_405GP, CONFIG_405EP */
+#endif /* CONFIG_SYS_EXTBDINFO */
+	return 0;
+}
+
+#ifdef	CONFIG_HERMES
+static int initr_hermes(void)
+{
+	if ((gd->board_type >> 16) == 2)
+		gd->bd->bi_ethspeed = gd->board_type & 0xFFFF;
+	else
+		gd->bd->bi_ethspeed = 0xFFFF;
+	return 0;
+}
+
+static int initr_hermes_start(void)
+{
+	if (gd->bd->bi_ethspeed != 0xFFFF)
+		hermes_start_lxt980((int) gd->bd->bi_ethspeed);
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_SC3
+/* TODO: with new initcalls, move this into the driver */
+extern void sc3_read_eeprom(void);
+
+static int initr_sc3_read_eeprom(void)
+{
+	sc3_read_eeprom();
 	return 0;
 }
+#endif
 
 static int initr_jumptable(void)
 {

@@ -246,6 +485,8 @@ static int initr_enable_interrupts(void)
 #ifdef CONFIG_CMD_NET
 static int initr_ethaddr(void)
 {
+	bd_t *bd = gd->bd;
+
 #if defined(CONFIG_DRIVER_SMC91111) || defined(CONFIG_DRIVER_LAN91C96)
 	/* Perform network card initialisation if necessary */
 	/* XXX: this needs to be moved to board init */

@@ -257,11 +498,63 @@ static int initr_ethaddr(void)
 		smc_set_mac_addr(enetaddr);
 	}
 #endif /* CONFIG_DRIVER_SMC91111 || CONFIG_DRIVER_LAN91C96 */
+	/* kept around for legacy kernels only ... ignore the next section */
+	eth_getenv_enetaddr("ethaddr", bd->bi_enetaddr);
+#ifdef CONFIG_HAS_ETH1
+	eth_getenv_enetaddr("eth1addr", bd->bi_enet1addr);
+#endif
+#ifdef CONFIG_HAS_ETH2
+	eth_getenv_enetaddr("eth2addr", bd->bi_enet2addr);
+#endif
+#ifdef CONFIG_HAS_ETH3
+	eth_getenv_enetaddr("eth3addr", bd->bi_enet3addr);
+#endif
+#ifdef CONFIG_HAS_ETH4
+	eth_getenv_enetaddr("eth4addr", bd->bi_enet4addr);
+#endif
+#ifdef CONFIG_HAS_ETH5
+	eth_getenv_enetaddr("eth5addr", bd->bi_enet5addr);
+#endif
+	return 0;
+}
+#endif /* CONFIG_CMD_NET */
+
+#ifdef CONFIG_CMD_KGDB
+static int initr_kgdb(void)
+{
+	puts("KGDB:  ");
+	kgdb_init();
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
+static int initr_status_led(void)
+{
+	status_led_set(STATUS_LED_BOOT, STATUS_LED_BLINKING);
+
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_CMD_SCSI)
+static int initr_scsi(void)
+{
+	puts("SCSI:  ");
+	scsi_init();
 
 	return 0;
 }
 #endif /* CONFIG_CMD_NET */
 
+#if defined(CONFIG_CMD_DOC)
+static int initr_doc(void)
+{
+	puts("DOC:   ");
+	doc_init();
+}
+#endif
+
 #ifdef CONFIG_BITBANGMII
 static int initr_bbmii(void)
 {

@@ -291,6 +584,33 @@ static int initr_post(void)
 }
 #endif
 
+#if defined(CONFIG_CMD_PCMCIA) && !defined(CONFIG_CMD_IDE)
+static int initr_pcmcia(void)
+{
+	puts("PCMCIA:");
+	pcmcia_init();
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_CMD_IDE)
+static int initr_ide(void)
+{
+#ifdef	CONFIG_IDE_8xx_PCCARD
+	puts("PCMCIA:");
+#else
+	puts("IDE:   ");
+#endif
+#if defined(CONFIG_START_IDE)
+	if (board_start_ide())
+		ide_init();
+#else
+	ide_init();
+#endif
+	return 0;
+}
+#endif
+
 #if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
 /*
  * Export available size of memory for Linux, taking into account the

@@ -310,6 +630,37 @@ int initr_mem(void)
 # endif
 	sprintf(memsz, "%ldk", (gd->ram_size / 1024) - pram);
 	setenv("mem", memsz);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_CMD_BEDBUG
+static int initr_bedbug(void)
+{
+	bedbug_init();
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_PS2KBD
+static int initr_kbd(void)
+{
+	puts("PS/2:  ");
+	kbd_init();
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_MODEM_SUPPORT
+static int initr_modem(void)
+{
+	/* TODO: with new initcalls, move this into the driver */
+	extern int do_mdm_init;
+
+	do_mdm_init = gd->do_mdm_init;
+	return 0;
 }
 #endif
 

@@ -327,9 +678,12 @@ static int run_main_loop(void)
  *
  * We also hope to remove most of the driver-related init and do it if/when
  * the driver is later used.
+ *
+ * TODO: perhaps reset the watchdog in the initcall function after each call?
  */
 init_fnc_t init_sequence_r[] = {
 	initr_reloc,
+	/* TODO: could x86/PPC have this also perhaps? */
 #ifdef CONFIG_ARM
 	initr_caches,
 	board_init,	/* Setup chipselects */

@@ -339,16 +693,51 @@ init_fnc_t init_sequence_r[] = {
 	initr_serial,
 #endif
 	initr_announce,
+	INIT_FUNC_WATCHDOG_RESET
+#ifdef CONFIG_PPC
+	initr_trap,
+#endif
+#ifdef CONFIG_ADDR_MAP
+	initr_addr_map,
+#endif
+#if defined(CONFIG_BOARD_EARLY_INIT_R)
+	board_early_init_r,
+#endif
+	INIT_FUNC_WATCHDOG_RESET
 #ifdef CONFIG_LOGBUFFER
 	initr_logbuffer,
 #endif
 #ifdef CONFIG_POST
 	initr_post_backlog,
 #endif
+	INIT_FUNC_WATCHDOG_RESET
+#ifdef CONFIG_SYS_DELAYED_ICACHE
+	initr_icache_enable,
+#endif
+#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
+	initr_unlock_ram_in_cache,
+#endif
+#if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
+	/*
+	 * Do early PCI configuration _before_ the flash gets initialised,
+	 * because PCU ressources are crucial for flash access on some boards.
+	 */
+	initr_pci,
+#endif
+#ifdef CONFIG_WINBOND_83C553
+	initr_w83c553f,
+#endif
+	initr_barrier,
 	initr_malloc,
 #ifndef CONFIG_SYS_NO_FLASH
 	initr_flash,
 #endif
+	INIT_FUNC_WATCHDOG_RESET
+#ifdef CONFIG_PPC
+	/* initialize higher level parts of CPU like time base and timers */
+	cpu_init_r,
+	initr_spi,
+#endif
 #ifdef CONFIG_CMD_NAND
 	initr_nand,
 #endif

@@ -362,6 +751,24 @@ init_fnc_t init_sequence_r[] = {
 	initr_dataflash,
 #endif
 	initr_env,
+	INIT_FUNC_WATCHDOG_RESET
+	initr_secondary_cpu,
+#ifdef CONFIG_SC3
+	initr_sc3_read_eeprom,
+#endif
+#ifdef	CONFIG_HERMES
+	initr_hermes,
+#endif
+#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
+	mac_read_from_eeprom,
+#endif
+	INIT_FUNC_WATCHDOG_RESET
+#if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
+	/*
+	 * Do pci configuration
+	 */
+	initr_pci,
+#endif
 	stdio_init,
 	initr_jumptable,
 #ifdef CONFIG_API

@@ -374,23 +781,73 @@ init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_MISC_INIT_R
 	misc_init_r,		/* miscellaneous platform-dependent init */
 #endif
+#ifdef CONFIG_HERMES
+	initr_hermes_start,
+#endif
+	INIT_FUNC_WATCHDOG_RESET
+#ifdef CONFIG_CMD_KGDB
+	initr_kgdb,
+#endif
 	interrupt_init,
+#ifdef CONFIG_ARM
 	initr_enable_interrupts,
+#endif
+#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
+	initr_status_led,
+#endif
+	/* PPC has a udelay(20) here dating from 2002. Why? */
 #ifdef CONFIG_CMD_NET
 	initr_ethaddr,
 #endif
 #ifdef CONFIG_BOARD_LATE_INIT
 	board_late_init,
 #endif
+#ifdef CONFIG_CMD_SCSI
+	INIT_FUNC_WATCHDOG_RESET
+	initr_scsi,
+#endif
+#ifdef CONFIG_CMD_DOC
+	INIT_FUNC_WATCHDOG_RESET
+	initr_doc,
+#endif
 #ifdef CONFIG_BITBANGMII
 	initr_bbmii,
 #endif
 #ifdef CONFIG_CMD_NET
+	INIT_FUNC_WATCHDOG_RESET
 	initr_net,
 #endif
 #ifdef CONFIG_POST
 	initr_post,
 #endif
+#if defined(CONFIG_CMD_PCMCIA) && !defined(CONFIG_CMD_IDE)
+	initr_pcmcia,
+#endif
+#if defined(CONFIG_CMD_IDE)
+	initr_ide,
+#endif
+#ifdef CONFIG_LAST_STAGE_INIT
+	INIT_FUNC_WATCHDOG_RESET
+	/*
+	 * Some parts can be only initialized if all others (like
+	 * Interrupts) are up and running (i.e. the PC-style ISA
+	 * keyboard).
+	 */
+	last_stage_init,
+#endif
+#ifdef CONFIG_CMD_BEDBUG
+	INIT_FUNC_WATCHDOG_RESET
+	initr_bedbug,
+#endif
+#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
+	initr_mem,
+#endif
+#ifdef CONFIG_PS2KBD
+	initr_kbd,
+#endif
+#ifdef CONFIG_MODEM_SUPPORT
+	initr_modem,
+#endif
 	run_main_loop,
 };
 

index 01f1d4a..3200443 100644
@@ -27,6 +27,11 @@
 #include "config.h"
 #include "asm/types.h"
 
+#ifdef CONFIG_SYS_GENERIC_BOARD
+/* Use the generic board which requires a unified global_data */
+#include <asm-generic/global_data.h>
+#else
+
 /*
  * The following data structure is placed in some memory wich is
  * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or

@@ -198,6 +203,8 @@ typedef	struct	global_data {
 #define GD_FLG_DISABLE_CONSOLE	0x00040	/* Disable console (in & out)		*/
 #define GD_FLG_ENV_READY	0x00080	/* Environment imported into hash table	*/
 
+#endif /* nCONFIG_SYS_GENERIC_BOARD */
+
 #if 1
 #define DECLARE_GLOBAL_DATA_PTR     register volatile gd_t *gd asm ("r2")
 #else /* We could use plain global data, but the resulting code is bigger */

index b2fa2b5..7cc9af7 100644
@@ -34,6 +34,11 @@
  * include/asm-ppc/u-boot.h
  */
 
+#ifdef CONFIG_SYS_GENERIC_BOARD
+/* Use the generic board which requires a unified bd_info */
+#include <asm-generic/u-boot.h>
+#else
+
 #ifndef __ASSEMBLY__
 
 typedef struct bd_info {

@@ -144,6 +149,8 @@ typedef struct bd_info {
 
 #endif /* __ASSEMBLY__ */
 
+#endif /* nCONFIG_SYS_GENERIC_BOARD */
+
 /* For image.h:image_check_target_arch() */
 #define IH_ARCH_DEFAULT IH_ARCH_PPC
 

index 261f952..11d9e8d 100644
@@ -27,6 +27,8 @@
 #include <asm/sizes.h>
 #include "tegra2-common.h"
 
+#define CONFIG_SYS_GENERIC_BOARD
+
 /* High-level configuration options */
 #define TEGRA2_SYSMEM		"mem=384M at 0M nvmem=128M at 384M mem=512M at 512M"
 #define V_PROMPT		"Tegra2 (SeaBoard) # "