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xen: kill __u*/__s* integer types

PATCH In review Christoph Egger 2 participants 6 messages Jan 20, 2012

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PATCH 1/1 xen: kill __u*/__s* integer types

Kill __u*/__s* integer types and use c99 integer types instead. Cleanup <asm-x86/types.h>

Signature · 6 lines
---to satisfy European Law for business letters:
Advanced Micro Devices GmbH
Einsteinring 24, 85689 Dornach b. Muenchen
Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632
xen/arch/x86/cpu/mcheck/mce.h +19 -19
diff -r 87854d3bed93 xen/arch/x86/cpu/mcheck/mce.h
@@ -189,25 +189,25 @@ static inline int mce_bank_msr(uint32_t 
 
 /* Fields are zero when not available */
 struct mce {
-    __u64 status;
-    __u64 misc;
-    __u64 addr;
-    __u64 mcgstatus;
-    __u64 ip;
-    __u64 tsc;      /* cpu time stamp counter */
-    __u64 time;     /* wall time_t when error was detected */
-    __u8  cpuvendor;        /* cpu vendor as encoded in system.h */
-    __u8  inject_flags;     /* software inject flags */
-    __u16  pad;
-    __u32 cpuid;    /* CPUID 1 EAX */
-    __u8  cs;               /* code segment */
-    __u8  bank;     /* machine check bank */
-    __u8  cpu;      /* cpu number; obsolete; use extcpu now */
-    __u8  finished;   /* entry is valid */
-    __u32 extcpu;   /* linux cpu number that detected the error */
-    __u32 socketid; /* CPU socket ID */
-    __u32 apicid;   /* CPU initial apic ID */
-    __u64 mcgcap;   /* MCGCAP MSR: machine check capabilities of CPU */
+    uint64_t status;
+    uint64_t misc;
+    uint64_t addr;
+    uint64_t mcgstatus;
+    uint64_t ip;
+    uint64_t tsc;      /* cpu time stamp counter */
+    uint64_t time;     /* wall time_t when error was detected */
+    uint8_t  cpuvendor;        /* cpu vendor as encoded in system.h */
+    uint8_t  inject_flags;     /* software inject flags */
+    uint16_t  pad;
+    uint32_t cpuid;    /* CPUID 1 EAX */
+    uint8_t  cs;               /* code segment */
+    uint8_t  bank;     /* machine check bank */
+    uint8_t  cpu;      /* cpu number; obsolete; use extcpu now */
+    uint8_t  finished;   /* entry is valid */
+    uint32_t extcpu;   /* linux cpu number that detected the error */
+    uint32_t socketid; /* CPU socket ID */
+    uint32_t apicid;   /* CPU initial apic ID */
+    uint64_t mcgcap;   /* MCGCAP MSR: machine check capabilities of CPU */
 };
 
 extern int apei_write_mce(struct mce *m);
xen/arch/x86/oprofile/nmi_int.c +5 -5
diff -r 87854d3bed93 xen/arch/x86/oprofile/nmi_int.c
@@ -295,7 +295,7 @@ void nmi_stop(void)
 
 static int __init p4_init(char ** cpu_type)
 { 
-	__u8 cpu_model = current_cpu_data.x86_model;
+	uint8_t cpu_model = current_cpu_data.x86_model;
 
 	if ((cpu_model > 6) || (cpu_model == 5)) {
 		printk("xenoprof: Initialization failed. "
@@ -341,7 +341,7 @@ custom_param("cpu_type", force_cpu_type)
 
 static int __init ppro_init(char ** cpu_type)
 {
-	__u8 cpu_model = current_cpu_data.x86_model;
+	uint8_t cpu_model = current_cpu_data.x86_model;
 
 	if (force_arch_perfmon && cpu_has_arch_perfmon)
 		return 0;
@@ -399,9 +399,9 @@ static int __init arch_perfmon_init(char
 
 static int __init nmi_init(void)
 {
-	__u8 vendor = current_cpu_data.x86_vendor;
-	__u8 family = current_cpu_data.x86;
-	__u8 _model = current_cpu_data.x86_model;
+	uint8_t vendor = current_cpu_data.x86_vendor;
+	uint8_t family = current_cpu_data.x86;
+	uint8_t _model = current_cpu_data.x86_model;
  
 	if (!cpu_has_apic) {
 		printk("xenoprof: Initialization failed. No APIC\n");
xen/include/asm-x86/byteorder.h +4 -4
diff -r 87854d3bed93 xen/include/asm-x86/byteorder.h
@@ -4,17 +4,17 @@
 #include <asm/types.h>
 #include <xen/compiler.h>
 
-static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
+static inline __attribute_const__ uint32_t ___arch__swab32(uint32_t x)
 {
     asm("bswap %0" : "=r" (x) : "0" (x));
     return x;
 }
 
-static inline __attribute_const__ __u64 ___arch__swab64(__u64 val)
+static inline __attribute_const__ uint64_t ___arch__swab64(uint64_t val)
 { 
     union { 
-        struct { __u32 a,b; } s;
-        __u64 u;
+        struct { uint32_t a,b; } s;
+        uint64_t u;
     } v;
     v.u = val;
     asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1" 
xen/include/asm-x86/io_apic.h +4 -4
diff -r 87854d3bed93 xen/include/asm-x86/io_apic.h
@@ -91,7 +91,7 @@ enum ioapic_irq_destination_types {
 };
 
 struct IO_APIC_route_entry {
-	__u32	vector		:  8,
+	uint32_t vector		:  8,
 		delivery_mode	:  3,	/* 000: FIXED
 					 * 001: lowest prio
 					 * 111: ExtINT
@@ -104,19 +104,19 @@ struct IO_APIC_route_entry {
 		mask		:  1,	/* 0: enabled, 1: disabled */
 		__reserved_2	: 15;
 
-	union {		struct { __u32
+	union {		struct { uint32_t
 					__reserved_1	: 24,
 					physical_dest	:  4,
 					__reserved_2	:  4;
 			} physical;
 
-			struct { __u32
+			struct { uint32_t
 					__reserved_1	: 24,
 					logical_dest	:  8;
 			} logical;
 
 			/* used when Interrupt Remapping with EIM is enabled */
-			__u32 dest32;
+			uint32_t dest32;
 	} dest;
 
 } __attribute__ ((packed));
xen/include/asm-x86/msi.h +31 -31

88 lines not on this page · raw message

xen/include/asm-x86/msr.h +4 -4
diff -r 87854d3bed93 xen/include/asm-x86/msr.h
@@ -27,11 +27,11 @@
 			  : /* no outputs */ \
 			  : "c" (msr), "a" (val1), "d" (val2))
 
-static inline void wrmsrl(unsigned int msr, __u64 val)
+static inline void wrmsrl(unsigned int msr, uint64_t val)
 {
-        __u32 lo, hi;
-        lo = (__u32)val;
-        hi = (__u32)(val >> 32);
+        uint32_t lo, hi;
+        lo = (uint32_t)val;
+        hi = (uint32_t)(val >> 32);
         wrmsr(msr, lo, hi);
 }
 
xen/include/asm-x86/processor.h +8 -8
diff -r 87854d3bed93 xen/include/asm-x86/processor.h
@@ -162,10 +162,10 @@ struct vcpu;
 #endif
 
 struct cpuinfo_x86 {
-    __u8 x86;            /* CPU family */
-    __u8 x86_vendor;     /* CPU vendor */
-    __u8 x86_model;
-    __u8 x86_mask;
+    uint8_t x86;            /* CPU family */
+    uint8_t x86_vendor;     /* CPU vendor */
+    uint8_t x86_model;
+    uint8_t x86_mask;
     int  cpuid_level;    /* Maximum supported CPUID level, -1=no CPUID */
     unsigned int x86_capability[NCAPINTS];
     char x86_vendor_id[16];
@@ -173,10 +173,10 @@ struct cpuinfo_x86 {
     int  x86_cache_size; /* in KB - valid for CPUS which support this call  */
     int  x86_cache_alignment;    /* In bytes */
     int  x86_power;
-    __u32 x86_max_cores; /* cpuid returned max cores value */
-    __u32 booted_cores;  /* number of cores as seen by OS */
-    __u32 x86_num_siblings; /* cpuid logical cpus per chip value */
-    __u32 apicid;
+    uint32_t x86_max_cores; /* cpuid returned max cores value */
+    uint32_t booted_cores;  /* number of cores as seen by OS */
+    uint32_t x86_num_siblings; /* cpuid logical cpus per chip value */
+    uint32_t apicid;
     int   phys_proc_id; /* package ID of each logical CPU */
     int   cpu_core_id; /* core ID of each logical CPU*/
     int   compute_unit_id; /* AMD compute unit ID of each logical CPU */
xen/include/asm-x86/types.h +26 -32

79 lines not on this page · raw message

xen/include/xen/bitops.h +5 -5
diff -r 87854d3bed93 xen/include/xen/bitops.h
@@ -77,9 +77,9 @@ static __inline__ int generic_fls(int x)
 #include <asm/bitops.h>
 
 
-static inline int generic_fls64(__u64 x)
+static inline int generic_fls64(uint64_t x)
 {
-    __u32 h = x >> 32;
+    uint32_t h = x >> 32;
     if (h)
         return fls(x) + 32;
     return fls(x);
@@ -132,7 +132,7 @@ static inline unsigned int generic_hweig
     return (res & 0x0F) + ((res >> 4) & 0x0F);
 }
 
-static inline unsigned long generic_hweight64(__u64 w)
+static inline unsigned long generic_hweight64(uint64_t w)
 {
 #if BITS_PER_LONG < 64
     return generic_hweight32((unsigned int)(w >> 32)) +
@@ -159,7 +159,7 @@ static inline unsigned long hweight_long
  * @word: value to rotate
  * @shift: bits to roll
  */
-static inline __u32 rol32(__u32 word, unsigned int shift)
+static inline uint32_t rol32(uint32_t word, unsigned int shift)
 {
     return (word << shift) | (word >> (32 - shift));
 }
@@ -170,7 +170,7 @@ static inline __u32 rol32(__u32 word, un
  * @word: value to rotate
  * @shift: bits to roll
  */
-static inline __u32 ror32(__u32 word, unsigned int shift)
+static inline uint32_t ror32(uint32_t word, unsigned int shift)
 {
     return (word >> shift) | (word << (32 - shift));
 }
xen/include/xen/byteorder/little_endian.h +36 -36

114 lines not on this page · raw message

xen/include/xen/byteorder/swab.h +59 -58

194 lines not on this page · raw message

xen/include/xen/cper.h +20 -20
diff -r 87854d3bed93 xen/include/xen/cper.h
@@ -28,7 +28,7 @@
 extern unsigned long get_sec(void);
 
 typedef struct {
-	__u8 b[16];
+	uint8_t b[16];
 } uuid_le;
 
 static inline int uuid_le_cmp(const uuid_le u1, const uuid_le u2)
@@ -155,36 +155,36 @@ static inline u64 cper_next_record_id(vo
 
 struct cper_record_header {
 	char	signature[CPER_SIG_SIZE];	/* must be CPER_SIG_RECORD */
-	__u16	revision;			/* must be CPER_RECORD_REV */
-	__u32	signature_end;			/* must be CPER_SIG_END */
-	__u16	section_count;
-	__u32	error_severity;
-	__u32	validation_bits;
-	__u32	record_length;
-	__u64	timestamp;
+	uint16_t revision;			/* must be CPER_RECORD_REV */
+	uint32_t signature_end;			/* must be CPER_SIG_END */
+	uint16_t section_count;
+	uint32_t error_severity;
+	uint32_t validation_bits;
+	uint32_t record_length;
+	uint64_t timestamp;
 	uuid_le	platform_id;
 	uuid_le	partition_id;
 	uuid_le	creator_id;
 	uuid_le	notification_type;
-	__u64	record_id;
-	__u32	flags;
-	__u64	persistence_information;
-	__u8	reserved[12];			/* must be zero */
+	uint64_t record_id;
+	uint32_t flags;
+	uint64_t persistence_information;
+	uint8_t	reserved[12];			/* must be zero */
 };
 
 struct cper_section_descriptor {
-	__u32	section_offset;		/* Offset in bytes of the
+	uint32_t section_offset;	/* Offset in bytes of the
 					 *  section body from the base
 					 *  of the record header */
-	__u32	section_length;
-	__u16	revision;		/* must be CPER_RECORD_REV */
-	__u8	validation_bits;
-	__u8	reserved;		/* must be zero */
-	__u32	flags;
+	uint32_t section_length;
+	uint16_t revision;		/* must be CPER_RECORD_REV */
+	uint8_t	validation_bits;
+	uint8_t	reserved;		/* must be zero */
+	uint32_t flags;
 	uuid_le	section_type;
 	uuid_le	fru_id;
-	__u32	section_severity;
-	__u8	fru_text[20];
+	uint32_t section_severity;
+	uint8_t	fru_text[20];
 };
 
 /* Reset to default packing */
xen/include/xen/types.h +6 -22
diff -r 87854d3bed93 xen/include/xen/types.h
@@ -31,30 +31,14 @@ typedef unsigned short          ushort;
 typedef unsigned int            uint;
 typedef unsigned long           ulong;
 
-typedef         __u8            uint8_t;
-typedef         __u8            u_int8_t;
-typedef         __s8            int8_t;
-
-typedef         __u16           uint16_t;
-typedef         __u16           u_int16_t;
-typedef         __s16           int16_t;
-
-typedef         __u32           uint32_t;
-typedef         __u32           u_int32_t;
-typedef         __s32           int32_t;
-
-typedef         __u64           uint64_t;
-typedef         __u64           u_int64_t;
-typedef         __s64           int64_t;
-
 struct domain;
 struct vcpu;
 
-typedef __u16 __le16;
-typedef __u16 __be16;
-typedef __u32 __le32;
-typedef __u32 __be32;
-typedef __u64 __le64;
-typedef __u64 __be64;
+typedef uint16_t __le16;
+typedef uint16_t __be16;
+typedef uint32_t __le32;
+typedef uint32_t __be32;
+typedef uint64_t __le64;
+typedef uint64_t __be64;
 
 #endif /* __TYPES_H__ */

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#1 lore raw
Quoted 3 lines
Quoted 1 line
Quoted 1 line · Christoph Egger

Kill __u*/__s* integer types and use c99 integer types instead. Cleanup <asm-x86/types.h>

Was this build-tested for ia64?

Jan

Quoted 1 line
#2 lore raw
Quoted 5 lines · Jan Beulich
Quoted 3 lines
Quoted 1 line
Quoted 1 line · Christoph Egger

Kill __u*/__s* integer types and use c99 integer types instead. Cleanup<asm-x86/types.h>

Was this build-tested for ia64?

No. I don't have such a machine.
Can you do that, please?

Christoph

Quoted 7 lines

Jan

Quoted 1 line
Signature · 6 lines
---to satisfy European Law for business letters:
Advanced Micro Devices GmbH
Einsteinring 24, 85689 Dornach b. Muenchen
Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632
#3 lore raw
Quoted 9 lines
Quoted 1 line
Quoted 1 line · Christoph Egger
Quoted 5 lines · Jan Beulich
Quoted 3 lines
Quoted 1 line
Quoted 1 line · Christoph Egger

Kill __u*/__s* integer types and use c99 integer types instead. Cleanup<asm-x86/types.h>

Was this build-tested for ia64?

No. I don't have such a machine.

And you don't need to. You can just use a cross tool chain.

Quoted 1 line

Can you do that, please?

I'm trying to avoid having to do (a perhaps massive) cleanup after a patch like this.

If you can't/don't want to do the cross build (given that the ARM bits are sort of ready to be committed, it might be a good idea to check against those bits too), then please adjust the patch so that it won't break the build for arches you don't test.

Jan

#4 lore raw
Quoted 14 lines · Jan Beulich
Quoted 9 lines
Quoted 1 line
Quoted 1 line · Christoph Egger
Quoted 5 lines · Jan Beulich
Quoted 3 lines
Quoted 1 line
Quoted 1 line · Christoph Egger

Kill __u*/__s* integer types and use c99 integer types instead. Cleanup<asm-x86/types.h>

Was this build-tested for ia64?

No. I don't have such a machine.

And you don't need to. You can just use a cross tool chain.

Quoted 1 line

Can you do that, please?

Quoted 7 lines

I'm trying to avoid having to do (a perhaps massive) cleanup after a patch like this.

If you can't/don't want to do the cross build (given that the ARM bits are sort of ready to be committed, it might be a good idea to check against those bits too), then please adjust the patch so that it won't break the build for arches you don't test.

I just figured this out:

<xen/types.h> includes <asm/types.h> which doesn't exist on ia64. So I guess ia64 doesn't build anyway...

Christoph

Signature · 6 lines
---to satisfy European Law for business letters:
Advanced Micro Devices GmbH
Einsteinring 24, 85689 Dornach b. Muenchen
Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd
Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen
Registergericht Muenchen, HRB Nr. 43632
#5 lore raw
Quoted 25 lines
Quoted 1 line
Quoted 1 line · Christoph Egger
Quoted 14 lines · Jan Beulich
Quoted 9 lines
Quoted 1 line
Quoted 1 line · Christoph Egger
Quoted 5 lines · Jan Beulich
Quoted 3 lines
Quoted 1 line
Quoted 1 line · Christoph Egger

Kill __u*/__s* integer types and use c99 integer types instead. Cleanup<asm-x86/types.h>

Was this build-tested for ia64?

No. I don't have such a machine.

And you don't need to. You can just use a cross tool chain.

Quoted 1 line

Can you do that, please?

Quoted 7 lines

I'm trying to avoid having to do (a perhaps massive) cleanup after a patch like this.

If you can't/don't want to do the cross build (given that the ARM bits are sort of ready to be committed, it might be a good idea to check against those bits too), then please adjust the patch so that it won't break the build for arches you don't test.

Quoted 4 lines

I just figured this out:

<xen/types.h> includes <asm/types.h> which doesn't exist on ia64. So I guess ia64 doesn't build anyway...

Which is obviously not the case. There are multiple places where you need to look for such a header on ia64 - in this case, it's in xen/include/asm-ia64/linux-xen/asm.

Jan