Make mach/irqs.h optional

PATCH Superseded Rob Herring 7 participants 28 messages Jan 20, 2012 – Feb 16, 2012

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Rob Herring

author

2012-01-20 20:32 UTC #0 lore raw

v2 cover Make mach/irqs.h optional

From: Rob Herring <[email protected]>

This series removes the include of mach/irqs.h from asm/irq.h when SPARSE_IRQ is selected. Platforms which select SPARSE_IRQ have been updated.

This breaks platforms where SPARSE_IRQ is user selectable. This is on purpose so that SPARSE_IRQ gets properly supported. We could push HAVE_SPARSE_IRQ option down to the platforms that select it if that is preferred. But as recent experience has shown, perhaps breaking platforms is the only way to get some platforms updated.

Platforms either need to set nr_irqs in their machine desc or all irqchips used by a platform need to allocate their irq_descs. There cannot be a mixture. Once this is done, the platforms can select SPARSE_IRQ. shmobile does the latter, and mnp and pxa do the former.

I've built all defconfigs, but don't have any of the affected platforms to boot test. I really need shmobile testing with this series.

Changes from v1:
- Rework SH INTC_NR_IRQS and evt2irq/irq2evt macros
- Add commit "ARM: remove mc146818rtc.h from time.c"
- Add irqs.h removal for picocell
- Fixup newly added platforms in 3.3
- Drop sa1100 rtc changes. Not needed with platform device conversion.
- Make RTC_IRQ define to BUILD_BUG_ON
- Rebase to 3.3-rc1

This series is available here:
git://sources.calxeda.com/kernel/linux.git sparse_irq

Rob

Jamie Iles (1):
ARM: picoxcell: remove mach/irqs.h

Rob Herring (12):
sound: pxa2xx-ac97: include mach/irqs.h directly
gpio: pxa: explicitly include mach/irqs.h
ARM: remove mc146818rtc.h from time.c
ARM: mc146818rtc: remove unnecessary include of mach/irqs.h
ARM: it8152: explicitly include mach/irqs.h
sh: intc: unify evt2irq/irq2evt macros for sh and arm
sh: intc: remove dependency on NR_IRQS
ARM: mmp: remove NR_IRQS
ARM: pxa: remove NR_IRQS
ARM: shmobile: remove NR_IRQS
ARM: only include mach/irqs.h for !SPARSE_IRQ
ARM: highbank: select SPARSE_IRQ and remove irqs.h

 arch/arm/Kconfig                            |    1 +
 arch/arm/include/asm/hardware/it8152.h      |    3 +++
 arch/arm/include/asm/irq.h                  |    8 ++++++--
 arch/arm/include/asm/mc146818rtc.h          |    4 +++-
 arch/arm/kernel/time.c                      |    2 --
 arch/arm/mach-highbank/highbank.c           |    1 -
 arch/arm/mach-highbank/include/mach/irqs.h  |    6 ------
 arch/arm/mach-mmp/aspenite.c                |    5 +++--
 arch/arm/mach-mmp/avengers_lite.c           |    1 +
 arch/arm/mach-mmp/brownstone.c              |    4 ++--
 arch/arm/mach-mmp/flint.c                   |    3 ++-
 arch/arm/mach-mmp/gplugd.c                  |    2 +-
 arch/arm/mach-mmp/include/mach/irqs.h       |    3 +--
 arch/arm/mach-mmp/irq-mmp2.c                |    1 +
 arch/arm/mach-mmp/jasper.c                  |    5 +++--
 arch/arm/mach-mmp/tavorevb.c                |    1 +
 arch/arm/mach-mmp/teton_bga.c               |    3 ++-
 arch/arm/mach-mmp/ttc_dkb.c                 |    4 ++--
 arch/arm/mach-picoxcell/include/mach/irqs.h |   20 --------------------
 arch/arm/mach-pxa/capc7117.c                |    1 +
 arch/arm/mach-pxa/cm-x300.c                 |    1 +
 arch/arm/mach-pxa/colibri-pxa270.c          |    2 ++
 arch/arm/mach-pxa/colibri-pxa300.c          |    1 +
 arch/arm/mach-pxa/colibri-pxa320.c          |    1 +
 arch/arm/mach-pxa/corgi.c                   |    3 +++
 arch/arm/mach-pxa/csb726.c                  |    1 +
 arch/arm/mach-pxa/devices.c                 |    1 +
 arch/arm/mach-pxa/em-x270.c                 |    2 ++
 arch/arm/mach-pxa/gumstix.c                 |    1 +
 arch/arm/mach-pxa/h5000.c                   |    1 +
 arch/arm/mach-pxa/himalaya.c                |    1 +
 arch/arm/mach-pxa/icontrol.c                |    1 +
 arch/arm/mach-pxa/idp.c                     |    1 +
 arch/arm/mach-pxa/include/mach/irqs.h       |    2 +-
 arch/arm/mach-pxa/mioa701.c                 |    1 +
 arch/arm/mach-pxa/mp900.c                   |    1 +
 arch/arm/mach-pxa/palmld.c                  |    1 +
 arch/arm/mach-pxa/palmt5.c                  |    1 +
 arch/arm/mach-pxa/palmtc.c                  |    1 +
 arch/arm/mach-pxa/palmte2.c                 |    1 +
 arch/arm/mach-pxa/palmtreo.c                |    2 ++
 arch/arm/mach-pxa/palmtx.c                  |    1 +
 arch/arm/mach-pxa/palmz72.c                 |    1 +
 arch/arm/mach-pxa/pxa3xx.c                  |    1 +
 arch/arm/mach-pxa/raumfeld.c                |    3 +++
 arch/arm/mach-pxa/saar.c                    |    1 +
 arch/arm/mach-pxa/spitz.c                   |    3 +++
 arch/arm/mach-pxa/stargate2.c               |    1 +
 arch/arm/mach-pxa/tavorevb.c                |    1 +
 arch/arm/mach-pxa/time.c                    |    1 +
 arch/arm/mach-pxa/trizeps4.c                |    2 ++
 arch/arm/mach-pxa/viper.c                   |    1 +
 arch/arm/mach-pxa/vpac270.c                 |    1 +
 arch/arm/mach-pxa/xcep.c                    |    1 +
 arch/arm/mach-pxa/z2.c                      |    1 +
 arch/arm/mach-shmobile/Kconfig              |    4 ++++
 arch/arm/mach-shmobile/board-ag5evm.c       |    1 +
 arch/arm/mach-shmobile/board-bonito.c       |    1 +
 arch/arm/mach-shmobile/board-g3evm.c        |    1 +
 arch/arm/mach-shmobile/board-g4evm.c        |    1 +
 arch/arm/mach-shmobile/board-kota2.c        |    1 +
 arch/arm/mach-shmobile/board-mackerel.c     |    1 +
 arch/arm/mach-shmobile/board-marzen.c       |    1 +
 arch/arm/mach-shmobile/include/mach/irqs.h  |    6 +-----
 arch/arm/mach-shmobile/intc-r8a7740.c       |    1 +
 arch/arm/mach-shmobile/intc-sh7367.c        |    1 +
 arch/arm/mach-shmobile/intc-sh7372.c        |    1 +
 arch/arm/mach-shmobile/intc-sh7377.c        |    1 +
 arch/arm/mach-shmobile/intc-sh73a0.c        |    1 +
 arch/arm/mach-shmobile/setup-r8a7740.c      |    1 +
 arch/arm/mach-shmobile/setup-r8a7779.c      |    1 +
 arch/arm/mach-shmobile/setup-sh7367.c       |    1 +
 arch/arm/mach-shmobile/setup-sh7372.c       |    1 +
 arch/arm/mach-shmobile/setup-sh7377.c       |    1 +
 arch/arm/mach-shmobile/setup-sh73a0.c       |    1 +
 arch/sh/include/asm/irq.h                   |   11 -----------
 drivers/gpio/gpio-pxa.c                     |    2 ++
 drivers/sh/intc/balancing.c                 |    2 +-
 drivers/sh/intc/core.c                      |    2 +-
 drivers/sh/intc/handle.c                    |    2 +-
 drivers/sh/intc/virq.c                      |    2 +-
 include/linux/sh_intc.h                     |   17 +++++++++++++++++
 sound/arm/pxa2xx-ac97-lib.c                 |    2 +-
 83 files changed, 125 insertions(+), 67 deletions(-)
 delete mode 100644 arch/arm/mach-highbank/include/mach/irqs.h
 delete mode 100644 arch/arm/mach-picoxcell/include/mach/irqs.h

Signature · 1 line

1.7.5.4

Rob Herring

author

2012-01-20 20:32 UTC #1 lore raw

PATCH v2 1/13 sound: pxa2xx-ac97: include mach/irqs.h directly

From: Rob Herring <[email protected]>

In preparation of removing mach/irqs.h include from asm/irq.h, include mach/irqs.h directly.

Signed-off-by Rob Herring <[email protected]>

---
 sound/arm/pxa2xx-ac97-lib.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

sound/arm/pxa2xx-ac97-lib.c +1 -1

index d1aa421..0e9e822 100644
@@ -21,7 +21,7 @@
 #include <sound/ac97_codec.h>
 #include <sound/pxa2xx-lib.h>
 
-#include <asm/irq.h>
+#include <mach/irqs.h>
 #include <mach/regs-ac97.h>
 #include <mach/audio.h>

Signature · 1 line

1.7.5.4

Rob Herring

author

2012-01-20 20:33 UTC #2 lore raw

PATCH v2 2/13 gpio: pxa: explicitly include mach/irqs.h

In reply to Rob Herring

From: Rob Herring <[email protected]>

In preparation to make mach/irqs.h optional and remove from asm/irq.h, directly include mach/irq.h to get MMP_GPIO_TO_IRQ and PXA_GPIO_TO_IRQ.

Signed-off-by Rob Herring <[email protected]>

---
 drivers/gpio/gpio-pxa.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

drivers/gpio/gpio-pxa.c +2 -0

index b2d3ee1..5689ce6 100644
@@ -22,6 +22,8 @@
 #include <linux/syscore_ops.h>
 #include <linux/slab.h>
 
+#include <mach/irqs.h>
+
 /*
  * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
  * one set of registers. The register offsets are organized below:

Signature · 1 line

1.7.5.4

Rob Herring

author

2012-01-20 20:33 UTC #3 lore raw

PATCH v2 3/13 ARM: remove mc146818rtc.h from time.c

In reply to Rob Herring

From: Rob Herring <[email protected]>

mc146818rtc.h is not needed in time.c, so remove it.

Signed-off-by Rob Herring <[email protected]>

---
 arch/arm/kernel/time.c |    2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

arch/arm/kernel/time.c +0 -2

index 8c57dd3..6095517 100644
@@ -25,8 +25,6 @@
 #include <linux/timer.h>
 #include <linux/irq.h>
 
-#include <linux/mc146818rtc.h>
-
 #include <asm/leds.h>
 #include <asm/thread_info.h>
 #include <asm/sched_clock.h>

Signature · 1 line

1.7.5.4

Rob Herring

author

2012-01-20 20:33 UTC #4 lore raw

PATCH v2 4/13 ARM: mc146818rtc: remove unnecessary include of mach/irqs.h

In reply to Rob Herring

From: Rob Herring <[email protected]>

The include of mach/irqs.h isn't needed, so remove it. Compiled CMOS rtc driver. Add a check to make sure nothing depends on RTC_IRQ.

Signed-off-by Rob Herring <[email protected]>

---
 arch/arm/include/asm/mc146818rtc.h |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

arch/arm/include/asm/mc146818rtc.h +3 -1

index 6b884d2..e8567bb 100644
@@ -5,7 +5,9 @@
 #define _ASM_MC146818RTC_H
 
 #include <linux/io.h>
-#include <mach/irqs.h>
+#include <linux/kernel.h>
+
+#define RTC_IRQ BUILD_BUG_ON(1)
 
 #ifndef RTC_PORT
 #define RTC_PORT(x)	(0x70 + (x))

Signature · 1 line

1.7.5.4

Rob Herring

author

2012-01-20 20:33 UTC #5 lore raw

PATCH v2 5/13 ARM: it8152: explicitly include mach/irqs.h

In reply to Rob Herring

From: Rob Herring <[email protected]>

In preparation to make mach/irqs.h optional, directly include mach/irq.h to get IRQ_BOARD_START.

Signed-off-by Rob Herring <[email protected]>

---
 arch/arm/include/asm/hardware/it8152.h |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

arch/arm/include/asm/hardware/it8152.h +3 -0

index 43cab49..73f84fa 100644
@@ -9,6 +9,9 @@
 
 #ifndef __ASM_HARDWARE_IT8152_H
 #define __ASM_HARDWARE_IT8152_H
+
+#include <mach/irqs.h>
+
 extern void __iomem *it8152_base_address;
 
 #define IT8152_IO_BASE			(it8152_base_address + 0x03e00000)

Signature · 1 line

1.7.5.4

Rob Herring

author

2012-01-20 20:33 UTC #6 lore raw

PATCH v2 6/13 sh: intc: unify evt2irq/irq2evt macros for sh and arm

In reply to Rob Herring

From: Rob Herring <[email protected]>

Move evt2irq and irq2evt macros definitions out of sh and arm includes into a common location.

Signed-off-by Rob Herring <[email protected]>

---
 arch/arm/mach-shmobile/Kconfig             |    4 ++++
 arch/arm/mach-shmobile/include/mach/irqs.h |    6 ++----
 arch/sh/include/asm/irq.h                  |   11 -----------
 include/linux/sh_intc.h                    |   11 +++++++++++
 4 files changed, 17 insertions(+), 15 deletions(-)

arch/arm/mach-shmobile/Kconfig +4 -0

index 060e564..34560ca 100644
@@ -100,6 +100,10 @@ config MACH_MARZEN
 
 comment "SH-Mobile System Configuration"
 
+config CPU_HAS_INTEVT
+        bool
+	default y
+
 menu "Memory configuration"
 
 config MEMORY_START

arch/arm/mach-shmobile/include/mach/irqs.h +2 -4

index dcb714f..828807d 100644
@@ -1,15 +1,13 @@
 #ifndef __ASM_MACH_IRQS_H
 #define __ASM_MACH_IRQS_H
 
+#include <linux/sh_intc.h>
+
 #define NR_IRQS         1024
 
 /* GIC */
 #define gic_spi(nr)		((nr) + 32)
 
-/* INTCA */
-#define evt2irq(evt)		(((evt) >> 5) - 16)
-#define irq2evt(irq)		(((irq) + 16) << 5)
-
 /* INTCS */
 #define INTCS_VECT_BASE		0x2200
 #define INTCS_VECT(n, vect)	INTC_VECT((n), INTCS_VECT_BASE + (vect))

arch/sh/include/asm/irq.h +0 ~~-11~~

index 45d08b6..2a62017 100644
@@ -21,17 +21,6 @@
 #define NO_IRQ_IGNORE		((unsigned int)-1)
 
 /*
- * Convert back and forth between INTEVT and IRQ values.
- */
-#ifdef CONFIG_CPU_HAS_INTEVT
-#define evt2irq(evt)		(((evt) >> 5) - 16)
-#define irq2evt(irq)		(((irq) + 16) << 5)
-#else
-#define evt2irq(evt)		(evt)
-#define irq2evt(irq)		(irq)
-#endif
-
-/*
  * Simple Mask Register Support
  */
 extern void make_maskreg_irq(unsigned int irq);

include/linux/sh_intc.h +11 -0

index b160645..e1a2ac5 100644
@@ -3,6 +3,17 @@
 
 #include <linux/ioport.h>
 
+/*
+ * Convert back and forth between INTEVT and IRQ values.
+ */
+#ifdef CONFIG_CPU_HAS_INTEVT
+#define evt2irq(evt)		(((evt) >> 5) - 16)
+#define irq2evt(irq)		(((irq) + 16) << 5)
+#else
+#define evt2irq(evt)		(evt)
+#define irq2evt(irq)		(irq)
+#endif
+
 typedef unsigned char intc_enum;
 
 struct intc_vect {

Signature · 1 line

1.7.5.4

Rob Herring

author

2012-01-20 20:33 UTC #7 lore raw

PATCH v2 7/13 sh: intc: remove dependency on NR_IRQS

In reply to Rob Herring

From: Rob Herring <[email protected]>

SH intc has a compile time dependency on NR_IRQS. Make this dependency a local define so that shmobile (and ARM in general) can have run-time NR_IRQS setting.

Signed-off-by Rob Herring <[email protected]>

---
 drivers/sh/intc/balancing.c |    2 +-
 drivers/sh/intc/core.c      |    2 +-
 drivers/sh/intc/handle.c    |    2 +-
 drivers/sh/intc/virq.c      |    2 +-
 include/linux/sh_intc.h     |    6 ++++++
 5 files changed, 10 insertions(+), 4 deletions(-)

drivers/sh/intc/balancing.c +1 -1

index cec7a96..bc78080 100644
@@ -9,7 +9,7 @@
  */
 #include "internals.h"
 
-static unsigned long dist_handle[NR_IRQS];
+static unsigned long dist_handle[INTC_NR_IRQS];
 
 void intc_balancing_enable(unsigned int irq)
 {

drivers/sh/intc/core.c +1 -1

index e53e449..2fde897 100644
@@ -42,7 +42,7 @@ unsigned int nr_intc_controllers;
  * - this needs to be at least 2 for 5-bit priorities on 7780
  */
 static unsigned int default_prio_level = 2;	/* 2 - 16 */
-static unsigned int intc_prio_level[NR_IRQS];	/* for now */
+static unsigned int intc_prio_level[INTC_NR_IRQS];	/* for now */
 
 unsigned int intc_get_dfl_prio_level(void)
 {

drivers/sh/intc/handle.c +1 -1

index 057ce56..f461d53 100644
@@ -13,7 +13,7 @@
 #include <linux/spinlock.h>
 #include "internals.h"
 
-static unsigned long ack_handle[NR_IRQS];
+static unsigned long ack_handle[INTC_NR_IRQS];
 
 static intc_enum __init intc_grp_id(struct intc_desc *desc,
 				    intc_enum enum_id)

drivers/sh/intc/virq.c +1 -1

index c7ec49f..93cec21 100644
@@ -17,7 +17,7 @@
 #include <linux/export.h>
 #include "internals.h"
 
-static struct intc_map_entry intc_irq_xlate[NR_IRQS];
+static struct intc_map_entry intc_irq_xlate[INTC_NR_IRQS];
 
 struct intc_virq_list {
 	unsigned int irq;

include/linux/sh_intc.h +6 -0

index e1a2ac5..6aed080 100644
@@ -3,6 +3,12 @@
 
 #include <linux/ioport.h>
 
+#ifdef CONFIG_SUPERH
+#define INTC_NR_IRQS	512
+#else
+#define INTC_NR_IRQS	1024
+#endif
+
 /*
  * Convert back and forth between INTEVT and IRQ values.
  */

Signature · 1 line

1.7.5.4

Rob Herring

author

2012-01-20 20:33 UTC #8 lore raw

PATCH v2 8/13 ARM: mmp: remove NR_IRQS

In reply to Rob Herring

From: Rob Herring <[email protected]>

Remove NR_IRQS and add a per machine .nr_irqs setting. Clean-up namespace replacing usage of IRQ_BOARD_START with MMP_NR_IRQS.

Signed-off-by Rob Herring <[email protected]>

---
 arch/arm/mach-mmp/aspenite.c          |    5 +++--
 arch/arm/mach-mmp/avengers_lite.c     |    1 +
 arch/arm/mach-mmp/brownstone.c        |    4 ++--
 arch/arm/mach-mmp/flint.c             |    3 ++-
 arch/arm/mach-mmp/gplugd.c            |    2 +-
 arch/arm/mach-mmp/include/mach/irqs.h |    3 +--
 arch/arm/mach-mmp/irq-mmp2.c          |    1 +
 arch/arm/mach-mmp/jasper.c            |    5 +++--
 arch/arm/mach-mmp/tavorevb.c          |    1 +
 arch/arm/mach-mmp/teton_bga.c         |    3 ++-
 arch/arm/mach-mmp/ttc_dkb.c           |    4 ++--
 11 files changed, 19 insertions(+), 13 deletions(-)

arch/arm/mach-mmp/aspenite.c +3 -2

index 17cb760..5483d6f 100644
@@ -24,6 +24,7 @@
 #include <mach/addr-map.h>
 #include <mach/mfp-pxa168.h>
 #include <mach/pxa168.h>
+#include <mach/irqs.h>
 #include <video/pxa168fb.h>
 #include <linux/input.h>
 #include <plat/pxa27x_keypad.h>

@@ -240,7 +241,7 @@ static void __init common_init(void)
 
 MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
 	.map_io		= mmp_map_io,
-	.nr_irqs	= IRQ_BOARD_START,
+	.nr_irqs	= MMP_NR_IRQS,
 	.init_irq       = pxa168_init_irq,
 	.timer          = &pxa168_timer,
 	.init_machine   = common_init,

@@ -249,7 +250,7 @@ MACHINE_END
 
 MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
 	.map_io		= mmp_map_io,
-	.nr_irqs	= IRQ_BOARD_START,
+	.nr_irqs	= MMP_NR_IRQS,
 	.init_irq       = pxa168_init_irq,
 	.timer          = &pxa168_timer,
 	.init_machine   = common_init,

arch/arm/mach-mmp/avengers_lite.c +1 -0

index b148a9d..603542a 100644
@@ -43,6 +43,7 @@ static void __init avengers_lite_init(void)
 
 MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
 	.map_io		= mmp_map_io,
+	.nr_irqs	= MMP_NR_IRQS,
 	.init_irq       = pxa168_init_irq,
 	.timer          = &pxa168_timer,
 	.init_machine   = avengers_lite_init,

arch/arm/mach-mmp/brownstone.c +2 -2

index d839fe6..5cb769c 100644
@@ -28,7 +28,7 @@
 
 #include "common.h"
 
-#define BROWNSTONE_NR_IRQS	(IRQ_BOARD_START + 40)
+#define BROWNSTONE_NR_IRQS	(MMP_NR_IRQS + 40)
 
 #define GPIO_5V_ENABLE		(89)

@@ -158,7 +158,7 @@ static struct platform_device brownstone_v_5vp_device = {
 };
 
 static struct max8925_platform_data brownstone_max8925_info = {
-	.irq_base		= IRQ_BOARD_START,
+	.irq_base		= MMP_NR_IRQS,
 };
 
 static struct i2c_board_info brownstone_twsi1_info[] = {

arch/arm/mach-mmp/flint.c +2 -1

index 2ee8cd7..8059cc0 100644
@@ -23,10 +23,11 @@
 #include <mach/addr-map.h>
 #include <mach/mfp-mmp2.h>
 #include <mach/mmp2.h>
+#include <mach/irqs.h>
 
 #include "common.h"
 
-#define FLINT_NR_IRQS	(IRQ_BOARD_START + 48)
+#define FLINT_NR_IRQS	(MMP_NR_IRQS + 48)
 
 static unsigned long flint_pin_config[] __initdata = {
 	/* UART1 */

arch/arm/mach-mmp/gplugd.c +1 -1

index 8776546..f516e74 100644
@@ -191,7 +191,7 @@ static void __init gplugd_init(void)
 
 MACHINE_START(GPLUGD, "PXA168-based GuruPlug Display (gplugD) Platform")
 	.map_io		= mmp_map_io,
-	.nr_irqs	= IRQ_BOARD_START,
+	.nr_irqs	= MMP_NR_IRQS,
 	.init_irq       = pxa168_init_irq,
 	.timer          = &pxa168_timer,
 	.init_machine   = gplugd_init,

arch/arm/mach-mmp/include/mach/irqs.h +1 -2

index 34635a0..d0e7466 100644
@@ -223,7 +223,6 @@
 #define MMP_GPIO_TO_IRQ(gpio)		(IRQ_GPIO_START + (gpio))
 
 #define IRQ_BOARD_START			(IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)
-
-#define NR_IRQS				(IRQ_BOARD_START)
+#define MMP_NR_IRQS			IRQ_BOARD_START
 
 #endif /* __ASM_MACH_IRQS_H */

arch/arm/mach-mmp/irq-mmp2.c +1 -0

index d21c544..7895d27 100644
@@ -15,6 +15,7 @@
 #include <linux/irq.h>
 #include <linux/io.h>
 
+#include <mach/irqs.h>
 #include <mach/regs-icu.h>
 #include <mach/mmp2.h>

arch/arm/mach-mmp/jasper.c +3 -2

index 96cf5c8..ff73249 100644
@@ -19,6 +19,7 @@
 #include <linux/mfd/max8925.h>
 #include <linux/interrupt.h>
 
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <mach/addr-map.h>

@@ -27,7 +28,7 @@
 
 #include "common.h"
 
-#define JASPER_NR_IRQS		(IRQ_BOARD_START + 48)
+#define JASPER_NR_IRQS		(MMP_NR_IRQS + 48)
 
 static unsigned long jasper_pin_config[] __initdata = {
 	/* UART1 */

@@ -135,7 +136,7 @@ static struct max8925_power_pdata jasper_power_data = {
 static struct max8925_platform_data jasper_max8925_info = {
 	.backlight		= &jasper_backlight_data,
 	.power			= &jasper_power_data,
-	.irq_base		= IRQ_BOARD_START,
+	.irq_base		= MMP_NR_IRQS,
 };
 
 static struct i2c_board_info jasper_twsi1_info[] = {

arch/arm/mach-mmp/tavorevb.c +1 -0

index 8e3b5af0..507e6c0 100644
@@ -102,6 +102,7 @@ static void __init tavorevb_init(void)
 
 MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)")
 	.map_io		= mmp_map_io,
+	.nr_irqs	= MMP_NR_IRQS,
 	.init_irq       = pxa910_init_irq,
 	.timer          = &pxa910_timer,
 	.init_machine   = tavorevb_init,

arch/arm/mach-mmp/teton_bga.c +2 -1

index 0523e42..42bef66 100644
@@ -26,6 +26,7 @@
 #include <mach/mfp-pxa168.h>
 #include <mach/pxa168.h>
 #include <mach/teton_bga.h>
+#include <mach/irqs.h>
 
 #include "common.h"

@@ -83,7 +84,7 @@ static void __init teton_bga_init(void)
 
 MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
 	.map_io		= mmp_map_io,
-	.nr_irqs	= IRQ_BOARD_START,
+	.nr_irqs	= MMP_NR_IRQS,
 	.init_irq       = pxa168_init_irq,
 	.timer          = &pxa168_timer,
 	.init_machine   = teton_bga_init,

arch/arm/mach-mmp/ttc_dkb.c +2 -2

index 5ac5d58..4c5fd5b 100644
@@ -38,7 +38,7 @@
  * 16 board interrupts -- PCA9575 GPIO expander
  * 24 board interrupts -- 88PM860x PMIC
  */
-#define TTCDKB_NR_IRQS		(IRQ_BOARD_START + 16 + 16 + 24)
+#define TTCDKB_NR_IRQS		(MMP_NR_IRQS + 16 + 16 + 24)
 
 static unsigned long ttc_dkb_pin_config[] __initdata = {
 	/* UART2 */

@@ -130,7 +130,7 @@ static struct platform_device *ttc_dkb_devices[] = {
 static struct pca953x_platform_data max7312_data[] = {
 	{
 		.gpio_base	= TTCDKB_GPIO_EXT0(0),
-		.irq_base	= IRQ_BOARD_START,
+		.irq_base	= MMP_NR_IRQS,
 	},
 };

Signature · 1 line

1.7.5.4

Rob Herring

author

2012-01-20 20:33 UTC #9 lore raw

PATCH v2 9/13 ARM: pxa: remove NR_IRQS

In reply to Rob Herring

From: Rob Herring <[email protected]>

Remove NR_IRQS and add a per machine .nr_irqs setting.

Signed-off-by Rob Herring <[email protected]>

---
 arch/arm/mach-pxa/capc7117.c          |    1 +
 arch/arm/mach-pxa/cm-x300.c           |    1 +
 arch/arm/mach-pxa/colibri-pxa270.c    |    2 ++
 arch/arm/mach-pxa/colibri-pxa300.c    |    1 +
 arch/arm/mach-pxa/colibri-pxa320.c    |    1 +
 arch/arm/mach-pxa/corgi.c             |    3 +++
 arch/arm/mach-pxa/csb726.c            |    1 +
 arch/arm/mach-pxa/devices.c           |    1 +
 arch/arm/mach-pxa/em-x270.c           |    2 ++
 arch/arm/mach-pxa/gumstix.c           |    1 +
 arch/arm/mach-pxa/h5000.c             |    1 +
 arch/arm/mach-pxa/himalaya.c          |    1 +
 arch/arm/mach-pxa/icontrol.c          |    1 +
 arch/arm/mach-pxa/idp.c               |    1 +
 arch/arm/mach-pxa/include/mach/irqs.h |    2 +-
 arch/arm/mach-pxa/mioa701.c           |    1 +
 arch/arm/mach-pxa/mp900.c             |    1 +
 arch/arm/mach-pxa/palmld.c            |    1 +
 arch/arm/mach-pxa/palmt5.c            |    1 +
 arch/arm/mach-pxa/palmtc.c            |    1 +
 arch/arm/mach-pxa/palmte2.c           |    1 +
 arch/arm/mach-pxa/palmtreo.c          |    2 ++
 arch/arm/mach-pxa/palmtx.c            |    1 +
 arch/arm/mach-pxa/palmz72.c           |    1 +
 arch/arm/mach-pxa/pxa3xx.c            |    1 +
 arch/arm/mach-pxa/raumfeld.c          |    3 +++
 arch/arm/mach-pxa/saar.c              |    1 +
 arch/arm/mach-pxa/spitz.c             |    3 +++
 arch/arm/mach-pxa/stargate2.c         |    1 +
 arch/arm/mach-pxa/tavorevb.c          |    1 +
 arch/arm/mach-pxa/time.c              |    1 +
 arch/arm/mach-pxa/trizeps4.c          |    2 ++
 arch/arm/mach-pxa/viper.c             |    1 +
 arch/arm/mach-pxa/vpac270.c           |    1 +
 arch/arm/mach-pxa/xcep.c              |    1 +
 arch/arm/mach-pxa/z2.c                |    1 +
 36 files changed, 46 insertions(+), 1 deletions(-)

arch/arm/mach-pxa/capc7117.c +1 -0

index c91727d..9a8760b 100644
@@ -150,6 +150,7 @@ MACHINE_START(CAPC7117,
 	      "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM")
 	.atag_offset = 0x100,
 	.map_io = pxa3xx_map_io,
+	.nr_irqs = PXA_NR_IRQS,
 	.init_irq = pxa3xx_init_irq,
 	.handle_irq = pxa3xx_handle_irq,
 	.timer = &pxa_timer,

arch/arm/mach-pxa/cm-x300.c +1 -0

index 4b981b8..133ccee 100644
@@ -853,6 +853,7 @@ static void __init cm_x300_fixup(struct tag *tags, char **cmdline,
 MACHINE_START(CM_X300, "CM-X300 module")
 	.atag_offset	= 0x100,
 	.map_io		= pxa3xx_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa3xx_init_irq,
 	.handle_irq	= pxa3xx_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/colibri-pxa270.c +2 -0

index 29d5d54..b2f227d 100644
@@ -310,6 +310,7 @@ MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
 	.atag_offset	= 0x100,
 	.init_machine	= colibri_pxa270_init,
 	.map_io		= pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

@@ -320,6 +321,7 @@ MACHINE_START(INCOME, "Income s.r.o. SH-Dmaster PXA270 SBC")
 	.atag_offset	= 0x100,
 	.init_machine	= colibri_pxa270_income_init,
 	.map_io		= pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/colibri-pxa300.c +1 -0

index 0846d21..bb6def8 100644
@@ -186,6 +186,7 @@ MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
 	.atag_offset	= 0x100,
 	.init_machine	= colibri_pxa300_init,
 	.map_io		= pxa3xx_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa3xx_init_irq,
 	.handle_irq	= pxa3xx_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/colibri-pxa320.c +1 -0

index 6ad3359..d88e7b3 100644
@@ -256,6 +256,7 @@ MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
 	.atag_offset	= 0x100,
 	.init_machine	= colibri_pxa320_init,
 	.map_io		= pxa3xx_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa3xx_init_irq,
 	.handle_irq	= pxa3xx_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/corgi.c +3 -0

index 11f1e73..039aafa 100644
@@ -730,6 +730,7 @@ static void __init fixup_corgi(struct tag *tags, char **cmdline,
 MACHINE_START(CORGI, "SHARP Corgi")
 	.fixup		= fixup_corgi,
 	.map_io		= pxa25x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa25x_init_irq,
 	.handle_irq	= pxa25x_handle_irq,
 	.init_machine	= corgi_init,

@@ -742,6 +743,7 @@ MACHINE_END
 MACHINE_START(SHEPHERD, "SHARP Shepherd")
 	.fixup		= fixup_corgi,
 	.map_io		= pxa25x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa25x_init_irq,
 	.handle_irq	= pxa25x_handle_irq,
 	.init_machine	= corgi_init,

@@ -754,6 +756,7 @@ MACHINE_END
 MACHINE_START(HUSKY, "SHARP Husky")
 	.fixup		= fixup_corgi,
 	.map_io		= pxa25x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa25x_init_irq,
 	.handle_irq	= pxa25x_handle_irq,
 	.init_machine	= corgi_init,

arch/arm/mach-pxa/csb726.c +1 -0

index fb5a51d..67f0de3 100644
@@ -274,6 +274,7 @@ static void __init csb726_init(void)
 MACHINE_START(CSB726, "Cogent CSB726")
 	.atag_offset	= 0x100,
 	.map_io         = pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq       = pxa27x_init_irq,
 	.handle_irq       = pxa27x_handle_irq,
 	.init_machine   = csb726_init,

arch/arm/mach-pxa/devices.c +1 -0

index 18fd177..72a15a6 100644
@@ -12,6 +12,7 @@
 #include <mach/pxafb.h>
 #include <mach/mmc.h>
 #include <mach/irda.h>
+#include <mach/irqs.h>
 #include <mach/ohci.h>
 #include <plat/pxa27x_keypad.h>
 #include <mach/camera.h>

arch/arm/mach-pxa/em-x270.c +2 -0

index d80c0ba..c1b65da 100644
@@ -1301,6 +1301,7 @@ static void __init em_x270_init(void)
 MACHINE_START(EM_X270, "Compulab EM-X270")
 	.atag_offset	= 0x100,
 	.map_io		= pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

@@ -1311,6 +1312,7 @@ MACHINE_END
 MACHINE_START(EXEDA, "Compulab eXeda")
 	.atag_offset	= 0x100,
 	.map_io		= pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/gumstix.c +1 -0

index ac3b1ce..e529a35 100644
@@ -235,6 +235,7 @@ static void __init gumstix_init(void)
 MACHINE_START(GUMSTIX, "Gumstix")
 	.atag_offset	= 0x100, /* match u-boot bi_boot_params */
 	.map_io		= pxa25x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa25x_init_irq,
 	.handle_irq	= pxa25x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/h5000.c +1 -0

index fde6b4c..e7dec58 100644
@@ -205,6 +205,7 @@ static void __init h5000_init(void)
 MACHINE_START(H5400, "HP iPAQ H5000")
 	.atag_offset = 0x100,
 	.map_io = pxa25x_map_io,
+	.nr_irqs = PXA_NR_IRQS,
 	.init_irq = pxa25x_init_irq,
 	.handle_irq = pxa25x_handle_irq,
 	.timer = &pxa_timer,

arch/arm/mach-pxa/himalaya.c +1 -0

index 26d069a..2962de8 100644
@@ -160,6 +160,7 @@ static void __init himalaya_init(void)
 MACHINE_START(HIMALAYA, "HTC Himalaya")
 	.atag_offset = 0x100,
 	.map_io = pxa25x_map_io,
+	.nr_irqs = PXA_NR_IRQS,
 	.init_irq = pxa25x_init_irq,
 	.handle_irq = pxa25x_handle_irq,
 	.init_machine = himalaya_init,

arch/arm/mach-pxa/icontrol.c +1 -0

index 6740019..1d02eab 100644
@@ -193,6 +193,7 @@ static void __init icontrol_init(void)
 MACHINE_START(ICONTROL, "iControl/SafeTcam boards using Embedian MXM-8x10 CoM")
 	.atag_offset	= 0x100,
 	.map_io		= pxa3xx_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa3xx_init_irq,
 	.handle_irq	= pxa3xx_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/idp.c +1 -0

index 8af1840..6ff466b 100644
@@ -195,6 +195,7 @@ static void __init idp_map_io(void)
 MACHINE_START(PXA_IDP, "Vibren PXA255 IDP")
 	/* Maintainer: Vibren Technologies */
 	.map_io		= idp_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa25x_init_irq,
 	.handle_irq	= pxa25x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/include/mach/irqs.h +1 -1

index 32975ad..8765782 100644
@@ -100,7 +100,7 @@
  */
 #define IRQ_BOARD_START		(PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO)
 
-#define NR_IRQS			(IRQ_BOARD_START)
+#define PXA_NR_IRQS		(IRQ_BOARD_START)
 
 #ifndef __ASSEMBLY__
 struct irq_data;

arch/arm/mach-pxa/mioa701.c +1 -0

index e80a3db..061d570 100644
@@ -758,6 +758,7 @@ MACHINE_START(MIOA701, "MIO A701")
 	.atag_offset	= 0x100,
 	.restart_mode	= 's',
 	.map_io		= &pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= &pxa27x_init_irq,
 	.handle_irq	= &pxa27x_handle_irq,
 	.init_machine	= mioa701_machine_init,

arch/arm/mach-pxa/mp900.c +1 -0

index 169bf8f..152efbf 100644
@@ -95,6 +95,7 @@ MACHINE_START(NEC_MP900, "MobilePro900/C")
 	.atag_offset	= 0x220100,
 	.timer		= &pxa_timer,
 	.map_io		= pxa25x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa25x_init_irq,
 	.handle_irq	= pxa25x_handle_irq,
 	.init_machine	= mp900c_init,

arch/arm/mach-pxa/palmld.c +1 -0

index 1fa80f4f..31e0433 100644
@@ -344,6 +344,7 @@ static void __init palmld_init(void)
 MACHINE_START(PALMLD, "Palm LifeDrive")
 	.atag_offset	= 0x100,
 	.map_io		= palmld_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/palmt5.c +1 -0

index 5ba1431..0f6bd4f 100644
@@ -205,6 +205,7 @@ MACHINE_START(PALMT5, "Palm Tungsten|T5")
 	.atag_offset	= 0x100,
 	.map_io		= pxa27x_map_io,
 	.reserve	= palmt5_reserve,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/palmtc.c +1 -0

index 29b51b4..e2d97ee 100644
@@ -539,6 +539,7 @@ static void __init palmtc_init(void)
 MACHINE_START(PALMTC, "Palm Tungsten|C")
 	.atag_offset 	= 0x100,
 	.map_io		= pxa25x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa25x_init_irq,
 	.handle_irq	= pxa25x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/palmte2.c +1 -0

index 5ebf49acb..c054827 100644
@@ -358,6 +358,7 @@ static void __init palmte2_init(void)
 MACHINE_START(PALMTE2, "Palm Tungsten|E2")
 	.atag_offset	= 0x100,
 	.map_io		= pxa25x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa25x_init_irq,
 	.handle_irq	= pxa25x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/palmtreo.c +2 -0

index ec82491..fbdebee 100644
@@ -448,6 +448,7 @@ MACHINE_START(TREO680, "Palm Treo 680")
 	.atag_offset    = 0x100,
 	.map_io         = pxa27x_map_io,
 	.reserve	= treo_reserve,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq       = pxa27x_init_irq,
 	.handle_irq       = pxa27x_handle_irq,
 	.timer          = &pxa_timer,

@@ -461,6 +462,7 @@ MACHINE_START(CENTRO, "Palm Centro 685")
 	.atag_offset    = 0x100,
 	.map_io         = pxa27x_map_io,
 	.reserve	= treo_reserve,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq       = pxa27x_init_irq,
 	.handle_irq       = pxa27x_handle_irq,
 	.timer          = &pxa_timer,

arch/arm/mach-pxa/palmtx.c +1 -0

index 6170d76..9507605 100644
@@ -366,6 +366,7 @@ static void __init palmtx_init(void)
 MACHINE_START(PALMTX, "Palm T|X")
 	.atag_offset	= 0x100,
 	.map_io		= palmtx_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/palmz72.c +1 -0

index b2dff9d..a97b599 100644
@@ -401,6 +401,7 @@ static void __init palmz72_init(void)
 MACHINE_START(PALMZ72, "Palm Zire72")
 	.atag_offset	= 0x100,
 	.map_io		= pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/pxa3xx.c +1 -0

index f107c71..d2e562d 100644
@@ -31,6 +31,7 @@
 #include <mach/pm.h>
 #include <mach/dma.h>
 #include <mach/smemc.h>
+#include <mach/irqs.h>
 
 #include "generic.h"
 #include "devices.h"

arch/arm/mach-pxa/raumfeld.c +3 -0

index 22818c7..7d691e5 100644
@@ -1090,6 +1090,7 @@ MACHINE_START(RAUMFELD_RC, "Raumfeld Controller")
 	.atag_offset	= 0x100,
 	.init_machine	= raumfeld_controller_init,
 	.map_io		= pxa3xx_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa3xx_init_irq,
 	.handle_irq	= pxa3xx_handle_irq,
 	.timer		= &pxa_timer,

@@ -1102,6 +1103,7 @@ MACHINE_START(RAUMFELD_CONNECTOR, "Raumfeld Connector")
 	.atag_offset	= 0x100,
 	.init_machine	= raumfeld_connector_init,
 	.map_io		= pxa3xx_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa3xx_init_irq,
 	.handle_irq	= pxa3xx_handle_irq,
 	.timer		= &pxa_timer,

@@ -1114,6 +1116,7 @@ MACHINE_START(RAUMFELD_SPEAKER, "Raumfeld Speaker")
 	.atag_offset	= 0x100,
 	.init_machine	= raumfeld_speaker_init,
 	.map_io		= pxa3xx_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa3xx_init_irq,
 	.handle_irq	= pxa3xx_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/saar.c +1 -0

index 0fe354e..86c95a5 100644
@@ -598,6 +598,7 @@ MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)")
 	/* Maintainer: Eric Miao <[email protected]> */
 	.atag_offset    = 0x100,
 	.map_io         = pxa3xx_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq       = pxa3xx_init_irq,
 	.handle_irq       = pxa3xx_handle_irq,
 	.timer          = &pxa_timer,

arch/arm/mach-pxa/spitz.c +3 -0

index abf355d..df2ab0f 100644
@@ -984,6 +984,7 @@ MACHINE_START(SPITZ, "SHARP Spitz")
 	.restart_mode	= 'g',
 	.fixup		= spitz_fixup,
 	.map_io		= pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.init_machine	= spitz_init,

@@ -997,6 +998,7 @@ MACHINE_START(BORZOI, "SHARP Borzoi")
 	.restart_mode	= 'g',
 	.fixup		= spitz_fixup,
 	.map_io		= pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.init_machine	= spitz_init,

@@ -1010,6 +1012,7 @@ MACHINE_START(AKITA, "SHARP Akita")
 	.restart_mode	= 'g',
 	.fixup		= spitz_fixup,
 	.map_io		= pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.init_machine	= spitz_init,

arch/arm/mach-pxa/stargate2.c +1 -0

index b0656e15..adb601a 100644
@@ -1006,6 +1006,7 @@ static void __init stargate2_init(void)
 #ifdef CONFIG_MACH_INTELMOTE2
 MACHINE_START(INTELMOTE2, "IMOTE 2")
 	.map_io		= pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/tavorevb.c +1 -0

index 9fb38e8..736bfdc 100644
@@ -491,6 +491,7 @@ MACHINE_START(TAVOREVB, "PXA930 Evaluation Board (aka TavorEVB)")
 	/* Maintainer: Eric Miao <[email protected]> */
 	.atag_offset    = 0x100,
 	.map_io         = pxa3xx_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq       = pxa3xx_init_irq,
 	.handle_irq       = pxa3xx_handle_irq,
 	.timer          = &pxa_timer,

arch/arm/mach-pxa/time.c +1 -0

index b503049..3d6c9bd 100644
@@ -22,6 +22,7 @@
 #include <asm/mach/time.h>
 #include <asm/sched_clock.h>
 #include <mach/regs-ost.h>
+#include <mach/irqs.h>
 
 /*
  * This is PXA's sched_clock implementation. This has a resolution

arch/arm/mach-pxa/trizeps4.c +2 -0

index 0f30af6..2b6ac00 100644
@@ -558,6 +558,7 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
 	.atag_offset	= 0x100,
 	.init_machine	= trizeps4_init,
 	.map_io		= trizeps4_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

@@ -569,6 +570,7 @@ MACHINE_START(TRIZEPS4WL, "Keith und Koep Trizeps IV-WL module")
 	.atag_offset	= 0x100,
 	.init_machine	= trizeps4_init,
 	.map_io		= trizeps4_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/viper.c +1 -0

index 023d6ca..3143c39 100644
@@ -994,6 +994,7 @@ MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
 	/* Maintainer: Marc Zyngier <[email protected]> */
 	.atag_offset	= 0x100,
 	.map_io		= viper_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= viper_init_irq,
 	.handle_irq	= pxa25x_handle_irq,
 	.timer          = &pxa_timer,

arch/arm/mach-pxa/vpac270.c +1 -0

index 1f5cfa9..c57ab63 100644
@@ -718,6 +718,7 @@ static void __init vpac270_init(void)
 MACHINE_START(VPAC270, "Voipac PXA270")
 	.atag_offset	= 0x100,
 	.map_io		= pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/xcep.c +1 -0

index 4bbe9a3..4275713 100644
@@ -182,6 +182,7 @@ MACHINE_START(XCEP, "Iskratel XCEP")
 	.atag_offset	= 0x100,
 	.init_machine	= xcep_init,
 	.map_io		= pxa25x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa25x_init_irq,
 	.handle_irq	= pxa25x_handle_irq,
 	.timer		= &pxa_timer,

arch/arm/mach-pxa/z2.c +1 -0

index b647684..fa86199 100644
@@ -721,6 +721,7 @@ static void __init z2_init(void)
 MACHINE_START(ZIPIT2, "Zipit Z2")
 	.atag_offset	= 0x100,
 	.map_io		= pxa27x_map_io,
+	.nr_irqs	= PXA_NR_IRQS,
 	.init_irq	= pxa27x_init_irq,
 	.handle_irq	= pxa27x_handle_irq,
 	.timer		= &pxa_timer,

Signature · 1 line

1.7.5.4

Rob Herring

author

2012-01-20 20:33 UTC #10 lore raw

PATCH v2 10/13 ARM: shmobile: remove NR_IRQS

In reply to Rob Herring

From: Rob Herring <[email protected]>

Remove NR_IRQS and explicitly include mach/irqs.h as needed. shmobile properly allocates irq_descs for each irqchip, so setting .nr_irqs for each machine is not needed.

Signed-off-by Rob Herring <[email protected]>

---
 arch/arm/mach-shmobile/board-ag5evm.c      |    1 +
 arch/arm/mach-shmobile/board-bonito.c      |    1 +
 arch/arm/mach-shmobile/board-g3evm.c       |    1 +
 arch/arm/mach-shmobile/board-g4evm.c       |    1 +
 arch/arm/mach-shmobile/board-kota2.c       |    1 +
 arch/arm/mach-shmobile/board-mackerel.c    |    1 +
 arch/arm/mach-shmobile/board-marzen.c      |    1 +
 arch/arm/mach-shmobile/include/mach/irqs.h |    2 --
 arch/arm/mach-shmobile/intc-r8a7740.c      |    1 +
 arch/arm/mach-shmobile/intc-sh7367.c       |    1 +
 arch/arm/mach-shmobile/intc-sh7372.c       |    1 +
 arch/arm/mach-shmobile/intc-sh7377.c       |    1 +
 arch/arm/mach-shmobile/intc-sh73a0.c       |    1 +
 arch/arm/mach-shmobile/setup-r8a7740.c     |    1 +
 arch/arm/mach-shmobile/setup-r8a7779.c     |    1 +
 arch/arm/mach-shmobile/setup-sh7367.c      |    1 +
 arch/arm/mach-shmobile/setup-sh7372.c      |    1 +
 arch/arm/mach-shmobile/setup-sh7377.c      |    1 +
 arch/arm/mach-shmobile/setup-sh73a0.c      |    1 +
 19 files changed, 18 insertions(+), 2 deletions(-)

arch/arm/mach-shmobile/board-ag5evm.c +1 -0

index eff8a96..e922e92 100644
@@ -42,6 +42,7 @@
 #include <video/sh_mipi_dsi.h>
 #include <sound/sh_fsi.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>

arch/arm/mach-shmobile/board-bonito.c +1 -0

index 4d22016..df9a653 100644
@@ -34,6 +34,7 @@
 #include <asm/mach/time.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <mach/r8a7740.h>
+#include <mach/irqs.h>
 #include <video/sh_mobile_lcdc.h>
 
 /*

arch/arm/mach-shmobile/board-g3evm.c +1 -0

index 72d5572..6dbdc42 100644
@@ -33,6 +33,7 @@
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
 #include <linux/dma-mapping.h>
+#include <mach/irqs.h>
 #include <mach/sh7367.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>

arch/arm/mach-shmobile/board-g4evm.c +1 -0

index 2220b88..2936ccc 100644
@@ -34,6 +34,7 @@
 #include <linux/mmc/sh_mobile_sdhi.h>
 #include <linux/gpio.h>
 #include <linux/dma-mapping.h>
+#include <mach/irqs.h>
 #include <mach/sh7377.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>

arch/arm/mach-shmobile/board-kota2.c +1 -0

index 857ceee..c71780b 100644
@@ -39,6 +39,7 @@
 #include <linux/mfd/tmio.h>
 #include <linux/mmc/sh_mobile_sdhi.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>

arch/arm/mach-shmobile/board-mackerel.c +1 -0

index 9b42fbd..73f0097 100644
@@ -55,6 +55,7 @@
 #include <sound/sh_fsi.h>
 
 #include <mach/common.h>
+#include <mach/irqs.h>
 #include <mach/sh7372.h>
 
 #include <asm/mach/arch.h>

arch/arm/mach-shmobile/board-marzen.c +1 -0

index f0e02c0..3b2e88a 100644
@@ -31,6 +31,7 @@
 #include <mach/hardware.h>
 #include <mach/r8a7779.h>
 #include <mach/common.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>

arch/arm/mach-shmobile/include/mach/irqs.h +0 -2

index 828807d..4e686cc2 100644
@@ -3,8 +3,6 @@
 
 #include <linux/sh_intc.h>
 
-#define NR_IRQS         1024
-
 /* GIC */
 #define gic_spi(nr)		((nr) + 32)

arch/arm/mach-shmobile/intc-r8a7740.c +1 -0

index 272c84c..09c42af 100644
@@ -25,6 +25,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

arch/arm/mach-shmobile/intc-sh7367.c +1 -0

index cfde9bf..5bf7764 100644
@@ -23,6 +23,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

arch/arm/mach-shmobile/intc-sh7372.c +1 -0

index 89afcab..6447e0a 100644
@@ -23,6 +23,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

arch/arm/mach-shmobile/intc-sh7377.c +1 -0

index 2af4e6e..b84a460 100644
@@ -23,6 +23,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

arch/arm/mach-shmobile/intc-sh73a0.c +1 -0

index 1eda6b0..9a8207c 100644
@@ -23,6 +23,7 @@
 #include <linux/io.h>
 #include <linux/sh_intc.h>
 #include <mach/intc.h>
+#include <mach/irqs.h>
 #include <mach/sh73a0.h>
 #include <asm/hardware/gic.h>
 #include <asm/mach-types.h>

arch/arm/mach-shmobile/setup-r8a7740.c +1 -0

index 986dca6..fa15d81 100644
@@ -25,6 +25,7 @@
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
 #include <mach/r8a7740.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

arch/arm/mach-shmobile/setup-r8a7779.c +1 -0

index 4725663..55df21a 100644
@@ -29,6 +29,7 @@
 #include <linux/sh_intc.h>
 #include <linux/sh_timer.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/r8a7779.h>
 #include <mach/common.h>
 #include <asm/mach-types.h>

arch/arm/mach-shmobile/setup-sh7367.c +1 -0

index e546017..8e848198 100644
@@ -29,6 +29,7 @@
 #include <linux/serial_sci.h>
 #include <linux/sh_timer.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

arch/arm/mach-shmobile/setup-sh7372.c +1 -0

index 6fcf304..420d25c 100644
@@ -32,6 +32,7 @@
 #include <linux/sh_timer.h>
 #include <linux/pm_domain.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/sh7372.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

arch/arm/mach-shmobile/setup-sh7377.c +1 -0

index bb405b8..747ed8e 100644
@@ -30,6 +30,7 @@
 #include <linux/sh_intc.h>
 #include <linux/sh_timer.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

arch/arm/mach-shmobile/setup-sh73a0.c +1 -0

index 20e71e5..7bf740e 100644
@@ -31,6 +31,7 @@
 #include <linux/sh_intc.h>
 #include <linux/sh_timer.h>
 #include <mach/hardware.h>
+#include <mach/irqs.h>
 #include <mach/sh73a0.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

Signature · 1 line

1.7.5.4

Rob Herring

author

2012-01-20 20:33 UTC #11 lore raw

PATCH v2 11/13 ARM: only include mach/irqs.h for !SPARSE_IRQ

In reply to Rob Herring

From: Rob Herring <[email protected]>

Make mach/irqs.h optional for SPARSE_IRQ. With this change irqs.h can be removed by converting platforms over to sparse irq.

This intentionally breaks platforms that enable SPARSE_IRQ.

Signed-off-by Rob Herring <[email protected]>

---
 arch/arm/include/asm/irq.h |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

arch/arm/include/asm/irq.h +6 -2

index 5a526af..35c21c3 100644
@@ -1,14 +1,18 @@
 #ifndef __ASM_ARM_IRQ_H
 #define __ASM_ARM_IRQ_H
 
+#define NR_IRQS_LEGACY	16
+
+#ifndef CONFIG_SPARSE_IRQ
 #include <mach/irqs.h>
+#else
+#define NR_IRQS NR_IRQS_LEGACY
+#endif
 
 #ifndef irq_canonicalize
 #define irq_canonicalize(i)	(i)
 #endif
 
-#define NR_IRQS_LEGACY	16
-
 /*
  * Use this value to indicate lack of interrupt
  * capability

Signature · 1 line

1.7.5.4

Nicolas Pitre

2012-01-20 21:11 UTC #12 lore raw

PATCH v2 11/13 ARM: only include mach/irqs.h for !SPARSE_IRQ

Quoted 6 lines · Rob Herring

From: Rob Herring <[email protected]>
Make mach/irqs.h optional for SPARSE_IRQ. With this change irqs.h can be removed by converting platforms over to sparse irq.
This intentionally breaks platforms that enable SPARSE_IRQ.

I don't get what you mean here. The above seems contradictory.

Nicolas

Rob Herring

author

2012-01-20 21:23 UTC #13 lore raw

PATCH v2 11/13 ARM: only include mach/irqs.h for !SPARSE_IRQ

Quoted 11 lines · Nicolas Pitre

Quoted 6 lines · Rob Herring
From: Rob Herring <[email protected]>
Make mach/irqs.h optional for SPARSE_IRQ. With this change irqs.h can be removed by converting platforms over to sparse irq.
This intentionally breaks platforms that enable SPARSE_IRQ.
I don't get what you mean here. The above seems contradictory.

You're right. The intro explains things more clearly. This breaks platforms (at boot time) that don't select SPARSE_IRQ, but let users enable it in their config. I don't understand why sparse irq is a user visible config option. We could move HAVE_SPARSE_IRQ down to each platform that selects SPARSE_IRQ and prevent enabling, but I think allowing it to break is good encouragement for others to fix those platforms. I'm open to other ideas.

Rob

Nicolas Pitre

2012-01-20 22:48 UTC #14 lore raw

PATCH v2 11/13 ARM: only include mach/irqs.h for !SPARSE_IRQ

Quoted 8 lines · Rob Herring

Quoted 7 lines · Nicolas Pitre
Quoted 5 lines · Rob Herring
From: Rob Herring <[email protected]>
Make mach/irqs.h optional for SPARSE_IRQ. With this change irqs.h can be removed by converting platforms over to sparse irq.

Quoted 6 lines

Quoted 4 lines
Quoted 1 line
This intentionally breaks platforms that enable SPARSE_IRQ.
I don't get what you mean here. The above seems contradictory.
You're right. The intro explains things more clearly.

The intro won't be part of the git history, so please make sure individual commit logs are sensible on their own.

Quoted 6 lines

This breaks platforms (at boot time) that don't select SPARSE_IRQ, but let users enable it in their config. I don't understand why sparse irq is a user visible config option. We could move HAVE_SPARSE_IRQ down to each platform that selects SPARSE_IRQ and prevent enabling, but I think allowing it to break is good encouragement for others to fix those platforms. I'm open to other ideas.

SPARSE_IRQ shouldn't be a user configurable option. There is just no point for a user configuring a kernel to be able to change this.

Nicolas

Quoted 3 lines

Rob

Rob Herring

author

2012-01-25 19:23 UTC #15 lore raw

PATCH v2 11/13 ARM: only include mach/irqs.h for !SPARSE_IRQ

Quoted 12 lines · Nicolas Pitre

Quoted 10 lines · Rob Herring
Quoted 9 lines · Nicolas Pitre
Quoted 6 lines · Rob Herring
From: Rob Herring <[email protected]>
Make mach/irqs.h optional for SPARSE_IRQ. With this change irqs.h can be removed by converting platforms over to sparse irq.
This intentionally breaks platforms that enable SPARSE_IRQ.

Quoted 7 lines

Quoted 4 lines
Quoted 2 lines
I don't get what you mean here. The above seems contradictory.
You're right. The intro explains things more clearly.
The intro won't be part of the git history, so please make sure individual commit logs are sensible on their own.

Updated the commit message to this (w/o the email word wrapping):

ARM: only include mach/irqs.h for !SPARSE_IRQ

Make mach/irqs.h optional for SPARSE_IRQ. With this change irqs.h can be removed by converting platforms over to sparse irq.

This may break platforms where SPARSE_IRQ is user selectable and is enabled. This is on purpose so that SPARSE_IRQ gets properly supported. SPARSE_IRQ should not really be a user visible option.

Quoted 9 lines

Quoted 6 lines
This breaks platforms (at boot time) that don't select SPARSE_IRQ, but let users enable it in their config. I don't understand why sparse irq is a user visible config option. We could move HAVE_SPARSE_IRQ down to each platform that selects SPARSE_IRQ and prevent enabling, but I think allowing it to break is good encouragement for others to fix those platforms. I'm open to other ideas.
SPARSE_IRQ shouldn't be a user configurable option. There is just no point for a user configuring a kernel to be able to change this.

I agree, but I'm inclined to leave this alone for now. PPC doesn't ever select SPARSE_IRQ, but enables it via many defconfigs. So I think changing it may cause some problems.

Any other comments on this series? I guess all the maintainers copied are happy with it as there have been no other comments. I like to get this into next now and send pull request to Russell or arm-soc.

Rob

Grant Likely

2012-01-30 15:01 UTC #16 lore raw

PATCH v2 11/13 ARM: only include mach/irqs.h for !SPARSE_IRQ

Quoted 44 lines · Rob Herring

Quoted 12 lines · Nicolas Pitre
Quoted 10 lines · Rob Herring
Quoted 9 lines · Nicolas Pitre
Quoted 6 lines · Rob Herring
From: Rob Herring <[email protected]>
Make mach/irqs.h optional for SPARSE_IRQ. With this change irqs.h can be removed by converting platforms over to sparse irq.
This intentionally breaks platforms that enable SPARSE_IRQ.
Quoted 7 lines
Quoted 4 lines
Quoted 2 lines
I don't get what you mean here. The above seems contradictory.
You're right. The intro explains things more clearly.
The intro won't be part of the git history, so please make sure individual commit logs are sensible on their own.
Updated the commit message to this (w/o the email word wrapping):
ARM: only include mach/irqs.h for !SPARSE_IRQ
Make mach/irqs.h optional for SPARSE_IRQ. With this change irqs.h can be removed by converting platforms over to sparse irq.
This may break platforms where SPARSE_IRQ is user selectable and is enabled. This is on purpose so that SPARSE_IRQ gets properly supported. SPARSE_IRQ should not really be a user visible option.
Platforms either need to set nr_irqs in their machine desc or all irqchips used by a platform need to allocate their irq_descs. There cannot be a mixture. Once this is done, the platforms can select SPARSE_IRQ. shmobile does the latter, and mmp and pxa do the former.
Quoted 7 lines
Quoted 6 lines
This breaks platforms (at boot time) that don't select SPARSE_IRQ, but let users enable it in their config. I don't understand why sparse irq is a user visible config option. We could move HAVE_SPARSE_IRQ down to each platform that selects SPARSE_IRQ and prevent enabling, but I think allowing it to break is good encouragement for others to fix those platforms. I'm open to other ideas.

Quoted 6 lines

Quoted 2 lines
SPARSE_IRQ shouldn't be a user configurable option. There is just no point for a user configuring a kernel to be able to change this.
I agree, but I'm inclined to leave this alone for now. PPC doesn't ever select SPARSE_IRQ, but enables it via many defconfigs. So I think changing it may cause some problems.

I think ppc can probably be moved to always enable SPARSE_IRQ since every ppc machine goes through irq_domain anyway.

Rob Herring

author

2012-01-30 16:33 UTC #17 lore raw

PATCH v2 11/13 ARM: only include mach/irqs.h for !SPARSE_IRQ

Quoted 48 lines · Grant Likely

Quoted 47 lines · Rob Herring
Quoted 12 lines · Nicolas Pitre
Quoted 10 lines · Rob Herring
Quoted 9 lines · Nicolas Pitre
Quoted 6 lines · Rob Herring
From: Rob Herring <[email protected]>
Make mach/irqs.h optional for SPARSE_IRQ. With this change irqs.h can be removed by converting platforms over to sparse irq.
This intentionally breaks platforms that enable SPARSE_IRQ.
Quoted 7 lines
Quoted 4 lines
Quoted 2 lines
I don't get what you mean here. The above seems contradictory.
You're right. The intro explains things more clearly.
The intro won't be part of the git history, so please make sure individual commit logs are sensible on their own.
Updated the commit message to this (w/o the email word wrapping):
ARM: only include mach/irqs.h for !SPARSE_IRQ
Make mach/irqs.h optional for SPARSE_IRQ. With this change irqs.h can be removed by converting platforms over to sparse irq.
This may break platforms where SPARSE_IRQ is user selectable and is enabled. This is on purpose so that SPARSE_IRQ gets properly supported. SPARSE_IRQ should not really be a user visible option.
Platforms either need to set nr_irqs in their machine desc or all irqchips used by a platform need to allocate their irq_descs. There cannot be a mixture. Once this is done, the platforms can select SPARSE_IRQ. shmobile does the latter, and mmp and pxa do the former.
Quoted 9 lines
Quoted 6 lines
This breaks platforms (at boot time) that don't select SPARSE_IRQ, but let users enable it in their config. I don't understand why sparse irq is a user visible config option. We could move HAVE_SPARSE_IRQ down to each platform that selects SPARSE_IRQ and prevent enabling, but I think allowing it to break is good encouragement for others to fix those platforms. I'm open to other ideas.
SPARSE_IRQ shouldn't be a user configurable option. There is just no point for a user configuring a kernel to be able to change this.

Quoted 6 lines

Quoted 3 lines
I agree, but I'm inclined to leave this alone for now. PPC doesn't ever select SPARSE_IRQ, but enables it via many defconfigs. So I think changing it may cause some problems.
I think ppc can probably be moved to always enable SPARSE_IRQ since every ppc machine goes through irq_domain anyway.

May be so, but only ~80 of ~100 ppc defconfigs enable SPARSE_IRQ. I'll leave it to someone more familiar with ppc to change it.

I implemented Russell's suggestion:

http://lists.infradead.org/pipermail/linux-arm-kernel/2012-January/081920.html

Rob

Russell King - ARM Linux

2012-01-25 21:32 UTC #18 lore raw

PATCH v2 11/13 ARM: only include mach/irqs.h for !SPARSE_IRQ

In reply to Rob Herring

Quoted 13 lines · Rob Herring

Quoted 11 lines · Nicolas Pitre
Quoted 6 lines · Rob Herring
From: Rob Herring <[email protected]>
Make mach/irqs.h optional for SPARSE_IRQ. With this change irqs.h can be removed by converting platforms over to sparse irq.
This intentionally breaks platforms that enable SPARSE_IRQ.
I don't get what you mean here. The above seems contradictory.

Quoted 7 lines

You're right. The intro explains things more clearly. This breaks platforms (at boot time) that don't select SPARSE_IRQ, but let users enable it in their config. I don't understand why sparse irq is a user visible config option. We could move HAVE_SPARSE_IRQ down to each platform that selects SPARSE_IRQ and prevent enabling, but I think allowing it to break is good encouragement for others to fix those platforms. I'm open to other ideas.

config SPARSE_IRQ
bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ

and change all the existing 'HAVE_SPARSE_IRQ' to MAY_HAVE_SPARSE_IRQ except those where SPARSE_IRQ gets selected.

In other words, on ARM get rid of HAVE_SPARSE_IRQ=y, don't select MAY_HAVE_SPARSE_IRQ instead, but have each converted machine select SPARSE_IRQ directly. Then, people who want sparse irq to be a question can have their cake. While we can eat our cake too.

As a side-note, you may be pleased to know that I have SA11x0 stuff converted to (and tested) with sparse IRQ. That's with SA1111, the UCB1x00 and Neponset expansion board for the Assabet all dynamically allocating their IRQs. The only fixed-numbered IRQs in SA11x0 in my tree at the time of writing are the on-SoC IRQs, and the LoCoMo IRQs (which I don't have the hardware to test for, so I'm not touching.)

Note that SA1111 support is fairly broken in current mainline because of a half-completed (but still merged) patch which results in SA1111 overwriting IRQ0-55 with its own handlers. Ouch.

This is /proc/interrupts for the Assabet+Neponset, with 49 SA11x0, 3 Neponset, 55 SA1111, and 16 UCB1300 IRQs:

CPU0

 12:          1        SC  LCD
 15:       8238        SC  sa11x0-uart
 20:          0        SC  sa11x0-dma
 21:          0        SC  sa11x0-dma
 22:          0        SC  sa11x0-dma
 23:          0        SC  sa11x0-dma
 24:          0        SC  sa11x0-dma
 25:          0        SC  sa11x0-dma
 26:     599387        SC  ost0
 49:       3095         -  eth0
 73:          3  SA1111-l
103:          0  SA1111-h  SA1111 PCMCIA card detect
104:          0  SA1111-h  SA1111 CF card detect
105:          2  SA1111-h  SA1111 PCMCIA BVD1
106:          1  SA1111-h  SA1111 CF BVD1
107:          0   ucb1x00  gpio_keys
108:          0   ucb1x00  gpio_keys
109:          0   ucb1x00  gpio_keys
110:          0   ucb1x00  gpio_keys
111:          0   ucb1x00  gpio_keys
112:          0   ucb1x00  gpio_keys
Err:          0

Nicolas Pitre

2012-01-25 22:32 UTC #19 lore raw

PATCH v2 11/13 ARM: only include mach/irqs.h for !SPARSE_IRQ

Quoted 6 lines · Russell King - ARM Linux

As a side-note, you may be pleased to know that I have SA11x0 stuff converted to (and tested) with sparse IRQ. That's with SA1111, the UCB1x00 and Neponset expansion board for the Assabet all dynamically allocating their IRQs. The only fixed-numbered IRQs in SA11x0 in my tree at the time of writing are the on-SoC IRQs, and the LoCoMo IRQs (which I don't have the hardware to test for, so I'm not touching.)

That's really cool.

Not that there are many people who might still benefit from running that code, but like I said this should serve as a real and relatively simple example that might benefit more complex platforms.

Nicolas

Marek Vasut

2012-01-25 22:58 UTC #20 lore raw

PATCH v2 11/13 ARM: only include mach/irqs.h for !SPARSE_IRQ

Quoted 8 lines · Russell King - ARM Linux

Quoted 6 lines
As a side-note, you may be pleased to know that I have SA11x0 stuff converted to (and tested) with sparse IRQ. That's with SA1111, the UCB1x00 and Neponset expansion board for the Assabet all dynamically allocating their IRQs. The only fixed-numbered IRQs in SA11x0 in my tree at the time of writing are the on-SoC IRQs, and the LoCoMo IRQs (which I don't have the hardware to test for, so I'm not touching.)

Quoted 8 lines

That's really cool.
Not that there are many people who might still benefit from running that code, but like I said this should serve as a real and relatively simple example that might benefit more complex platforms.
Nicolas

Indeed, that's good going. I'm CCing a guy who might have a SA11xx board with LoCoMo chip (that's old zaurus sl55xx, right?).

Cyril Hrubis

2012-01-30 10:44 UTC #21 lore raw

PATCH v2 11/13 ARM: only include mach/irqs.h for !SPARSE_IRQ

Hi!

Quoted 14 lines

Quoted 14 lines
Quoted 6 lines
As a side-note, you may be pleased to know that I have SA11x0 stuff converted to (and tested) with sparse IRQ. That's with SA1111, the UCB1x00 and Neponset expansion board for the Assabet all dynamically allocating their IRQs. The only fixed-numbered IRQs in SA11x0 in my tree at the time of writing are the on-SoC IRQs, and the LoCoMo IRQs (which I don't have the hardware to test for, so I'm not touching.)
That's really cool.
Not that there are many people who might still benefit from running that code, but like I said this should serve as a real and relatively simple example that might benefit more complex platforms.

Quoted 4 lines

Quoted 1 line
Nicolas
Indeed, that's good going. I'm CCing a guy who might have a SA11xx board with LoCoMo chip (that's old zaurus sl55xx, right?).

I think I still do have old zaurus in some box somewhere (I stopped playing with it once I got the newer one). And I think that Pavel Machek (CC) has one too (I think that he wanted to give away to anybody who is wishing to maintain the particular kernel parts and I think that in the end nobody took it).

Signature · 1 line

metan

Pavel Machek

2012-02-01 10:03 UTC #22 lore raw

PATCH v2 11/13 ARM: only include mach/irqs.h for !SPARSE_IRQ

Quoted 17 lines · Cyril Hrubis

Hi!
Quoted 16 lines
Quoted 15 lines
Quoted 6 lines
As a side-note, you may be pleased to know that I have SA11x0 stuff converted to (and tested) with sparse IRQ. That's with SA1111, the UCB1x00 and Neponset expansion board for the Assabet all dynamically allocating their IRQs. The only fixed-numbered IRQs in SA11x0 in my tree at the time of writing are the on-SoC IRQs, and the LoCoMo IRQs (which I don't have the hardware to test for, so I'm not touching.)
That's really cool.
Not that there are many people who might still benefit from running that code, but like I said this should serve as a real and relatively simple example that might benefit more complex platforms.
Nicolas

Quoted 7 lines

Quoted 2 lines
Indeed, that's good going. I'm CCing a guy who might have a SA11xx board with LoCoMo chip (that's old zaurus sl55xx, right?).
I think I still do have old zaurus in some box somewhere (I stopped playing with it once I got the newer one). And I think that Pavel Machek (CC) has one too (I think that he wanted to give away to anybody who is wishing to maintain the particular kernel parts and I think that in the end nobody took it).

Yep, I still have old collie (sl5500) machine. I don't really use it...

Pavel

Signature · 2 lines

(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

Rob Herring

author

2012-01-20 20:33 UTC #23 lore raw

PATCH v2 12/13 ARM: highbank: select SPARSE_IRQ and remove irqs.h

In reply to Rob Herring

From: Rob Herring <[email protected]>

irqs.h is optional now for SPARSE_IRQ, so select it and remove mach/irqs.h from highbank.

Signed-off-by Rob Herring <[email protected]>

---
 arch/arm/Kconfig                           |    1 +
 arch/arm/mach-highbank/highbank.c          |    1 -
 arch/arm/mach-highbank/include/mach/irqs.h |    6 ------
 3 files changed, 1 insertions(+), 7 deletions(-)
 delete mode 100644 arch/arm/mach-highbank/include/mach/irqs.h

arch/arm/Kconfig +1 -0

index 24626b0..a3c19cb 100644
@@ -350,6 +350,7 @@ config ARCH_HIGHBANK
 	select GENERIC_CLOCKEVENTS
 	select HAVE_ARM_SCU
 	select HAVE_SMP
+	select SPARSE_IRQ
 	select USE_OF
 	help
 	  Support for the Calxeda Highbank SoC based boards.

arch/arm/mach-highbank/highbank.c +0 -1

index 7afbe1e..ee228ef 100644
@@ -33,7 +33,6 @@
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
-#include <mach/irqs.h>
 
 #include "core.h"
 #include "sysregs.h"

arch/arm/mach-highbank/include/mach/irqs.h deleted +0 -6

deleted file mode 100644
index 9746aab..0000000
@@ -1,6 +0,0 @@
-#ifndef __MACH_IRQS_H
-#define __MACH_IRQS_H
-
-#define NR_IRQS			192
-
-#endif

Signature · 1 line

1.7.5.4

Rob Herring

author

2012-01-20 20:33 UTC #24 lore raw

PATCH v2 13/13 ARM: picoxcell: remove mach/irqs.h

In reply to Rob Herring

From: Jamie Iles <[email protected]>

picoxcell uses SPARSE_IRQ which means we don't need a mach/irqs.h anymore so kill it off.

Signed-off-by Jamie Iles <[email protected]>

Signed-off-by Rob Herring <[email protected]>

---
 arch/arm/mach-picoxcell/include/mach/irqs.h |   20 --------------------
 1 files changed, 0 insertions(+), 20 deletions(-)
 delete mode 100644 arch/arm/mach-picoxcell/include/mach/irqs.h

arch/arm/mach-picoxcell/include/mach/irqs.h deleted +0 ~~-20~~

deleted file mode 100644
index 59eac1e..0000000
@@ -1,20 +0,0 @@
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#ifndef __MACH_IRQS_H
-#define __MACH_IRQS_H
-
-/* We dynamically allocate our irq_desc's. */
-#define NR_IRQS				0
-
-#endif /* __MACH_IRQS_H */

Signature · 1 line

1.7.5.4

Russell King - ARM Linux

2012-02-16 08:45 UTC #25 lore raw

v2 cover Make mach/irqs.h optional

In reply to Rob Herring

Quoted 5 lines · Rob Herring

From: Rob Herring <[email protected]>
This series removes the include of mach/irqs.h from asm/irq.h when SPARSE_IRQ is selected. Platforms which select SPARSE_IRQ have been updated.

Rob,

Last night, I merged devel-stable into the stuff which gets built, and it seems your IRQ changes are breaking PXA:

Before merge:
http://www.arm.linux.org.uk/developer/build/result.php?type=build&idx=129

After merge:
http://www.arm.linux.org.uk/developer/build/result.php?type=build&idx=137

Russell King - ARM Linux

2012-02-16 09:05 UTC #26 lore raw

v2 cover Make mach/irqs.h optional

Quoted 9 lines · Russell King - ARM Linux

Quoted 5 lines · Rob Herring
From: Rob Herring <[email protected]>
This series removes the include of mach/irqs.h from asm/irq.h when SPARSE_IRQ is selected. Platforms which select SPARSE_IRQ have been updated.
Rob,

Quoted 8 lines

Last night, I merged devel-stable into the stuff which gets built, and it seems your IRQ changes are breaking PXA:
Before merge:
http://www.arm.linux.org.uk/developer/build/result.php?type=build&idx=129
After merge:
http://www.arm.linux.org.uk/developer/build/result.php?type=build&idx=137

Also see SA11x0 breakage - before:
http://www.arm.linux.org.uk/developer/build/result.php?type=build&idx=127
after:
http://www.arm.linux.org.uk/developer/build/result.php?type=build&idx=135

Rob Herring

author

2012-02-16 13:29 UTC #27 lore raw

v2 cover Make mach/irqs.h optional

Russell,

Quoted 16 lines · Russell King - ARM Linux

Quoted 15 lines · Russell King - ARM Linux
Quoted 5 lines · Rob Herring
From: Rob Herring <[email protected]>
This series removes the include of mach/irqs.h from asm/irq.h when SPARSE_IRQ is selected. Platforms which select SPARSE_IRQ have been updated.
Rob,
Last night, I merged devel-stable into the stuff which gets built, and it seems your IRQ changes are breaking PXA:
Before merge:
http://www.arm.linux.org.uk/developer/build/result.php?type=build&idx=129

Quoted 7 lines

Quoted 2 lines
After merge:
http://www.arm.linux.org.uk/developer/build/result.php?type=build&idx=137
Also see SA11x0 breakage - before:
http://www.arm.linux.org.uk/developer/build/result.php?type=build&idx=127
after:
http://www.arm.linux.org.uk/developer/build/result.php?type=build&idx=135

For SA1100, it's due to this change being done before my changes and also possibly reverting of rtc driver changes. I'm working on fixes.

commit 7b7c67bc4284d07285985d487b4ee1a7cc8456e2

Author: Russell King <[email protected]>
Date:   Sun Jan 29 11:40:08 2012 +0000

ARM: sa11x0: convert to sparse IRQ

Now that Neponset, UCB1x00 and SA1111 are all converted to use the IRQ allocation interfaces, we can enable sparse IRQ support for SA11x0 platforms.

Signed-off-by Russell King <[email protected]>

Rob