OMAP3+: SR: bugfixes
Subsystems (4)
cover OMAP3+: SR: bugfixes
Integrate the latest SmartReflex bufixes from Felipe Balbi [1] and Nishant Menon [2].
Based on latest master branch of the mainline git tree (3.3.0-rc1) [3], commit f8275f9694b8adf9f3498e747ea4c3e8b984499b.
[1] http://marc.info/?l=linux-omap&m=132134699423547&w=2
[2] https://github.com/nmenon/linux-omap-ti-pm/commits/linux-omap-3.0
[3] http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=shortlog
Colin Cross (1):
ARM: omap2+: smartreflex: move smartreflex suspend to suspend_noirq
Felipe Balbi (4):
arm: omap: smartreflex: add missing platform_set_drvdata()
arm: omap: smartreflex: move late_initcall() closer to its argument
arm: omap: smartreflex: clean ups all over
arm: omap: smartreflex: micro-optimization for sanity check
Julia Lawall (1):
arch/arm/mach-omap2/smartreflex.c: add missing error-handling code
Nishanth Menon (14):
OMAP3+: PM: SR: add suspend/resume handlers
Revert "OMAP3+: PM: SR: add suspend/resume handlers" OMAP3+: Smartreflex: fix err interrupt disable sequence OMAP3+: PM: SR/Class3: disable errorgen before disable VP OMAP3+: Smartreflex: Add a shutdown hook
OMAP3+: Smartreflex: Fix status masking in ERRCONFIG register OMAP3+: Smartreflex: clear ERRCONFIG_VPBOUNDINTST only on a need
OMAP3: hwmod: add SmartReflex IRQs
OMAP3+: SR: introduce class init,deinit and priv data OMAP3+: SR: introduce notifiers flags
OMAP3+: SR: introduce notifier_control
OMAP3+: SR: disable spamming interrupts
OMAP3+: SR: introduce class private data per voltage domain
OMAP3430: SR: class3: restrict CPU to run on
Shweta Gulati (1):
OMAP3+: SR Layer Cleanup [V4]
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 31 ++- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 19 +- arch/arm/mach-omap2/smartreflex-class3.c | 16 +- arch/arm/mach-omap2/smartreflex.c | 408 ++++++++++++++++++++++---- arch/arm/mach-omap2/smartreflex.h | 42 +++- arch/arm/mach-omap2/sr_device.c | 11 +- arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 - 7 files changed, 449 insertions(+), 80 deletions(-)
Signature · 1 line
1.7.5.4
PATCH 1/21 OMAP3+: SR Layer Cleanup [V4]
From: Shweta Gulati <[email protected]>
To set sr ntarget values for all volt_domain, volt_table is retrieved by doing a look_up of 'vdd_name' field from omap_hwmod but voltage domain pointer does not belong to omap_hwmod and is not used anywhere else. As a part of voltage layer and SR Layer clean up volt pointer is removed from omap_hwmod and added in dev attributes of SR.
Tested on OMAP3630 SDP and OMAP4430 SDP Board
Acked by: Nishanth Menon <[email protected]>
--- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 17 +++++++++++++---- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 19 ++++++++++++++++--- arch/arm/mach-omap2/smartreflex.h | 9 +++++++++ arch/arm/mach-omap2/sr_device.c | 11 +++++++---- arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 -- 5 files changed, 45 insertions(+), 13 deletions(-)
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +13 -4
@@ -29,6 +29,7 @@#include "omap_hwmod_common_data.h" +#include "smartreflex.h" #include "prm-regbits-34xx.h" #include "cm-regbits-34xx.h" #include "wd_timer.h"
@@ -2642,6 +2643,10 @@ static struct omap_hwmod_class omap36xx_smartreflex_hwmod_class = { };/* SR1 */ +static struct omap_smartreflex_dev_attr sr1_dev_attr = { + .sensor_voltdm_name ="mpu_iva" , +}; +static struct omap_hwmod_ocp_if *omap3_sr1_slaves[] = { &omap3_l4_core__sr1, };
@@ -2650,7 +2655,6 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { .name = "sr1_hwmod", .class = &omap34xx_smartreflex_hwmod_class, .main_clk = "sr1_fck", - .vdd_name = "mpu_iva", .prcm = { .omap2 = { .prcm_reg_id = 1,
@@ -2662,6 +2666,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { }, .slaves = omap3_sr1_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), + .dev_attr = &sr1_dev_attr, .flags = HWMOD_SET_DEFAULT_CLOCKACT, };
@@ -2669,7 +2674,6 @@ static struct omap_hwmod omap36xx_sr1_hwmod = { .name = "sr1_hwmod", .class = &omap36xx_smartreflex_hwmod_class, .main_clk = "sr1_fck", - .vdd_name = "mpu_iva", .prcm = { .omap2 = { .prcm_reg_id = 1,
@@ -2681,9 +2685,14 @@ static struct omap_hwmod omap36xx_sr1_hwmod = { }, .slaves = omap3_sr1_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), + .dev_attr = &sr1_dev_attr, };/* SR2 */ +static struct omap_smartreflex_dev_attr sr2_dev_attr = { + .sensor_voltdm_name ="core" , +}; +static struct omap_hwmod_ocp_if *omap3_sr2_slaves[] = { &omap3_l4_core__sr2, };
@@ -2692,7 +2701,6 @@ static struct omap_hwmod omap34xx_sr2_hwmod = { .name = "sr2_hwmod", .class = &omap34xx_smartreflex_hwmod_class, .main_clk = "sr2_fck", - .vdd_name = "core", .prcm = { .omap2 = { .prcm_reg_id = 1,
@@ -2704,6 +2712,7 @@ static struct omap_hwmod omap34xx_sr2_hwmod = { }, .slaves = omap3_sr2_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), + .dev_attr = &sr2_dev_attr, .flags = HWMOD_SET_DEFAULT_CLOCKACT, };
@@ -2711,7 +2720,6 @@ static struct omap_hwmod omap36xx_sr2_hwmod = { .name = "sr2_hwmod", .class = &omap36xx_smartreflex_hwmod_class, .main_clk = "sr2_fck", - .vdd_name = "core", .prcm = { .omap2 = { .prcm_reg_id = 1,
@@ -2723,6 +2731,7 @@ static struct omap_hwmod omap36xx_sr2_hwmod = { }, .slaves = omap3_sr2_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), + .dev_attr = &sr2_dev_attr, };/*
arch/arm/mach-omap2/omap_hwmod_44xx_data.c +16 -3
@@ -34,6 +34,7 @@#include "omap_hwmod_common_data.h" +#include "smartreflex.h" #include "cm1_44xx.h" #include "cm2_44xx.h" #include "prm44xx.h"
@@ -3961,6 +3962,10 @@ static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = { };/* smartreflex_core */ +static struct omap_smartreflex_dev_attr smartreflex_core_dev_attr = { + .sensor_voltdm_name ="core" , +}; +static struct omap_hwmod omap44xx_smartreflex_core_hwmod;static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = { { .irq =19 +OMAP44XX_IRQ_GIC_START },
@@ -3997,7 +4002,6 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { .mpu_irqs = omap44xx_smartreflex_core_irqs, .main_clk = "smartreflex_core_fck", - .vdd_name = "core", .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET,
@@ -4007,9 +4011,14 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { }, .slaves = omap44xx_smartreflex_core_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_slaves), + .dev_attr = &smartreflex_core_dev_attr, };/* smartreflex_iva */ +static struct omap_smartreflex_dev_attr smartreflex_iva_dev_attr = { + .sensor_voltdm_name ="iva" , +}; +static struct omap_hwmod omap44xx_smartreflex_iva_hwmod;static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = { { .irq =102 +OMAP44XX_IRQ_GIC_START },
@@ -4045,7 +4054,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { .clkdm_name = "l4_ao_clkdm", .mpu_irqs = omap44xx_smartreflex_iva_irqs, .main_clk = "smartreflex_iva_fck", - .vdd_name = "iva", .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET,
@@ -4055,9 +4063,14 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { }, .slaves = omap44xx_smartreflex_iva_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_slaves), + .dev_attr = &smartreflex_iva_dev_attr, };/* smartreflex_mpu */ +static struct omap_smartreflex_dev_attr smartreflex_mpu_dev_attr = { + .sensor_voltdm_name ="mpu" , +}; +static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod;static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = { { .irq =18 +OMAP44XX_IRQ_GIC_START },
@@ -4093,7 +4106,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { .clkdm_name = "l4_ao_clkdm", .mpu_irqs = omap44xx_smartreflex_mpu_irqs, .main_clk = "smartreflex_mpu_fck", - .vdd_name = "mpu", .prcm = { .omap4 = { .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET,
@@ -4103,6 +4115,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { }, .slaves = omap44xx_smartreflex_mpu_slaves, .slaves_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves), + .dev_attr = &smartreflex_mpu_dev_attr, };/*
arch/arm/mach-omap2/smartreflex.h +9 -0
@@ -152,6 +152,15 @@ struct omap_sr_pmic_data {void (*sr_pmic_init) (void ); }; +/** +* struct omap_smartreflex_dev_attr - Smartreflex Device attribute. +* +* @sensor_voltdm_name: Name of voltdomain of SR instance +*/ +struct omap_smartreflex_dev_attr { +const char *sensor_voltdm_name; +}; +#ifdef CONFIG_OMAP_SMARTREFLEX /* * The smart reflex driver supports CLASS1 CLASS2 and CLASS3 SR.
arch/arm/mach-omap2/sr_device.c +7 -4
@@ -74,6 +74,7 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user)struct omap_sr_data *sr_data;struct platform_device *pdev;struct omap_volt_data *volt_data; +struct omap_smartreflex_dev_attr *sr_dev_attr;char *name ="smartreflex" ;static int i;
@@ -84,9 +85,11 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user)return -ENOMEM ; } -if (!oh->vdd_name) { + sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr; +if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {pr_err ("%s: No voltage domain specified for %s." -"Cannot initialize\n" , __func__, oh->name); +"Cannot initialize\n" , __func__, + oh->name); goto exit; }
@@ -94,10 +97,10 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user) sr_data->senn_mod =0x1 ; sr_data->senp_mod =0x1 ; - sr_data->voltdm =voltdm_lookup (oh->vdd_name); + sr_data->voltdm =voltdm_lookup (sr_dev_attr->sensor_voltdm_name);if (IS_ERR (sr_data->voltdm)) {pr_err ("%s: Unable to get voltage domain pointer for VDD %s\n" , - __func__, oh->vdd_name); + __func__, sr_dev_attr->sensor_voltdm_name); goto exit; }
arch/arm/plat-omap/include/plat/omap_hwmod.h +0 -2
@@ -484,7 +484,6 @@ struct omap_hwmod_class {* @main_clk: main clock: OMAP clock name * @_clk: pointer to the main struct clk (filled in at runtime) * @opt_clks: other device clocks that drivers can request (0..*) -* @vdd_name: voltage domain name * @voltdm: pointer to voltage domain (filled in at runtime) * @masters: ptr to array of OCP ifs that this hwmod can initiate on * @slaves: ptr to array of OCP ifs that this hwmod can respond on
@@ -528,7 +527,6 @@ struct omap_hwmod {struct omap_hwmod_opt_clk *opt_clks;char *clkdm_name;struct clockdomain *clkdm; -char *vdd_name;struct omap_hwmod_ocp_if **masters;/* connect to *_IA */ struct omap_hwmod_ocp_if **slaves;/* connect to *_TA */ void *dev_attr;
Signature · 1 line
1.7.5.4
PATCH 2/21 arch/arm/mach-omap2/smartreflex.c: add missing error-handling code
In reply to Jean PihetFrom: Julia Lawall <[email protected]>
At this point, the ioremap has taken place, so the error handling code at the label err_iounmap should be used rather than returning directly.
The semantic match that finds this problem is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@r@
identifier x;
@@
kfree(x)
@@
identifier r.x;
expression E1!=0,E2,E3,E4;
statement S;
@@
(
if (<+...x...+>) S
|
if (...) { ... when != kfree(x)
when != if (...) { ... kfree(x); ... }
when != x = E3* return E1;
}
... when != x = E2
if (...) { ... when != x = E4
kfree(x); ... return ...; }
)
// </smpl>
--- arch/arm/mach-omap2/smartreflex.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/smartreflex.c +1 -1
@@ -897,7 +897,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) ret =sr_late_init (sr_info);if (ret) {pr_warning ("%s: Error in SR late init\n" , __func__); -return ret; + goto err_iounmap; } }
Signature · 1 line
1.7.5.4
PATCH 3/21 OMAP3+: PM: SR: add suspend/resume handlers
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
SmartReflex should be disabled while entering low power mode due to the following reasons:
a) SmartReflex values are not defined for retention voltage.
b) With SmartReflex enabled, if the CPU enters low power state, FSM will try to bump the voltage to current OPP's voltage for which it has entered low power state, causing power loss and potential unknown states for the SoC.
Since we are sure to attempt entering the lowest possible power state during suspend operation, SmartReflex needs to be disabled for the voltage domains in suspend path before achieving auto retention voltage on the device.
Traditionally, this has been done with interrupts disabled as part of the common code which handles the idle sequence. Instead, by using the fact that we have to disable SmartReflex for sure during suspend operations, we can opportunistically disable SmartReflex in device standard pm ops, instead of disabling it as part of the code which executes with interrupts disabled and slave CPU{s} shutdown. This allows the system to do other parallel activities(such as suspending other devices in the system using slave CPU{s}) and save the time required to achieve suspend and resume from suspended state as a sequential activity.
However, by being opportunistic as described above, we also increase the likelihood of SmartReflex library access functions being invoked in parallel contexts *after* SmartReflex driver's suspend handler (during suspend operation) or *before* resume handler (during resume operation) have been invoked (Example: DVFS for dependent devices, cpufreq for MPU etc.). We prevent this by using a flag to reject the callers in the duration where SmartReflex has been disabled.
--- arch/arm/mach-omap2/smartreflex.c | 87 +++++++++++++++++++++++++++++++++++++ 1 files changed, 87 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/smartreflex.c +87 -0
@@ -24,6 +24,7 @@#include <linux/debugfs.h> #include <linux/delay.h> #include <linux/slab.h> +#include <linux/pm.h> #include <linux/pm_runtime.h> #include "common.h"
@@ -40,6 +41,7 @@ struct omap_sr {int ip_type;int nvalue_count;bool autocomp_active; +bool is_suspended;u32 clk_length;u32 err_weight;u32 err_minlimit;
@@ -685,6 +687,11 @@ void omap_sr_enable(struct voltagedomain *voltdm)if (!sr->autocomp_active)return ; +if (sr->is_suspended) { +dev_dbg (&sr->pdev->dev,"%s: in suspended state\n" , __func__); +return ; + } +if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {dev_warn (&sr->pdev->dev,"%s: smartreflex class driver not" "registered\n" , __func__);
@@ -718,6 +725,11 @@ void omap_sr_disable(struct voltagedomain *voltdm)if (!sr->autocomp_active)return ; +if (sr->is_suspended) { +dev_dbg (&sr->pdev->dev,"%s: in suspended state\n" , __func__); +return ; + } +if (!sr_class || !(sr_class->disable)) {dev_warn (&sr->pdev->dev,"%s: smartreflex class driver not" "registered\n" , __func__);
@@ -751,6 +763,11 @@ void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)if (!sr->autocomp_active)return ; +if (sr->is_suspended) { +dev_dbg (&sr->pdev->dev,"%s: in suspended state\n" , __func__); +return ; + } +if (!sr_class || !(sr_class->disable)) {dev_warn (&sr->pdev->dev,"%s: smartreflex class driver not" "registered\n" , __func__);
@@ -809,6 +826,11 @@ static int omap_sr_autocomp_store(void *data, u64 val)return -EINVAL ; } +if (sr_info->is_suspended) { +pr_warning ("%s: in suspended state\n" , __func__); +return -EBUSY ; + } +/* control enable/disable only if there is a delta in value */ if (sr_info->autocomp_active != val) {if (!val)
@@ -1011,10 +1033,75 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)return 0 ; } +static int omap_sr_suspend (struct device *dev) +{ +struct omap_sr_data *pdata; +struct omap_sr *sr_info; + + pdata =dev_get_platdata (dev); +if (!pdata) { +dev_err (dev,"%s: platform data missing\n" , __func__); +return -EINVAL ; + } + + sr_info =_sr_lookup (pdata->voltdm); +if (IS_ERR (sr_info)) { +dev_warn (dev,"%s: omap_sr struct not found\n" , __func__); +return -EINVAL ; + } + +if (!sr_info->autocomp_active) +return 0 ; + +if (sr_info->is_suspended) +return 0 ; + +omap_sr_disable_reset_volt (pdata->voltdm); + sr_info->is_suspended = true; +/* Flag the same info to the other CPUs */ +smp_wmb (); + +return 0 ; +} + +static int omap_sr_resume (struct device *dev) +{ +struct omap_sr_data *pdata; +struct omap_sr *sr_info; + + pdata =dev_get_platdata (dev); +if (!pdata) { +dev_err (dev,"%s: platform data missing\n" , __func__); +return -EINVAL ; + } + + sr_info =_sr_lookup (pdata->voltdm); +if (IS_ERR (sr_info)) { +dev_warn (dev,"%s: omap_sr struct not found\n" , __func__); +return -EINVAL ; + } + +if (!sr_info->autocomp_active) +return 0 ; + +if (!sr_info->is_suspended) +return 0 ; + + sr_info->is_suspended = false; +/* Flag the same info to the other CPUs */ +smp_wmb (); +omap_sr_enable (pdata->voltdm); + +return 0 ; +} + +static SIMPLE_DEV_PM_OPS(omap_sr_dev_pm_ops, omap_sr_suspend, omap_sr_resume); +static struct platform_driver smartreflex_driver = { .remove = omap_sr_remove, .driver = { .name ="smartreflex" , + .pm = &omap_sr_dev_pm_ops, }, };
Signature · 1 line
1.7.5.4
PATCH 4/21 ARM: omap2+: smartreflex: move smartreflex suspend to suspend_noirq
In reply to Jean PihetFrom: Colin Cross <[email protected]>
Running without smartreflex for any significant time (on the order of seconds) is unsafe and can cause thermal runaway. Move smartreflex suspend into suspend_noirq, so it happens as late as possible. This prevents hangs that occur in a driver suspend handler from running without smartreflex enabled. It will also reduce power used during suspend and resume, as the voltages will be lowered.
May also indirectly fix imprecise external aborts seen during suspend, which could be caused by calls to sr_disable racing from calls to dvfs_scale and omap_sr_disable.
--- arch/arm/mach-omap2/smartreflex.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/smartreflex.c +4 -1
@@ -1095,7 +1095,10 @@ static int omap_sr_resume(struct device *dev)return 0 ; } -static SIMPLE_DEV_PM_OPS(omap_sr_dev_pm_ops, omap_sr_suspend, omap_sr_resume); +const static struct dev_pm_ops omap_sr_dev_pm_ops = { + .suspend_noirq = omap_sr_suspend, + .resume_noirq = omap_sr_resume, +};static struct platform_driver smartreflex_driver = { .remove = omap_sr_remove,
Signature · 1 line
1.7.5.4
PATCH 4/21 ARM: omap2+: smartreflex: move smartreflex suspend to suspend_noirq
Quoted 10 lines · Jean Pihet
From: Colin Cross<[email protected]>
Running without smartreflex for any significant time (on the order of seconds) is unsafe and can cause thermal runaway. Move smartreflex suspend into
suspend_noirq, so it happens as late as possible. This prevents hangs that occur in a driver suspend handler from running without smartreflex enabled. It will also reduce power used during suspend and resume, as the voltages will be lowered.
Quoted 5 lines
May also indirectly fix imprecise external aborts seen during suspend, which could be caused by calls to
sr_disableracing from calls todvfs_scaleandomap_sr_disable.Change-Id: Ia3c1e707bb1022ec102f506dc3ad48906e8890da
This line has no place in the upstream commit. Please remove.
WBR, Sergei
PATCH 5/21 Revert "OMAP3+: PM: SR: add suspend/resume handlers"
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
This reverts commit b6be18f0bab68ed304ebbb2d787d1c36237eda62.
Revert the patch so that we remove any opportunity of SR disable/enable and any device_scale transitions from conflicting with suspend/resume path by moving the sr enable/disable activity to the very last stage(in pmxx.C). The previous patch tried to optimize suspend resume time, but since device_scale opportunities are from multiple drivers (other than cpufreq), hence reverting back to original approach
Conflicts:
arch/arm/mach-omap2/smartreflex.c
--- arch/arm/mach-omap2/smartreflex.c | 90 ------------------------------------- 1 files changed, 0 insertions(+), 90 deletions(-)
arch/arm/mach-omap2/smartreflex.c +0 -90
@@ -24,7 +24,6 @@#include <linux/debugfs.h> #include <linux/delay.h> #include <linux/slab.h> -#include <linux/pm.h> #include <linux/pm_runtime.h> #include "common.h"
@@ -41,7 +40,6 @@ struct omap_sr {int ip_type;int nvalue_count;bool autocomp_active; -bool is_suspended;u32 clk_length;u32 err_weight;u32 err_minlimit;
@@ -687,11 +685,6 @@ void omap_sr_enable(struct voltagedomain *voltdm)if (!sr->autocomp_active)return ; -if (sr->is_suspended) { -dev_dbg (&sr->pdev->dev,"%s: in suspended state\n" , __func__); -return ; - } -if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {dev_warn (&sr->pdev->dev,"%s: smartreflex class driver not" "registered\n" , __func__);
@@ -725,11 +718,6 @@ void omap_sr_disable(struct voltagedomain *voltdm)if (!sr->autocomp_active)return ; -if (sr->is_suspended) { -dev_dbg (&sr->pdev->dev,"%s: in suspended state\n" , __func__); -return ; - } -if (!sr_class || !(sr_class->disable)) {dev_warn (&sr->pdev->dev,"%s: smartreflex class driver not" "registered\n" , __func__);
@@ -763,11 +751,6 @@ void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)if (!sr->autocomp_active)return ; -if (sr->is_suspended) { -dev_dbg (&sr->pdev->dev,"%s: in suspended state\n" , __func__); -return ; - } -if (!sr_class || !(sr_class->disable)) {dev_warn (&sr->pdev->dev,"%s: smartreflex class driver not" "registered\n" , __func__);
@@ -826,11 +809,6 @@ static int omap_sr_autocomp_store(void *data, u64 val)return -EINVAL ; } -if (sr_info->is_suspended) { -pr_warning ("%s: in suspended state\n" , __func__); -return -EBUSY ; - } -/* control enable/disable only if there is a delta in value */ if (sr_info->autocomp_active != val) {if (!val)
@@ -1033,78 +1011,10 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)return 0 ; } -static int omap_sr_suspend (struct device *dev) -{ -struct omap_sr_data *pdata; -struct omap_sr *sr_info; - - pdata =dev_get_platdata (dev); -if (!pdata) { -dev_err (dev,"%s: platform data missing\n" , __func__); -return -EINVAL ; - } - - sr_info =_sr_lookup (pdata->voltdm); -if (IS_ERR (sr_info)) { -dev_warn (dev,"%s: omap_sr struct not found\n" , __func__); -return -EINVAL ; - } - -if (!sr_info->autocomp_active) -return 0 ; - -if (sr_info->is_suspended) -return 0 ; - -omap_sr_disable_reset_volt (pdata->voltdm); - sr_info->is_suspended = true; -/* Flag the same info to the other CPUs */ -smp_wmb (); - -return 0 ; -} - -static int omap_sr_resume (struct device *dev) -{ -struct omap_sr_data *pdata; -struct omap_sr *sr_info; - - pdata =dev_get_platdata (dev); -if (!pdata) { -dev_err (dev,"%s: platform data missing\n" , __func__); -return -EINVAL ; - } - - sr_info =_sr_lookup (pdata->voltdm); -if (IS_ERR (sr_info)) { -dev_warn (dev,"%s: omap_sr struct not found\n" , __func__); -return -EINVAL ; - } - -if (!sr_info->autocomp_active) -return 0 ; - -if (!sr_info->is_suspended) -return 0 ; - - sr_info->is_suspended = false; -/* Flag the same info to the other CPUs */ -smp_wmb (); -omap_sr_enable (pdata->voltdm); - -return 0 ; -} - -const static struct dev_pm_ops omap_sr_dev_pm_ops = { - .suspend_noirq = omap_sr_suspend, - .resume_noirq = omap_sr_resume, -}; -static struct platform_driver smartreflex_driver = { .remove = omap_sr_remove, .driver = { .name ="smartreflex" , - .pm = &omap_sr_dev_pm_ops, }, };
Signature · 1 line
1.7.5.4
PATCH 5/21 Revert "OMAP3+: PM: SR: add suspend/resume handlers"
Salut Jean,
Quoted 3 lines · Jean Pihet
From: Nishanth Menon<[email protected]>
This reverts commit
b6be18f0bab68ed304ebbb2d787d1c36237eda62.
That weird, because you revert a patch you introduced just before:
[PATCH 03/21] OMAP3+: PM: SR: add suspend/resume handlers
Moreover this commit id is not relevant since it is probably only in Nishanth's GIT tree.
Quoted 7 lines
Revert the patch so that we remove any opportunity of SR disable/enable and any
device_scaletransitions from conflicting with suspend/resume path by moving the sr enable/disable activity to the very last stage(in pmxx.C). The previous patch tried to optimize suspend resume time, but sincedevice_scaleopportunities are from multiple drivers (other than cpufreq), hence reverting back to original approach
Quoted 5 lines
Conflicts:
arch/arm/mach-omap2/smartreflex.cChange-Id: I236b0e8259cfb371899dd0c93875739a21358e33
And this looks like gerrit leftover that should not be there.
I guess that path #3 and #5 should just be removed.
Regards,
Benoit
Quoted 153 lines
Signed-off-by Nishanth Menon<[email protected]>Signed-off-by Jean Pihet<[email protected]>--- arch/arm/mach-omap2/smartreflex.c | 90 ------------------------------------- 1 files changed, 0 insertions(+), 90 deletions(-)arch/arm/mach-omap2/smartreflex.c +0
-90@@ -24,7 +24,6 @@#include <linux/debugfs.h> #include <linux/delay.h> #include <linux/slab.h> -#include <linux/pm.h> #include <linux/pm_runtime.h> #include "common.h" @@ -41,7 +40,6 @@ struct omap_sr {int ip_type;int nvalue_count;bool autocomp_active; -bool is_suspended;u32 clk_length;u32 err_weight;u32 err_minlimit;@@ -687,11 +685,6 @@ void omap_sr_enable(struct voltagedomain *voltdm)if (!sr->autocomp_active)return ; -if (sr->is_suspended) { -dev_dbg (&sr->pdev->dev,"%s: in suspended state\n" , __func__); -return ; - } -if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) {dev_warn (&sr->pdev->dev,"%s: smartreflex class driver not" "registered\n" , __func__);@@ -725,11 +718,6 @@ void omap_sr_disable(struct voltagedomain *voltdm)if (!sr->autocomp_active)return ; -if (sr->is_suspended) { -dev_dbg (&sr->pdev->dev,"%s: in suspended state\n" , __func__); -return ; - } -if (!sr_class || !(sr_class->disable)) {dev_warn (&sr->pdev->dev,"%s: smartreflex class driver not" "registered\n" , __func__);@@ -763,11 +751,6 @@ void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)if (!sr->autocomp_active)return ; -if (sr->is_suspended) { -dev_dbg (&sr->pdev->dev,"%s: in suspended state\n" , __func__); -return ; - } -if (!sr_class || !(sr_class->disable)) {dev_warn (&sr->pdev->dev,"%s: smartreflex class driver not" "registered\n" , __func__);@@ -826,11 +809,6 @@ static int omap_sr_autocomp_store(void *data, u64 val)return -EINVAL ; } -if (sr_info->is_suspended) { -pr_warning ("%s: in suspended state\n" , __func__); -return -EBUSY ; - } -/* control enable/disable only if there is a delta in value */ if (sr_info->autocomp_active != val) {if (!val)@@ -1033,78 +1011,10 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)return 0 ; } -static int omap_sr_suspend (struct device *dev) -{ -struct omap_sr_data *pdata; -struct omap_sr *sr_info; - - pdata =dev_get_platdata (dev); -if (!pdata) { -dev_err (dev,"%s: platform data missing\n" , __func__); -return -EINVAL ; - } - - sr_info =_sr_lookup (pdata->voltdm); -if (IS_ERR (sr_info)) { -dev_warn (dev,"%s: omap_sr struct not found\n" , __func__); -return -EINVAL ; - } - -if (!sr_info->autocomp_active) -return 0 ; - -if (sr_info->is_suspended) -return 0 ; - -omap_sr_disable_reset_volt (pdata->voltdm); - sr_info->is_suspended = true; -/* Flag the same info to the other CPUs */ -smp_wmb (); - -return 0 ; -} - -static int omap_sr_resume (struct device *dev) -{ -struct omap_sr_data *pdata; -struct omap_sr *sr_info; - - pdata =dev_get_platdata (dev); -if (!pdata) { -dev_err (dev,"%s: platform data missing\n" , __func__); -return -EINVAL ; - } - - sr_info =_sr_lookup (pdata->voltdm); -if (IS_ERR (sr_info)) { -dev_warn (dev,"%s: omap_sr struct not found\n" , __func__); -return -EINVAL ; - } - -if (!sr_info->autocomp_active) -return 0 ; - -if (!sr_info->is_suspended) -return 0 ; - - sr_info->is_suspended = false; -/* Flag the same info to the other CPUs */ -smp_wmb (); -omap_sr_enable (pdata->voltdm); - -return 0 ; -} - -const static struct dev_pm_ops omap_sr_dev_pm_ops = { - .suspend_noirq = omap_sr_suspend, - .resume_noirq = omap_sr_resume, -}; -static struct platform_driver smartreflex_driver = { .remove = omap_sr_remove, .driver = { .name ="smartreflex" , - .pm =&omap_sr_dev_pm_ops, }, };
PATCH 5/21 Revert "OMAP3+: PM: SR: add suspend/resume handlers"
Hi Benoit,
Quoted 11 lines · Benoit
Salut Jean,
Quoted 4 lines · Jean Pihet
From: Nishanth Menon<[email protected]>
This reverts commit
b6be18f0bab68ed304ebbb2d787d1c36237eda62.That weird, because you revert a patch you introduced just before:
[PATCH 03/21] OMAP3+: PM: SR: add suspend/resume handlers
I left the 2 commits on purpose because I think the descriptions give a good description on why the commits have been introduced and then later removed.
Quoted 3 lines
Moreover this commit id is not relevant since it is probably only in Nishanth's GIT tree.
I removed this in the next version.
Quoted 9 lines
Quoted 9 lines
Revert the patch so that we remove any opportunity of SR disable/enable and any
device_scaletransitions from conflicting with suspend/resume path by moving the sr enable/disable activity to the very last stage(in pmxx.C). The previous patch tried to optimize suspend resume time, but sincedevice_scaleopportunities are from multiple drivers (other than cpufreq), hence reverting back to original approach
Quoted 5 lines
Quoted 5 lines
Conflicts:
? ? ? ?arch/arm/mach-omap2/smartreflex.c
Change-Id: I236b0e8259cfb371899dd0c93875739a21358e33
Removed as well. Sorry about that.
Quoted 4 lines
And this looks like gerrit leftover that should not be there.
I guess that path #3 and #5 should just be removed.
I am ok with both options (keeping or removing the 2 commits), please let me know what you prefer.
Quoted 5 lines
Regards,
Benoit
Thanks,
Jean
PATCH 5/21 Revert "OMAP3+: PM: SR: add suspend/resume handlers"
Quoted 36 lines · Jean Pihet
Hi Benoit,
Quoted 11 lines · Benoit
Salut Jean,
Quoted 4 lines · Jean Pihet
From: Nishanth Menon<[email protected]>
This reverts commit
b6be18f0bab68ed304ebbb2d787d1c36237eda62.That weird, because you revert a patch you introduced just before:
[PATCH 03/21] OMAP3+: PM: SR: add suspend/resume handlersI left the 2 commits on purpose because I think the descriptions give a good description on why the commits have been introduced and then later removed.
Quoted 3 lines
Moreover this commit id is not relevant since it is probably only in Nishanth's GIT tree.
I removed this in the next version.
Quoted 9 lines
Quoted 9 lines
Revert the patch so that we remove any opportunity of SR disable/enable and any
device_scaletransitions from conflicting with suspend/resume path by moving the sr enable/disable activity to the very last stage(in pmxx.C). The previous patch tried to optimize suspend resume time, but sincedevice_scaleopportunities are from multiple drivers (other than cpufreq), hence reverting back to original approachQuoted 5 lines
Quoted 5 lines
Conflicts:
arch/arm/mach-omap2/smartreflex.cChange-Id: I236b0e8259cfb371899dd0c93875739a21358e33
Quoted 8 lines
Removed as well. Sorry about that.
Quoted 4 lines
And this looks like gerrit leftover that should not be there.
I guess that path #3 and #5 should just be removed.
I am ok with both options (keeping or removing the 2 commits), please let me know what you prefer.
I guess that removing both is the only acceptable solution anyway. That might force you to change a little bit the #4, but maybe it not even needed.
Regards,
Benoit
PATCH 5/21 Revert "OMAP3+: PM: SR: add suspend/resume handlers"
Quoted 1 line · Benoit
On 1/25/2012 7:13 PM, Jean Pihet wrote:
[...]
Quoted 7 lines
Quoted 4 lines
Quoted 2 lines
I guess that path #3 and #5 should just be removed.
I am ok with both options (keeping or removing the 2 commits), please let me know what you prefer.
I guess that removing both is the only acceptable solution anyway.
Yes, please remove them both.
Kevin
PATCH 5/21 Revert "OMAP3+: PM: SR: add suspend/resume handlers"
Quoted 7 lines · Kevin Hilman
Quoted 1 line · Benoit
On 1/25/2012 7:13 PM, Jean Pihet wrote:
[...]
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 8 lines
Quoted 6 lines
Quoted 3 lines
Quoted 1 line
I guess that path #3 and #5 should just be removed.
I am ok with both options (keeping or removing the 2 commits), please let me know what you prefer.
I guess that removing both is the only acceptable solution anyway.
Yes, please remove them both.
Also, please drop Change-IDs as well.. :)
Regards,
Nishanth Menon
PATCH 5/21 Revert "OMAP3+: PM: SR: add suspend/resume handlers"
Hi Nishant,
Quoted 9 lines · Nishanth
Quoted 8 lines · Kevin Hilman
Quoted 1 line · Benoit
On 1/25/2012 7:13 PM, Jean Pihet wrote:
[...]
Quoted 2 lines
Quoted 2 lines
Quoted 2 lines
I guess that path #3 and #5 should just be removed.
Quoted 8 lines
Quoted 7 lines
Quoted 5 lines
Quoted 2 lines
I am ok with both options (keeping or removing the 2 commits), please let me know what you prefer.
I guess that removing both is the only acceptable solution anyway.
Yes, please remove them both.
Also, please drop Change-IDs as well.. :)
Done in the next revision!
Thanks for looking!
Jean
Quoted 3 lines
Regards,
Nishanth Menon
PATCH 6/21 OMAP3+: Smartreflex: fix err interrupt disable sequence
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
sr_modify_mask takes mask, value as parameters, the usage currently is value, mask which is wrong, as a result vpboundint_st which was supposed to have been disabled, does not get disabled.
--- arch/arm/mach-omap2/smartreflex.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-omap2/smartreflex.c +2 -2
@@ -447,8 +447,8 @@ int sr_configure_errgen(struct voltagedomain *voltdm) sr_errconfig);/* Enabling the interrupts if the ERROR module is used */ -sr_modify_reg (sr, errconfig_offs, - vpboundint_en, (vpboundint_en | vpboundint_st)); +sr_modify_reg (sr, errconfig_offs, (vpboundint_en | vpboundint_st), + vpboundint_en);return 0 ; }
Signature · 1 line
1.7.5.4
PATCH 7/21 OMAP3+: PM: SR/Class3: disable errorgen before disable VP
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
SmartReflex AVS Errorgen module supplies signals to Voltage Processor. It is suggested that by disabling Errorgen module before we disable VP, we might be able to ensure lesser chances of race condition to occur in the system.
--- arch/arm/mach-omap2/smartreflex-class3.c | 1 + arch/arm/mach-omap2/smartreflex.c | 44 ++++++++++++++++++++++++++++++ arch/arm/mach-omap2/smartreflex.h | 1 + 3 files changed, 46 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/smartreflex-class3.c +1 -0
@@ -29,6 +29,7 @@ static int sr_class3_enable(struct voltagedomain *voltdm)static int sr_class3_disable (struct voltagedomain *voltdm,int is_volt_reset) { +sr_disable_errgen (voltdm);omap_vp_disable (voltdm);sr_disable (voltdm);if (is_volt_reset)
arch/arm/mach-omap2/smartreflex.c +44 -0
50 lines not on this page · raw message
arch/arm/mach-omap2/smartreflex.h +1 -0
@@ -240,6 +240,7 @@ void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data);int sr_enable (struct voltagedomain *voltdm,unsigned long volt);void sr_disable (struct voltagedomain *voltdm);int sr_configure_errgen (struct voltagedomain *voltdm); +int sr_disable_errgen (struct voltagedomain *voltdm);int sr_configure_minmax (struct voltagedomain *voltdm);/* API to register the smartreflex class driver with the smartreflex driver */
Signature · 1 line
1.7.5.4
PATCH 7/21 OMAP3+: PM: SR/Class3: disable errorgen before disable VP
Hello.
Quoted 8 lines · Jean Pihet
From: Nishanth Menon<[email protected]>
SmartReflex AVS Errorgen module supplies signals to Voltage Processor. It is suggested that by disabling Errorgen module before we disable VP, we might be able to ensure lesser chances of race condition to occur in the system.
Change-Id: Id0145adacfa63d7652a29859ad6c95cc2ac61cc8
Please remove this line.
Quoted 2 lines
Signed-off-by Nishanth Menon<[email protected]>Signed-off-by Jean Pihet<[email protected]>
[...]
Quoted 16 lines
arch/arm/mach-omap2/smartreflex.c +8
-0@@ -454,6 +454,50 @@ int sr_configure_errgen(struct voltagedomain *voltdm) }/** +* sr_disable_errgen() - Disables SmartReflex AVS module's errgen component +* @voltdm: voltagedomain pointer to which the SR module to be configured belongs to. +* +* This API is to be called from the smartreflex class driver to +* disable the error generator module inside the smartreflex module. +* +* Returns 0 on success and error value in case of failure. +*/
arch/arm/mach-omap2/smartreflex.c int sr_configure_errgen(struct voltagedomain *voltdm) · line 474
Quoted 10 lines
arch/arm/mach-omap2/smartreflex.c +10
-0+int sr_disable_errgen (struct voltagedomain *voltdm) +{ +u32 errconfig_offs, vpboundint_en; +u32 vpboundint_st; +struct omap_sr *sr =_sr_lookup (voltdm); + +if (IS_ERR (sr)) { +pr_warning ("%s: omap_sr struct for sr_%s not found\n" , + __func__, voltdm->name); +return -EINVAL ;
Not PTR_ERR(sr)?
WBR, Sergei
PATCH 7/21 OMAP3+: PM: SR/Class3: disable errorgen before disable VP
Sergei,
Quoted 4 lines · Sergei Shtylyov
Hello.
On 25-01-2012 19:16, Jean Pihet wrote:
...
Quoted 2 lines
Quoted 1 line
Change-Id: Id0145adacfa63d7652a29859ad6c95cc2ac61cc8
? Please remove this line.
Done!
...
Quoted 5 lines
Quoted 5 lines
(quoted diff) +5
-0+int sr_disable_errgen(struct voltagedomain *voltdm) +{ + ? ? ? u32 errconfig_offs, vpboundint_en; + ? ? ? u32 vpboundint_st; + ? ? ? struct omap_sr *sr = _sr_lookup(voltdm);
Quoted 8 lines
Quoted 5 lines
+
+ ? ? ? if (IS_ERR(sr)) {
+ ? ? ? ? ? ? ? pr_warning("%s:omap_srstruct for sr_%s not found\n",
+ ? ? ? ? ? ? ? ? ? ? ?__func__,voltdm->name);
+ ? ? ? ? ? ? ? return-EINVAL;? Not
PTR_ERR(sr)?
_sr_lookup returns a return code using ERR_PTR so the return value should be checked for errors using IS_ERR. Please note that _sr_lookup checks for NULL parameter internally.
BTW in the next revision of patches (just submitted) there is an additional patch [19/19] that fixes a few problems related to the use of err.h macros.
Quoted 2 lines
WBR, Sergei
Regards,
Jean
PATCH 7/21 OMAP3+: PM: SR/Class3: disable errorgen before disable VP
Hello.
Quoted 16 lines · Jean Pihet
...
Quoted 5 lines
Quoted 5 lines
arch/arm/mach-omap2/smartreflex.c +5
-0+int sr_disable_errgen (struct voltagedomain *voltdm) +{ +u32 errconfig_offs, vpboundint_en; +u32 vpboundint_st; +struct omap_sr *sr =_sr_lookup (voltdm);Quoted 8 lines
arch/arm/mach-omap2/smartreflex.c int sr_configure_errgen(struct voltagedomain *voltdm) · line 474
Quoted 5 lines
arch/arm/mach-omap2/smartreflex.c +5
-0+ +if (IS_ERR (sr)) { +pr_warning ("%s: omap_sr struct for sr_%s not found\n" , + __func__, voltdm->name); +return -EINVAL ;Not
PTR_ERR(sr)?
Quoted 3 lines
_sr_lookupreturns a return code usingERR_PTRso the return value should be checked for errors usingIS_ERR. Please note that_sr_lookupchecks for NULL parameter internally.
That's clear. I was asking don't you want to return PTR_ERR(sr) instead of-EINVAL.
WBR, Sergei
PATCH 7/21 OMAP3+: PM: SR/Class3: disable errorgen before disable VP
Sergei,
Quoted 24 lines · Sergei Shtylyov
Hello.
Quoted 17 lines · Jean Pihet
...
Quoted 14 lines
Review
Quoted 10 lines
(quoted diff) +10
-0+int sr_disable_errgen(struct voltagedomain *voltdm) +{ + ? ? ? u32 errconfig_offs, vpboundint_en; + ? ? ? u32 vpboundint_st; + ? ? ? struct omap_sr *sr = _sr_lookup(voltdm); + + ? ? ? if (IS_ERR(sr)) { + ? ? ? ? ? ? ? pr_warning("%s: omap_sr struct for sr_%s not found\n", + ? ? ? ? ? ? ? ? ? ? ? __func__, voltdm->name); + ? ? ? ? ? ? ? return -EINVAL;? Not
PTR_ERR(sr)?
Quoted 7 lines
Quoted 3 lines
_sr_lookupreturns a return code usingERR_PTRso the return value should be checked for errors usingIS_ERR. Please note that_sr_lookupchecks for NULL parameter internally.? That's clear. I was asking don't you want to return
PTR_ERR(sr)instead of-EINVAL.
Oh yes you are correct, that is a good catch. Sorry for my misunderstanding.
I caught the same problem at a few other places and I have a patch ready for the error handling code. To be submitted asap.
Quoted 2 lines
WBR, Sergei
Thanks!
Jean
PATCH 8/21 OMAP3+: Smartreflex: Add a shutdown hook
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
Since OMAP's VP and PRM modules do not get reset by warm reset, we should ensure that proper shutdown procedure is followed prior to allowing the kernel to reboot back up.
Without this patch, Smartreflex module might be left active or system might be caught in an indeterminate sequence when reboot is triggered, leaving the next reboot behavior to be unpredictable.
--- arch/arm/mach-omap2/smartreflex.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/smartreflex.c +24 -0
@@ -1055,8 +1055,32 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)return 0 ; } +static void __devexit omap_sr_shutdown(struct platform_device *pdev) +{ +struct omap_sr_data *pdata = pdev->dev.platform_data; +struct omap_sr *sr_info; + +if (!pdata) { +dev_err (&pdev->dev,"%s: platform data missing\n" , __func__); +return ; + } + + sr_info =_sr_lookup (pdata->voltdm); +if (IS_ERR (sr_info)) { +dev_warn (&pdev->dev,"%s: omap_sr struct not found\n" , + __func__); +return ; + } + +if (sr_info->autocomp_active) +sr_stop_vddautocomp (sr_info); + +return ; +} +static struct platform_driver smartreflex_driver = { .remove = omap_sr_remove, + .shutdown = omap_sr_shutdown, .driver = { .name ="smartreflex" , },
Signature · 1 line
1.7.5.4
PATCH 8/21 OMAP3+: Smartreflex: Add a shutdown hook
Hello.
Quoted 11 lines · Jean Pihet
From: Nishanth Menon<[email protected]>
Since OMAP's VP and PRM modules do not get reset by warm reset, we should ensure that proper shutdown procedure is followed prior to allowing the kernel to reboot back up.
Without this patch, Smartreflex module might be left active or system might be caught in an indeterminate sequence when reboot is triggered, leaving the next reboot behavior to be unpredictable.
Change-Id: I7f8c66cc45f8785394cce1fdde3cfda15ecc1fbc
This line has no place in the upstream patch, please remove it.
Quoted 5 lines
Signed-off-by Nishanth Menon<[email protected]>Signed-off-by Jean Pihet<[email protected]>--- arch/arm/mach-omap2/smartreflex.c | 24 ++++++++++++++++++++++++ 1 files changed, 24 insertions(+), 0 deletions(-)
WBR, Sergei
PATCH 9/21 OMAP3+: Smartreflex: Fix status masking in ERRCONFIG register
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
ERRCONFIG register has status bits that were intended not to be destroyed by bad modification. We cleanup and simplify the handling the status in the modify path.
--- arch/arm/mach-omap2/smartreflex.c | 21 ++++++++------------- 1 files changed, 8 insertions(+), 13 deletions(-)
arch/arm/mach-omap2/smartreflex.c +8 -13
@@ -74,10 +74,6 @@ static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask, u32 value) {u32 reg_val; -u32 errconfig_offs =0 , errconfig_mask =0 ; - - reg_val =__raw_readl (sr->base + offset); - reg_val &= ~mask;/* * Smartreflex error config register is special as it contains
@@ -88,16 +84,15 @@ static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask,* if they are currently set, but does allow the caller to write * those bits. */ -if (sr->ip_type ==SR_TYPE_V1 ) { - errconfig_offs =ERRCONFIG_V1 ; - errconfig_mask =ERRCONFIG_STATUS_V1_MASK ; - }else if (sr->ip_type ==SR_TYPE_V2 ) { - errconfig_offs =ERRCONFIG_V2 ; - errconfig_mask =ERRCONFIG_VPBOUNDINTST_V2 ; - } +if (sr->ip_type ==SR_TYPE_V1 && offset ==ERRCONFIG_V1 ) + mask |=ERRCONFIG_STATUS_V1_MASK ; +else if (sr->ip_type ==SR_TYPE_V2 && offset ==ERRCONFIG_V2 ) + mask |=ERRCONFIG_VPBOUNDINTST_V2 ; + + reg_val =__raw_readl (sr->base + offset); + reg_val &= ~mask; -if (offset == errconfig_offs) - reg_val &= ~errconfig_mask; + value &= mask; reg_val |= value;
Signature · 1 line
1.7.5.4
PATCH 9/21 OMAP3+: Smartreflex: Fix status masking in ERRCONFIG register
Hello.
Quoted 7 lines · Jean Pihet
From: Nishanth Menon<[email protected]>
ERRCONFIG register has status bits that were intended not to be destroyed by bad modification. We cleanup and simplify the handling the status in the modify path.
Change-Id: I5a7e19fe924a05ffe38c8e31ae8acc48aee8c3f6
Please remove this line.
Quoted 3 lines
Reported-by Vincent Bour<[email protected]>Signed-off-by Nishanth Menon<[email protected]>Signed-off-by Jean Pihet<[email protected]>
WBR, Sergei
PATCH 10/21 OMAP3+: Smartreflex: clear ERRCONFIG_VPBOUNDINTST only on a need
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
ERRCONFIG register's VPBOUNDINTST has an additional functional meaning It force clears Sr_interruptz internal signal. This can result in scenarios where VP-> SR protocol is violated where voltage processor's As interruptz is already high, VP will never clear the signal vpirqclr. Therefore during the next force update to reset to nominal voltage, VP can?t pulsed vpirqclr => PRCM HW can?t generate the tranxdone IRQ and the situation is not recoverable untill a cold reset is invoked.
To prevent this situation, check if status is set before clearing the status as this needs to be done only on a need basis.
--- arch/arm/mach-omap2/smartreflex.c | 22 ++++++++++++++++------ 1 files changed, 16 insertions(+), 6 deletions(-)
arch/arm/mach-omap2/smartreflex.c +16 -6
@@ -289,6 +289,8 @@ error:static void sr_v1_disable (struct omap_sr *sr) {int timeout =0 ; +int errconf_val =ERRCONFIG_MCUACCUMINTST |ERRCONFIG_MCUVALIDINTST | +ERRCONFIG_MCUBOUNDINTST ;/* Enable MCUDisableAcknowledge interrupt */ sr_modify_reg(sr, ERRCONFIG_V1,
@@ -297,13 +299,13 @@ static void sr_v1_disable(struct omap_sr *sr)/* SRCONFIG - disable SR */ sr_modify_reg (sr,SRCONFIG ,SRCONFIG_SRENABLE ,0x0 ); -/* Disable all other SR interrupts and clear the status */ +/* Disable all other SR interrupts and clear the status as needed */ +if (sr_read_reg (sr,ERRCONFIG_V1 ) &ERRCONFIG_VPBOUNDINTST_V1 ) + errconf_val |=ERRCONFIG_VPBOUNDINTST_V1 ;sr_modify_reg (sr,ERRCONFIG_V1 , (ERRCONFIG_MCUACCUMINTEN |ERRCONFIG_MCUVALIDINTEN |ERRCONFIG_MCUBOUNDINTEN |ERRCONFIG_VPBOUNDINTEN_V1 ), - (ERRCONFIG_MCUACCUMINTST |ERRCONFIG_MCUVALIDINTST | -ERRCONFIG_MCUBOUNDINTST | -ERRCONFIG_VPBOUNDINTST_V1 )); + errconf_val);/* * Wait for SR to be disabled.
@@ -332,9 +334,17 @@ static void sr_v2_disable(struct omap_sr *sr)/* SRCONFIG - disable SR */ sr_modify_reg (sr,SRCONFIG ,SRCONFIG_SRENABLE ,0x0 ); -/* Disable all other SR interrupts and clear the status */ -sr_modify_reg (sr,ERRCONFIG_V2 ,ERRCONFIG_VPBOUNDINTEN_V2 , +/* +* Disable all other SR interrupts and clear the status +* write to status register ONLY on need basis - only if status +* is set. +*/ +if (sr_read_reg (sr,ERRCONFIG_V2 ) &ERRCONFIG_VPBOUNDINTST_V2 ) +sr_modify_reg (sr,ERRCONFIG_V2 ,ERRCONFIG_VPBOUNDINTEN_V2 ,ERRCONFIG_VPBOUNDINTST_V2 ); +else +sr_modify_reg (sr,ERRCONFIG_V2 ,ERRCONFIG_VPBOUNDINTEN_V2 , +0x0 );sr_write_reg (sr,IRQENABLE_CLR , (IRQENABLE_MCUACCUMINT |IRQENABLE_MCUVALIDINT |IRQENABLE_MCUBOUNDSINT ));
Signature · 1 line
1.7.5.4
PATCH 10/21 OMAP3+: Smartreflex: clear ERRCONFIG_VPBOUNDINTST only on a need
Hello.
Quoted 10 lines · Jean Pihet
From: Nishanth Menon<[email protected]>
ERRCONFIG register's VPBOUNDINTST has an additional functional meaning It force clears
Sr_interruptzinternal signal. This can result in scenarios where VP-> SR protocol is violated where voltage processor's As interruptz is already high, VP will never clear the signal vpirqclr. Therefore during the next force update to reset to nominal voltage, VP can?t pulsed vpirqclr => PRCM HW can?t generate the tranxdone IRQ and the situation is not recoverable untill a cold reset is invoked.
Quoted 4 lines
To prevent this situation, check if status is set before clearing the status as this needs to be done only on a need basis.
Change-Id: Ic8065d7d79df143bf46877c50f5b6b19ed105a70
Please remove this line.
Quoted 3 lines
Reported-by Vincent Bour<[email protected]>Signed-off-by Nishanth Menon<[email protected]>Signed-off-by Jean Pihet<[email protected]>
WBR, Sergei
PATCH 11/21 OMAP3: hwmod: add SmartReflex IRQs
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
OMAP3 SmartReflex IRQs in hwmod structures with the same naming as present in OMAP4. Without these IRQs being registered, SmartReflex driver will be unable to get the IRQ numbers to handle notifications
--- arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 14 ++++++++++++++ 1 files changed, 14 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +14 -0
@@ -377,6 +377,16 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +static struct omap_hwmod_irq_info omap3_smartreflex_mpu_irqs[] = { + { .name ="sr1_irq" , .irq =18 }, + { .irq =-1 } +}; + +static struct omap_hwmod_irq_info omap3_smartreflex_core_irqs[] = { + { .name ="sr2_irq" , .irq =19 }, + { .irq =-1 } +}; +/* L4 CORE -> SR1 interface */ static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = { {
@@ -2667,6 +2677,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { .slaves = omap3_sr1_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), .dev_attr = &sr1_dev_attr, + .mpu_irqs = omap3_smartreflex_mpu_irqs, .flags = HWMOD_SET_DEFAULT_CLOCKACT, };
@@ -2686,6 +2697,7 @@ static struct omap_hwmod omap36xx_sr1_hwmod = { .slaves = omap3_sr1_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr1_slaves), .dev_attr = &sr1_dev_attr, + .mpu_irqs = omap3_smartreflex_mpu_irqs, };/* SR2 */
@@ -2713,6 +2725,7 @@ static struct omap_hwmod omap34xx_sr2_hwmod = { .slaves = omap3_sr2_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), .dev_attr = &sr2_dev_attr, + .mpu_irqs = omap3_smartreflex_core_irqs, .flags = HWMOD_SET_DEFAULT_CLOCKACT, };
@@ -2732,6 +2745,7 @@ static struct omap_hwmod omap36xx_sr2_hwmod = { .slaves = omap3_sr2_slaves, .slaves_cnt = ARRAY_SIZE(omap3_sr2_slaves), .dev_attr = &sr2_dev_attr, + .mpu_irqs = omap3_smartreflex_core_irqs, };/*
Signature · 1 line
1.7.5.4
PATCH 11/21 OMAP3: hwmod: add SmartReflex IRQs
Hello.
Quoted 7 lines · Jean Pihet
From: Nishanth Menon<[email protected]>
OMAP3 SmartReflex IRQs in hwmod structures with the same naming as present in OMAP4. Without these IRQs being registered, SmartReflex driver will be unable to get the IRQ numbers to handle notifications
Change-Id: Iaba431b3d4a5c2e4ce64e3aa54f0148058d6662f
Please remove this line.
Quoted 2 lines
Signed-off-by Nishanth Menon<[email protected]>Signed-off-by Jean Pihet<[email protected]>
WBR, Sergei
PATCH 12/21 OMAP3+: SR: introduce class init,deinit and priv data
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
Certain class drivers such as class 1.5 drivers, will need specific notification that they have to be inited up or deinited independent of smart reflex operation. They also may need private data to be used for operations of their own, provide the same.
This allows the class driver to initialize it's internal data structures on a need basis in preparation for the specific domain's autocomp usage. The resultant operation is as follows:
when autocomp is set to 1 -> class drivers' init is called The existing enable/disable is still used as before by the SmartReflex core driver to enable disable the class operation.
When autocomp is set to 0 -> class drivers' deinit is called, signaling the end of usage for that domain.
--- arch/arm/mach-omap2/smartreflex.c | 15 +++++++++++++++ arch/arm/mach-omap2/smartreflex.h | 6 ++++++ 2 files changed, 21 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/smartreflex.c +15 -0
@@ -218,6 +218,13 @@ static void sr_start_vddautocomp(struct omap_sr *sr)return ; } +if (sr_class->init && + sr_class->init (sr->voltdm, sr_class->class_priv_data)) { +dev_err (&sr->pdev->dev, +"%s: SRClass initialization failed\n" , __func__); +return ; + } +if (!sr_class->enable (sr->voltdm)) sr->autocomp_active = true; }
@@ -233,6 +240,14 @@ static void sr_stop_vddautocomp(struct omap_sr *sr)if (sr->autocomp_active) { sr_class->disable (sr->voltdm,1 ); +if (sr_class->deinit && + sr_class->deinit (sr->voltdm, + sr_class->class_priv_data)) { +dev_err (&sr->pdev->dev, +"%s: SR[%d]Class deinitialization failed\n" , + __func__, sr->srid); + } + sr->autocomp_active = false; } }
arch/arm/mach-omap2/smartreflex.h +6 -0
@@ -177,6 +177,8 @@ struct omap_smartreflex_dev_attr {* * @enable: API to enable a particular class smaartreflex. * @disable: API to disable a particular class smartreflex. +* @init: API to do class specific initialization (optional) +* @deinit: API to do class specific deinitialization (optional) * @configure: API to configure a particular class smartreflex. * @notify: API to notify the class driver about an event in SR. * Not needed for class3.
@@ -184,14 +186,18 @@ struct omap_smartreflex_dev_attr {* @class_type: specify which smartreflex class. * Can be used by the SR driver to take any class * based decisions. +* @class_priv_data: Class specific private data (optional) */ struct omap_sr_class_data {int (*enable)(struct voltagedomain *voltdm);int (*disable)(struct voltagedomain *voltdm,int is_volt_reset); +int (*init)(struct voltagedomain *voltdm,void *class_priv_data); +int (*deinit)(struct voltagedomain *voltdm,void *class_priv_data);int (*configure)(struct voltagedomain *voltdm);int (*notify)(struct voltagedomain *voltdm,u32 status);u8 notify_flags;u8 class_type; +void *class_priv_data; };/**
Signature · 1 line
1.7.5.4
PATCH 12/21 OMAP3+: SR: introduce class init,deinit and priv data
Hello.
Quoted 15 lines · Jean Pihet
From: Nishanth Menon<[email protected]>
Certain class drivers such as class 1.5 drivers, will need specific notification that they have to be inited up or deinited independent of smart reflex operation. They also may need private data to be used for operations of their own, provide the same.
This allows the class driver to initialize it's internal data structures on a need basis in preparation for the specific domain's autocomp usage. The resultant operation is as follows:
when autocomp is set to 1 -> class drivers' init is called The existing enable/disable is still used as before by the SmartReflex core driver to enable disable the class operation.
When autocomp is set to 0 -> class drivers' deinit is called, signaling the end of usage for that domain.
Quoted 1 line
Change-Id: Ie6a4b163d52af4931a4506ed7a3a6b752173a674
Please remove this line.
Quoted 2 lines
Signed-off-by Nishanth Menon<[email protected]>Signed-off-by Jean Pihet<[email protected]>
WBR, Sergei
PATCH 13/21 OMAP3+: SR: introduce notifiers flags
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
SmartReflex IP V1 and V2 have different registers and offsets. Currently, we pass the status as is to the class driver. However, since we don't pass the version of the underlying SR hardware to the Class driver, it will not be unable to make consistent sense of the status bits coming over to it.
A class driver should be able to function without dependency on the exact IP version it is actually running on. We hence introduce our own translation in software level for a generic notification flag.
As part of this change, we will now call the notifier if we get a match with the notifier flags that the class driver requested.
--- arch/arm/mach-omap2/smartreflex.c | 78 ++++++++++++++++++++++++++++++++++++- arch/arm/mach-omap2/smartreflex.h | 6 +++ 2 files changed, 82 insertions(+), 2 deletions(-)
arch/arm/mach-omap2/smartreflex.c +76 -2
@@ -121,27 +121,101 @@ static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm)return ERR_PTR (-ENODATA ); } +static inline u32 notifier_to_irqen_v1 (u8 notify_flags) +{ +u32 val; + + val = (notify_flags &SR_NOTIFY_MCUACCUM ) ? +ERRCONFIG_MCUACCUMINTEN :0 ; + val |= (notify_flags &SR_NOTIFY_MCUVALID ) ? +ERRCONFIG_MCUVALIDINTEN :0 ; + val |= (notify_flags &SR_NOTIFY_MCUBOUND ) ? +ERRCONFIG_MCUBOUNDINTEN :0 ; + val |= (notify_flags &SR_NOTIFY_MCUDISACK ) ? +ERRCONFIG_MCUDISACKINTEN :0 ; + +return val; +} + +static inline u32 notifier_to_irqen_v2 (u8 notify_flags) +{ +u32 val; + + val = (notify_flags &SR_NOTIFY_MCUACCUM ) ? +IRQENABLE_MCUACCUMINT :0 ; + val |= (notify_flags &SR_NOTIFY_MCUVALID ) ? +IRQENABLE_MCUVALIDINT :0 ; + val |= (notify_flags &SR_NOTIFY_MCUBOUND ) ? +IRQENABLE_MCUBOUNDSINT :0 ; + val |= (notify_flags &SR_NOTIFY_MCUDISACK ) ? +IRQENABLE_MCUDISABLEACKINT :0 ; + +return val; +} + +static inline u8 irqstat_to_notifier_v1 (u32 status) +{ +u8 val; + + val = (status &ERRCONFIG_MCUACCUMINTST ) ? +SR_NOTIFY_MCUACCUM :0 ; + val |= (status &ERRCONFIG_MCUVALIDINTEN ) ? +SR_NOTIFY_MCUVALID :0 ; + val |= (status &ERRCONFIG_MCUBOUNDINTEN ) ? +SR_NOTIFY_MCUBOUND :0 ; + val |= (status &ERRCONFIG_MCUDISACKINTEN ) ? +SR_NOTIFY_MCUDISACK :0 ; + +return val; +} + +static inline u8 irqstat_to_notifier_v2 (u32 status) +{ +u8 val; + + val = (status &IRQENABLE_MCUACCUMINT ) ? +SR_NOTIFY_MCUACCUM :0 ; + val |= (status &IRQENABLE_MCUVALIDINT ) ? +SR_NOTIFY_MCUVALID :0 ; + val |= (status &IRQENABLE_MCUBOUNDSINT ) ? +SR_NOTIFY_MCUBOUND :0 ; + val |= (status &IRQENABLE_MCUDISABLEACKINT ) ? +SR_NOTIFY_MCUDISACK :0 ; + +return val; +} +static irqreturn_t sr_interrupt (int irq,void *data) {struct omap_sr *sr_info = (struct omap_sr *)data;u32 status =0 ; +u32 value =0 ;if (sr_info->ip_type ==SR_TYPE_V1 ) { +/* Status bits are one bit before enable bits in v1 */ + value =notifier_to_irqen_v1 (sr_class->notify_flags) >>1 ; +/* Read the status bits */ status =sr_read_reg (sr_info,ERRCONFIG_V1 ); + status &= value;/* Clear them by writing back */ -sr_write_reg (sr_info,ERRCONFIG_V1 , status); +sr_modify_reg (sr_info,ERRCONFIG_V1 , value, status); + + value =irqstat_to_notifier_v1 (status); }else if (sr_info->ip_type ==SR_TYPE_V2 ) { + value =notifier_to_irqen_v2 (sr_class->notify_flags);/* Read the status bits */ status =sr_read_reg (sr_info,IRQSTATUS ); + status &= value;/* Clear them by writing back */ sr_write_reg (sr_info,IRQSTATUS , status); + value =irqstat_to_notifier_v2 (status); }if (sr_class->notify) - sr_class->notify (sr_info->voltdm, status); + sr_class->notify (sr_info->voltdm, value);return IRQ_HANDLED ; }
arch/arm/mach-omap2/smartreflex.h +6 -0
@@ -142,6 +142,12 @@#define OMAP3430_SR_ERRWEIGHT 0x04#define OMAP3430_SR_ERRMAXLIMIT 0x02 +/* Smart reflex notifiers for class drivers to use */ +#define SR_NOTIFY_MCUDISACK BIT(3) +#define SR_NOTIFY_MCUBOUND BIT(2) +#define SR_NOTIFY_MCUVALID BIT(1) +#define SR_NOTIFY_MCUACCUM BIT(0) +/** * struct omap_sr_pmic_data - Strucutre to be populated by pmic code to pass * pmic specific info to smartreflex driver
Signature · 1 line
1.7.5.4
PATCH 14/21 OMAP3+: SR: introduce notifier_control
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
We need some mechanism from class drivers to control when notifiers should be triggered and when not, currently we have none, which makes Class driver usage of the interrupt events almost impossible.
We also ensure that disable/enable or irq is always guarenteed to be paired. The need to do this is because of the mixture of interrupt based and polling based operations that is implemented as the most optimal strategy for various SmartReflex AVS class
Introduce an SmartReflex driver API for doing the same. This is useful for SmartReflex AVS class 1.5 or 2 drivers.
--- arch/arm/mach-omap2/smartreflex.c | 65 +++++++++++++++++++++++++++++++++++++ arch/arm/mach-omap2/smartreflex.h | 8 ++++ 2 files changed, 73 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/smartreflex.c +65 -0
@@ -50,6 +50,7 @@ struct omap_sr {u32 senp_mod;u32 senn_mod;unsigned int irq; +bool irq_enabled;void __iomem *base;struct platform_device *pdev;struct list_head node;
@@ -765,6 +766,70 @@ void sr_disable(struct voltagedomain *voltdm) }/** +* sr_notifier_control() - control the notifier mechanism +* @voltdm: VDD pointer to which the SR module to be configured belongs to. +* @enable: true to enable notifiers and false to disable the same +* +* SR modules allow an MCU interrupt mechanism that vary based on the IP +* revision, we allow the system to generate interrupt if the class driver +* has capability to handle the same. it is upto the class driver to ensure +* the proper sequencing and handling for a clean implementation. returns +* 0 if all goes fine, else returns failure results +*/ +int sr_notifier_control (struct voltagedomain *voltdm,bool enable) +{ +struct omap_sr *sr =_sr_lookup (voltdm); +u32 value =0 ; + +if (!sr) { +pr_warning ("%s: sr corresponding to domain not found\n" , + __func__); +return -EINVAL ; + } +if (!sr->autocomp_active) +return -EINVAL ; + +/* If I could never register an ISR, why bother?? */ +if (!(sr_class && sr_class->notify && sr_class->notify_flags && + sr->irq)) { +dev_warn (&sr->pdev->dev, +"%s: unable to setup IRQ without handling mechanism\n" , + __func__); +return -EINVAL ; + } + +switch (sr->ip_type) { +case SR_TYPE_V1 : + value =notifier_to_irqen_v1 (sr_class->notify_flags); +sr_modify_reg (sr,ERRCONFIG_V1 , value, + (enable) ? value :0 ); +break ; +case SR_TYPE_V2 : + value =notifier_to_irqen_v2 (sr_class->notify_flags); +sr_write_reg (sr, (enable) ?IRQENABLE_SET :IRQENABLE_CLR , + value); +break ; +default : +dev_warn (&sr->pdev->dev,"%s: unknown type of sr??\n" , + __func__); +return -EINVAL ; + } + +if (!enable) +sr_write_reg (sr,IRQSTATUS , value); + +if (enable != sr->irq_enabled) { +if (enable) +enable_irq (sr->irq); +else +disable_irq (sr->irq); + sr->irq_enabled = enable; + } + +return 0 ; +} + +/** * sr_register_class() - API to register a smartreflex class parameters. * @class_data: The structure containing various sr class specific data. *
arch/arm/mach-omap2/smartreflex.h +8 -0
@@ -251,6 +251,7 @@ void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data);/* Smartreflex driver hooks to be called from Smartreflex class driver */ int sr_enable (struct voltagedomain *voltdm,unsigned long volt);void sr_disable (struct voltagedomain *voltdm); +int sr_notifier_control (struct voltagedomain *voltdm,bool enable);int sr_configure_errgen (struct voltagedomain *voltdm);int sr_disable_errgen (struct voltagedomain *voltdm);int sr_configure_minmax (struct voltagedomain *voltdm);
@@ -260,6 +261,13 @@ int sr_register_class(struct omap_sr_class_data *class_data);#else static inline void omap_sr_enable (struct voltagedomain *voltdm) {}static inline void omap_sr_disable (struct voltagedomain *voltdm) {} + +static inline int sr_notifier_control (struct voltagedomain *voltdm, +bool enable) +{ +return -EINVAL ; +} +static inline void omap_sr_disable_reset_volt (struct voltagedomain *voltdm) {} static inline void omap_sr_register_pmic(
Signature · 1 line
1.7.5.4
PATCH 15/21 OMAP3+: SR: disable spamming interrupts
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
At times with bad SR configurations, especially during silicon bring-ups, we could get continuous spurious interrupts which end up hanging the platform in the form of an ISR call for status bits that are automatically enabled by the hardware without any software clearing option.
If we detect scenarios where ISR was called without the corresponding notification bit being set, instead of hanging up the system, we will disable interrupt after noting the event in the system log to try and keep system sanity and allow developer to debug and fix the condition.
--- arch/arm/mach-omap2/smartreflex.c | 21 +++++++++++++++++++-- 1 files changed, 19 insertions(+), 2 deletions(-)
arch/arm/mach-omap2/smartreflex.c +19 -2
@@ -215,8 +215,25 @@ static irqreturn_t sr_interrupt(int irq, void *data) value =irqstat_to_notifier_v2 (status); } -if (sr_class->notify) - sr_class->notify (sr_info->voltdm, value); +/* Attempt some resemblance of recovery! */ +if (!value) { +dev_err (&sr_info->pdev->dev,"%s: Spurious interrupt!" +"status = 0x%08x. Disabling to prevent spamming!!\n" , + __func__, status); +disable_irq_nosync (sr_info->irq); + sr_info->irq_enabled = false; + }else { +/* If the caller reports inability to handle, disable as well */ +if (sr_class->notify && + sr_class->notify (sr_info->voltdm, value)) { +dev_err (&sr_info->pdev->dev,"%s: Callback cant handle!" +"status=0x%08x. Disabling to prevent spam!!\n" , + __func__, status); +disable_irq_nosync (sr_info->irq); + sr_info->irq_enabled = false; + } + + }return IRQ_HANDLED ; }
Signature · 1 line
1.7.5.4
PATCH 16/21 OMAP3+: SR: introduce class private data per voltage domain
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
Introduce private data for class drivers to operate on per voltage domain. This removes the necessity for drivers such as SmartReflex AVS Class 1.5 drivers from maintaining a special lookup table which does not scale when number of voltage domains change depending on silicon. It also makes the life of such class drivers to be faster without having to do a double lookup to get to their voltage domain specific private data
--- arch/arm/mach-omap2/smartreflex-class3.c | 10 +++++++--- arch/arm/mach-omap2/smartreflex.c | 23 +++++++++++++---------- arch/arm/mach-omap2/smartreflex.h | 16 ++++++++++------ 3 files changed, 30 insertions(+), 19 deletions(-)
arch/arm/mach-omap2/smartreflex-class3.c +7 -3
@@ -13,7 +13,8 @@#include "smartreflex.h" -static int sr_class3_enable (struct voltagedomain *voltdm) +static int sr_class3_enable (struct voltagedomain *voltdm, +void *voltdm_cdata) {unsigned long volt =voltdm_get_voltage (voltdm);
@@ -27,7 +28,9 @@ static int sr_class3_enable(struct voltagedomain *voltdm)return sr_enable (voltdm, volt); } -static int sr_class3_disable (struct voltagedomain *voltdm,int is_volt_reset) +static int sr_class3_disable (struct voltagedomain *voltdm, +void *voltdm_cdata, +int is_volt_reset) {sr_disable_errgen (voltdm);omap_vp_disable (voltdm);
@@ -38,7 +41,8 @@ static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset)return 0 ; } -static int sr_class3_configure (struct voltagedomain *voltdm) +static int sr_class3_configure (struct voltagedomain *voltdm, +void *voltdm_cdata) {return sr_configure_errgen (voltdm); }
arch/arm/mach-omap2/smartreflex.c +13 -10
@@ -56,6 +56,8 @@ struct omap_sr {struct list_head node;struct omap_sr_nvalue_table *nvalue_table;struct voltagedomain *voltdm; +/* Managed by class driver as needed */ +void *voltdm_cdata;struct dentry *dbg_dir; };
@@ -224,8 +226,8 @@ static irqreturn_t sr_interrupt(int irq, void *data) sr_info->irq_enabled = false; }else {/* If the caller reports inability to handle, disable as well */ -if (sr_class->notify && - sr_class->notify (sr_info->voltdm, value)) { +if (sr_class->notify && sr_class->notify (sr_info->voltdm, + sr_info->voltdm_cdata, value)) {dev_err (&sr_info->pdev->dev,"%s: Callback cant handle!" "status=0x%08x. Disabling to prevent spam!!\n" , __func__, status);
@@ -311,13 +313,14 @@ static void sr_start_vddautocomp(struct omap_sr *sr) }if (sr_class->init && - sr_class->init (sr->voltdm, sr_class->class_priv_data)) { + sr_class->init (sr->voltdm, &sr->voltdm_cdata, + sr_class->class_priv_data)) {dev_err (&sr->pdev->dev,"%s: SRClass initialization failed\n" , __func__);return ; } -if (!sr_class->enable (sr->voltdm)) +if (!sr_class->enable (sr->voltdm, sr->voltdm_cdata)) sr->autocomp_active = true; }
@@ -331,9 +334,9 @@ static void sr_stop_vddautocomp(struct omap_sr *sr) }if (sr->autocomp_active) { - sr_class->disable (sr->voltdm,1 ); + sr_class->disable (sr->voltdm, sr->voltdm_cdata,1 );if (sr_class->deinit && - sr_class->deinit (sr->voltdm, + sr_class->deinit (sr->voltdm, &sr->voltdm_cdata, sr_class->class_priv_data)) { dev_err(&sr->pdev->dev, "%s: SR[%d]Class deinitialization failed\n",
@@ -736,7 +739,7 @@ int sr_enable(struct voltagedomain *voltdm, unsigned long volt)return 0 ;/* Configure SR */ - ret = sr_class->configure (voltdm); + ret = sr_class->configure (voltdm, sr->voltdm_cdata);if (ret)return ret;
@@ -911,7 +914,7 @@ void omap_sr_enable(struct voltagedomain *voltdm)return ; } - sr_class->enable (voltdm); + sr_class->enable (voltdm, sr->voltdm_cdata); }/**
@@ -944,7 +947,7 @@ void omap_sr_disable(struct voltagedomain *voltdm)return ; } - sr_class->disable (voltdm,0 ); + sr_class->disable (voltdm, sr->voltdm_cdata,0 ); }/**
@@ -977,7 +980,7 @@ void omap_sr_disable_reset_volt(struct voltagedomain *voltdm)return ; } - sr_class->disable (voltdm,1 ); + sr_class->disable (voltdm, sr->voltdm_cdata,1 ); }/**
arch/arm/mach-omap2/smartreflex.h +10 -6
@@ -195,12 +195,16 @@ struct omap_smartreflex_dev_attr {* @class_priv_data: Class specific private data (optional) */ struct omap_sr_class_data { -int (*enable)(struct voltagedomain *voltdm); -int (*disable)(struct voltagedomain *voltdm,int is_volt_reset); -int (*init)(struct voltagedomain *voltdm,void *class_priv_data); -int (*deinit)(struct voltagedomain *voltdm,void *class_priv_data); -int (*configure)(struct voltagedomain *voltdm); -int (*notify)(struct voltagedomain *voltdm,u32 status); +int (*enable)(struct voltagedomain *voltdm,void *voltdm_cdata); +int (*disable)(struct voltagedomain *voltdm,void *voltdm_cdata, +int is_volt_reset); +int (*init)(struct voltagedomain *voltdm,void **voltdm_cdata, +void *class_priv_data); +int (*deinit)(struct voltagedomain *voltdm,void **voltdm_cdata, +void *class_priv_data); +int (*configure)(struct voltagedomain *voltdm,void *voltdm_cdata); +int (*notify)(struct voltagedomain *voltdm,void *voltdm_cdata, +u32 status);u8 notify_flags;u8 class_type;void *class_priv_data;
Signature · 1 line
1.7.5.4
PATCH 17/21 OMAP3430: SR: class3: restrict CPU to run on
In reply to Jean PihetFrom: Nishanth Menon <[email protected]>
Use SmartReflex AVS Class3 initialization only for OMAP343x family of processors.
--- arch/arm/mach-omap2/smartreflex-class3.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/smartreflex-class3.c +5 -0
@@ -11,6 +11,7 @@* published by the Free Software Foundation. */ +#include <plat/cpu.h> #include "smartreflex.h" static int sr_class3_enable(struct voltagedomain *voltdm,
@@ -58,6 +59,10 @@ static struct omap_sr_class_data class3_data = {/* Smartreflex Class3 init API to be called from board file */ static int __init sr_class3_init (void ) { +/* Enable this class only for OMAP343x */ +if (!cpu_is_omap343x ()) +return -EINVAL ; +pr_info ("SmartReflex Class3 initialized\n" );return sr_register_class (&class3_data); }
Signature · 1 line
1.7.5.4
PATCH 17/21 OMAP3430: SR: class3: restrict CPU to run on
Hello.
Quoted 6 lines · Jean Pihet
From: Nishanth Menon<[email protected]>
Use SmartReflex AVS Class3 initialization only for OMAP343x family of processors.
Change-Id: I660326bf265541ba4e0feb52853ff6cb9b293aed
All patchjes from Nishanth Menon seem to contain this line. Please remove
it...
Quoted 2 lines
Signed-off-by Nishanth Menon<[email protected]>Signed-off-by Jean Pihet<[email protected]>
WBR, Sergei
PATCH 17/21 OMAP3430: SR: class3: restrict CPU to run on
Sergei,
Quoted 12 lines · Sergei Shtylyov
Hello.
Quoted 5 lines · Jean Pihet
From: Nishanth Menon<[email protected]>
Use SmartReflex AVS Class3 initialization only for OMAP343x family of processors.
Quoted 5 lines
Quoted 1 line
Change-Id: I660326bf265541ba4e0feb52853ff6cb9b293aed
? All patchjes from Nishanth Menon seem to contain this line. Please remove it...
OK done in the next revision, sorry about that.
That 'Change-Id' line seems to have very much success on the mailing list ;p
Thanks for reviewing,
Jean
Quoted 8 lines
Quoted 4 lines
Signed-off-by Nishanth Menon<[email protected]>Signed-off-by Jean Pihet<[email protected]>WBR, Sergei
PATCH 18/21 arm: omap: smartreflex: add missing platform_set_drvdata()
In reply to Jean PihetFrom: Felipe Balbi <[email protected]>
that's very useful to fetch the correct struct sr_info from PM handlers.
--- arch/arm/mach-omap2/smartreflex.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/smartreflex.c +2 -0
@@ -1062,6 +1062,8 @@ static int __init omap_sr_probe(struct platform_device *pdev)return -ENOMEM ; } +platform_set_drvdata (pdev, sr_info); +if (!pdata) {dev_err (&pdev->dev,"%s: platform data missing\n" , __func__); ret = -EINVAL ;
Signature · 1 line
1.7.5.4
PATCH 19/21 arm: omap: smartreflex: move late_initcall() closer to its argument
In reply to Jean PihetFrom: Felipe Balbi <[email protected]>
no functional changes, trivial patch.
--- arch/arm/mach-omap2/smartreflex.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/smartreflex.c +1 -1
@@ -1291,12 +1291,12 @@ static int __init sr_init(void)return 0 ; } +late_initcall (sr_init); static void __exit sr_exit(void) {platform_driver_unregister (&smartreflex_driver); } -late_initcall (sr_init);module_exit (sr_exit);MODULE_DESCRIPTION ("OMAP Smartreflex Driver" );
Signature · 1 line
1.7.5.4
PATCH 20/21 arm: omap: smartreflex: clean ups all over
In reply to Jean PihetFrom: Felipe Balbi <[email protected]>
There are no functional changes here, only misc cleanups in general:
- re-organize variable declarations,
- converting if {} else if {} else {} into switch statements,
- correct comments typos,
- add/remove white lines to improve readability,
- etc.
--- arch/arm/mach-omap2/smartreflex.c | 103 +++++++++++++++++++++++++----------- 1 files changed, 71 insertions(+), 32 deletions(-)
arch/arm/mach-omap2/smartreflex.c +71 -32
@@ -36,10 +36,18 @@#define SR_DISABLE_TIMEOUT 200struct omap_sr { +struct list_head node; +struct platform_device *pdev; +struct omap_sr_nvalue_table *nvalue_table; +struct voltagedomain *voltdm; +struct dentry *dbg_dir; + +unsigned int irq; +int srid;int ip_type;int nvalue_count; -bool autocomp_active; +u32 clk_length;u32 err_weight;u32 err_minlimit;
@@ -49,16 +57,13 @@ struct omap_sr {u32 senp_avgweight;u32 senp_mod;u32 senn_mod; -unsigned int irq; +bool irq_enabled; +bool autocomp_active; +void __iomem *base; -struct platform_device *pdev; -struct list_head node; -struct omap_sr_nvalue_table *nvalue_table; -struct voltagedomain *voltdm;/* Managed by class driver as needed */ void *voltdm_cdata; -struct dentry *dbg_dir; };/* sr_list contains all the instances of smartreflex module */
@@ -190,11 +195,12 @@ static inline u8 irqstat_to_notifier_v2(u32 status)static irqreturn_t sr_interrupt (int irq,void *data) { -struct omap_sr *sr_info = (struct omap_sr *)data; +struct omap_sr *sr_info = data;u32 status =0 ;u32 value =0 ; -if (sr_info->ip_type ==SR_TYPE_V1 ) { +switch (sr_info->ip_type) { +case SR_TYPE_V1 :/* Status bits are one bit before enable bits in v1 */ value =notifier_to_irqen_v1 (sr_class->notify_flags) >>1 ;
@@ -206,7 +212,8 @@ static irqreturn_t sr_interrupt(int irq, void *data)sr_modify_reg (sr_info,ERRCONFIG_V1 , value, status); value =irqstat_to_notifier_v1 (status); - }else if (sr_info->ip_type ==SR_TYPE_V2 ) { +break ; +case SR_TYPE_V2 : value =notifier_to_irqen_v2 (sr_class->notify_flags);/* Read the status bits */ status =sr_read_reg (sr_info,IRQSTATUS );
@@ -215,6 +222,11 @@ static irqreturn_t sr_interrupt(int irq, void *data)/* Clear them by writing back */ sr_write_reg (sr_info,IRQSTATUS , status); value =irqstat_to_notifier_v2 (status); +break ; +default : +dev_err (&sr_info->pdev->dev,"UNKNOWN IP type %d\n" , + sr_info->ip_type); +return IRQ_NONE ; }/* Attempt some resemblance of recovery! */
@@ -255,6 +267,7 @@ static void sr_set_clk_length(struct omap_sr *sr) __func__);return ; } + sys_clk_speed =clk_get_rate (sys_ck);clk_put (sys_ck);
@@ -372,7 +385,7 @@ static int sr_late_init(struct omap_sr *sr_info) goto error; } ret =request_irq (sr_info->irq, sr_interrupt, -0 , name, (void *)sr_info); +0 , name, sr_info);if (ret) goto error;disable_irq (sr_info->irq);
@@ -393,6 +406,7 @@ error: "not function as desired\n", __func__);kfree (name);kfree (sr_info); +return ret; }
@@ -513,8 +527,9 @@ static u32 sr_retrieve_nvalue(struct omap_sr *sr, u32 efuse_offs)*/ int sr_configure_errgen (struct voltagedomain *voltdm) { -u32 sr_config, sr_errconfig, errconfig_offs, vpboundint_en; -u32 vpboundint_st, senp_en =0 , senn_en =0 ; +u32 sr_config, sr_errconfig, errconfig_offs; +u32 vpboundint_en, vpboundint_st; +u32 senp_en =0 , senn_en =0 ;u8 senp_shift, senn_shift;struct omap_sr *sr =_sr_lookup (voltdm);
@@ -533,20 +548,23 @@ int sr_configure_errgen(struct voltagedomain *voltdm) sr_config = (sr->clk_length <<SRCONFIG_SRCLKLENGTH_SHIFT ) |SRCONFIG_SENENABLE |SRCONFIG_ERRGEN_EN ; -if (sr->ip_type ==SR_TYPE_V1 ) { +switch (sr->ip_type) { +case SR_TYPE_V1 : sr_config |=SRCONFIG_DELAYCTRL ; senn_shift =SRCONFIG_SENNENABLE_V1_SHIFT ; senp_shift =SRCONFIG_SENPENABLE_V1_SHIFT ; errconfig_offs =ERRCONFIG_V1 ; vpboundint_en =ERRCONFIG_VPBOUNDINTEN_V1 ; vpboundint_st =ERRCONFIG_VPBOUNDINTST_V1 ; - }else if (sr->ip_type ==SR_TYPE_V2 ) { +break ; +case SR_TYPE_V2 : senn_shift =SRCONFIG_SENNENABLE_V2_SHIFT ; senp_shift =SRCONFIG_SENPENABLE_V2_SHIFT ; errconfig_offs =ERRCONFIG_V2 ; vpboundint_en =ERRCONFIG_VPBOUNDINTEN_V2 ; vpboundint_st =ERRCONFIG_VPBOUNDINTST_V2 ; - }else { +break ; +default :dev_err (&sr->pdev->dev,"%s: Trying to Configure smartreflex" "module without specifying the ip\n" , __func__);return -EINVAL ;
@@ -579,8 +597,8 @@ int sr_configure_errgen(struct voltagedomain *voltdm)*/ int sr_disable_errgen (struct voltagedomain *voltdm) { -u32 errconfig_offs, vpboundint_en; -u32 vpboundint_st; +u32 errconfig_offs; +u32 vpboundint_en, vpboundint_st;struct omap_sr *sr =_sr_lookup (voltdm);if (IS_ERR (sr)) {
@@ -589,15 +607,18 @@ int sr_disable_errgen(struct voltagedomain *voltdm)return -EINVAL ; } -if (sr->ip_type ==SR_TYPE_V1 ) { +switch (sr->ip_type) { +case SR_TYPE_V1 : errconfig_offs =ERRCONFIG_V1 ; vpboundint_en =ERRCONFIG_VPBOUNDINTEN_V1 ; vpboundint_st =ERRCONFIG_VPBOUNDINTST_V1 ; - }else if (sr->ip_type ==SR_TYPE_V2 ) { +break ; +case SR_TYPE_V2 : errconfig_offs =ERRCONFIG_V2 ; vpboundint_en =ERRCONFIG_VPBOUNDINTEN_V2 ; vpboundint_st =ERRCONFIG_VPBOUNDINTST_V2 ; - }else { +break ; +default :dev_err (&sr->pdev->dev,"%s: Trying to Configure smartreflex" "module without specifying the ip\n" , __func__);return -EINVAL ;
@@ -647,14 +668,17 @@ int sr_configure_minmax(struct voltagedomain *voltdm)SRCONFIG_SENENABLE | (sr->accum_data <<SRCONFIG_ACCUMDATA_SHIFT ); -if (sr->ip_type ==SR_TYPE_V1 ) { +switch (sr->ip_type) { +case SR_TYPE_V1 : sr_config |=SRCONFIG_DELAYCTRL ; senn_shift =SRCONFIG_SENNENABLE_V1_SHIFT ; senp_shift =SRCONFIG_SENPENABLE_V1_SHIFT ; - }else if (sr->ip_type ==SR_TYPE_V2 ) { +break ; +case SR_TYPE_V2 : senn_shift =SRCONFIG_SENNENABLE_V2_SHIFT ; senp_shift =SRCONFIG_SENPENABLE_V2_SHIFT ; - }else { +break ; +default :dev_err (&sr->pdev->dev,"%s: Trying to Configure smartreflex" "module without specifying the ip\n" , __func__);return -EINVAL ;
@@ -670,20 +694,27 @@ int sr_configure_minmax(struct voltagedomain *voltdm)* Enabling the interrupts if MINMAXAVG module is used. * TODO: check if all the interrupts are mandatory */ -if (sr->ip_type ==SR_TYPE_V1 ) { +switch (sr->ip_type) { +case SR_TYPE_V1 :sr_modify_reg (sr,ERRCONFIG_V1 , (ERRCONFIG_MCUACCUMINTEN |ERRCONFIG_MCUVALIDINTEN |ERRCONFIG_MCUBOUNDINTEN ), (ERRCONFIG_MCUACCUMINTEN |ERRCONFIG_MCUACCUMINTST |ERRCONFIG_MCUVALIDINTEN |ERRCONFIG_MCUVALIDINTST |ERRCONFIG_MCUBOUNDINTEN |ERRCONFIG_MCUBOUNDINTST )); - }else if (sr->ip_type ==SR_TYPE_V2 ) { +break ; +case SR_TYPE_V2 :sr_write_reg (sr,IRQSTATUS ,IRQSTATUS_MCUACCUMINT |IRQSTATUS_MCVALIDINT |IRQSTATUS_MCBOUNDSINT |IRQSTATUS_MCUDISABLEACKINT );sr_write_reg (sr,IRQENABLE_SET ,IRQENABLE_MCUACCUMINT |IRQENABLE_MCUVALIDINT |IRQENABLE_MCUBOUNDSINT |IRQENABLE_MCUDISABLEACKINT ); +break ; +default : +dev_err (&sr->pdev->dev,"%s: Trying to Configure smartreflex" +"module without specifying the ip\n" , __func__); +return -EINVAL ; }return 0 ;
@@ -702,9 +733,9 @@ int sr_configure_minmax(struct voltagedomain *voltdm)*/ int sr_enable (struct voltagedomain *voltdm,unsigned long volt) { -u32 nvalue_reciprocal;struct omap_volt_data *volt_data;struct omap_sr *sr =_sr_lookup (voltdm); +u32 nvalue_reciprocal;int ret;if (IS_ERR (sr)) {
@@ -776,10 +807,17 @@ void sr_disable(struct voltagedomain *voltdm)* disable the clocks. */ if (sr_read_reg (sr,SRCONFIG ) &SRCONFIG_SRENABLE ) { -if (sr->ip_type ==SR_TYPE_V1 ) +switch (sr->ip_type) { +case SR_TYPE_V1 :sr_v1_disable (sr); -else if (sr->ip_type ==SR_TYPE_V2 ) +break ; +case SR_TYPE_V2 :sr_v2_disable (sr); +break ; +default : +dev_err (&sr->pdev->dev,"UNKNOWN IP type %d\n" , + sr->ip_type); + } }pm_runtime_put_sync_suspend (&sr->pdev->dev);
@@ -1002,7 +1040,7 @@ void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data) sr_pmic_data = pmic_data; } -/* PM Debug Fs enteries to enable disable smartreflex. */ +/* PM Debug Fs enteries to enable and disable smartreflex. */ static int omap_sr_autocomp_show (void *data,u64 *val) {struct omap_sr *sr_info = (struct omap_sr *) data;
@@ -1044,11 +1082,11 @@ static int omap_sr_autocomp_store(void *data, u64 val) }DEFINE_SIMPLE_ATTRIBUTE (pm_sr_fops, omap_sr_autocomp_show, - omap_sr_autocomp_store,"%llu\n" ); + omap_sr_autocomp_store,"%llu\n" );static int __init omap_sr_probe (struct platform_device *pdev) { -struct omap_sr *sr_info =kzalloc (sizeof (struct omap_sr ),GFP_KERNEL ); +struct omap_sr *sr_info;struct omap_sr_data *pdata = pdev->dev.platform_data;struct resource *mem, *irq;struct dentry *nvalue_dir;
@@ -1056,6 +1094,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)int i, ret =0 ;char *name; + sr_info =kzalloc (sizeof (struct omap_sr ),GFP_KERNEL );if (!sr_info) {dev_err (&pdev->dev,"%s: unable to allocate sr_info\n" , __func__);
Signature · 1 line
1.7.5.4
PATCH 21/21 arm: omap: smartreflex: micro-optimization for sanity check
In reply to Jean PihetFrom: Felipe Balbi <[email protected]>
val && (val != 1) == val > 1
--- arch/arm/mach-omap2/smartreflex.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/smartreflex.c +1 -1
@@ -1065,7 +1065,7 @@ static int omap_sr_autocomp_store(void *data, u64 val) }/* Sanity check */ -if (val && (val !=1 )) { +if (val >1 ) {pr_warning ("%s: Invalid argument %lld\n" , __func__, val);return -EINVAL ; }
Signature · 1 line
1.7.5.4