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arm, arm-kirkwood: disable l2c before linux boot

PATCH New Michael Walle 4 participants 4 messages Feb 1, 2012 – Feb 8, 2012 Arm (32-bit)

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#0 lore raw

PATCH v4 1/1 arm, arm-kirkwood: disable l2c before linux boot

The decompressor expects the L2 cache to be disabled. This fixes booting some kernels, which have CONFIG_ARM_PATCH_PHYS_VIRT enabled.

Cc Albert ARIBAUD <[email protected]>
Cc Prafulla Wadaskar <[email protected]>
Cc Wolfgang Denk <[email protected]>

---
v4:
update copyright year of arch/arm/cpu/arm926ejs/kirkwood/cache.c add acked by prafulla

v3:
remove unused enable function

v2:
replace magic number with macro

 arch/arm/cpu/arm926ejs/cache.c           |    9 ++++++++
 arch/arm/cpu/arm926ejs/cpu.c             |    2 +
 arch/arm/cpu/arm926ejs/kirkwood/Makefile |    1 +
 arch/arm/cpu/arm926ejs/kirkwood/cache.c  |   34 ++++++++++++++++++++++++++++++
 4 files changed, 46 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/kirkwood/cache.c
arch/arm/cpu/arm926ejs/cache.c +9 -0
index ee90ab7..504f604 100644
@@ -68,3 +68,12 @@ void  flush_cache(unsigned long start, unsigned long size)
 {
 }
 #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
+
+/*
+ * Stub implementations for l2 cache operations
+ */
+void __l2_cache_disable(void)
+{
+}
+void l2_cache_disable(void)
+        __attribute__((weak, alias("__l2_cache_disable")));
arch/arm/cpu/arm926ejs/cpu.c +2 -0
index 5c902df..626384c 100644
@@ -50,6 +50,8 @@ int cleanup_before_linux (void)
 	/* turn off I/D-cache */
 	icache_disable();
 	dcache_disable();
+	l2_cache_disable();
+
 	/* flush I/D-cache */
 	cache_flush();
 
arch/arm/cpu/arm926ejs/kirkwood/Makefile +1 -0
index 0754297..777006c 100644
@@ -30,6 +30,7 @@ COBJS-y	= cpu.o
 COBJS-y	+= dram.o
 COBJS-y	+= mpp.o
 COBJS-y	+= timer.o
+COBJS-y	+= cache.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS-y))
arch/arm/cpu/arm926ejs/kirkwood/cache.c new file +34 -0
new file mode 100644
index 0000000..645d962
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2012 Michael Walle
+ * Michael Walle <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+#include <common.h>
+#include <asm/arch/cpu.h>
+
+#define FEROCEON_EXTRA_FEATURE_L2C_EN (1<<22)
+
+void l2_cache_disable()
+{
+	u32 ctrl;
+
+	ctrl = readfr_extra_feature_reg();
+	ctrl &= ~FEROCEON_EXTRA_FEATURE_L2C_EN;
+	writefr_extra_feature_reg(ctrl);
+}
Signature · 1 line
1.7.2.5
#1 lore raw

PATCH v4 1/1 arm, arm-kirkwood: disable l2c before linux boot

Quoted 2 lines · Michael Walle

The decompressor expects the L2 cache to be disabled. This fixes booting some kernels, which have CONFIG_ARM_PATCH_PHYS_VIRT enabled.

I applied this locally and was able to boot a 3.2 Linux kernel on my dreamplug where before I was having random hangs which went away when I hacked the kernel to disable CONFIG_ARM_PATCH_PHYS_VIRT (ick). So:

Thanks Michael!

Ian.

Quoted 106 lines
Cc Albert ARIBAUD <[email protected]>
Cc Prafulla Wadaskar <[email protected]>
Cc Wolfgang Denk <[email protected]>

---
v4:
update copyright year of arch/arm/cpu/arm926ejs/kirkwood/cache.c add acked by prafulla

v3:
remove unused enable function

v2:
replace magic number with macro

 arch/arm/cpu/arm926ejs/cache.c           |    9 ++++++++
 arch/arm/cpu/arm926ejs/cpu.c             |    2 +
 arch/arm/cpu/arm926ejs/kirkwood/Makefile |    1 +
 arch/arm/cpu/arm926ejs/kirkwood/cache.c  |   34 ++++++++++++++++++++++++++++++
 4 files changed, 46 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/kirkwood/cache.c
arch/arm/cpu/arm926ejs/cache.c +9 -0
index ee90ab7..504f604 100644
@@ -68,3 +68,12 @@ void  flush_cache(unsigned long start, unsigned long size)
 {
 }
 #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
+
+/*
+ * Stub implementations for l2 cache operations
+ */
+void __l2_cache_disable(void)
+{
+}
+void l2_cache_disable(void)
+        __attribute__((weak, alias("__l2_cache_disable")));
arch/arm/cpu/arm926ejs/cpu.c +2 -0
index 5c902df..626384c 100644
@@ -50,6 +50,8 @@ int cleanup_before_linux (void)
 	/* turn off I/D-cache */
 	icache_disable();
 	dcache_disable();
+	l2_cache_disable();
+
 	/* flush I/D-cache */
 	cache_flush();
 
arch/arm/cpu/arm926ejs/kirkwood/Makefile +1 -0
index 0754297..777006c 100644
@@ -30,6 +30,7 @@ COBJS-y	= cpu.o
 COBJS-y	+= dram.o
 COBJS-y	+= mpp.o
 COBJS-y	+= timer.o
+COBJS-y	+= cache.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS-y))
arch/arm/cpu/arm926ejs/kirkwood/cache.c new file +34 -0
new file mode 100644
index 0000000..645d962
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2012 Michael Walle
+ * Michael Walle <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+#include <common.h>
+#include <asm/arch/cpu.h>
+
+#define FEROCEON_EXTRA_FEATURE_L2C_EN (1<<22)
+
+void l2_cache_disable()
+{
+	u32 ctrl;
+
+	ctrl = readfr_extra_feature_reg();
+	ctrl &= ~FEROCEON_EXTRA_FEATURE_L2C_EN;
+	writefr_extra_feature_reg(ctrl);
+}
Signature · 6 lines
Ian Campbell


Marriage is a lot like the army, everyone complains, but you'd be
surprised at the large number that re-enlist.
		-- James Garner
#2 lore raw

PATCH v4 1/1 arm, arm-kirkwood: disable l2c before linux boot

In reply to Michael Walle

Le 01/02/2012 19:24, Michael Walle a ?crit :

Quoted 98 lines

The decompressor expects the L2 cache to be disabled. This fixes booting some kernels, which have CONFIG_ARM_PATCH_PHYS_VIRT enabled.

---
v4:
update copyright year of arch/arm/cpu/arm926ejs/kirkwood/cache.c add acked by prafulla

v3:
remove unused enable function

v2:
replace magic number with macro

  arch/arm/cpu/arm926ejs/cache.c           |    9 ++++++++
  arch/arm/cpu/arm926ejs/cpu.c             |    2 +
  arch/arm/cpu/arm926ejs/kirkwood/Makefile |    1 +
  arch/arm/cpu/arm926ejs/kirkwood/cache.c  |   34 ++++++++++++++++++++++++++++++
  4 files changed, 46 insertions(+), 0 deletions(-)

create mode 100644 arch/arm/cpu/arm926ejs/kirkwood/cache.c

arch/arm/cpu/arm926ejs/cache.c +9 -0
index ee90ab7..504f604 100644
@@ -68,3 +68,12 @@ void  flush_cache(unsigned long start, unsigned long size)
  {
  }
  #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
+
+/*
+ * Stub implementations for l2 cache operations
+ */
+void __l2_cache_disable(void)
+{
+}
+void l2_cache_disable(void)
+        __attribute__((weak, alias("__l2_cache_disable")));
arch/arm/cpu/arm926ejs/cpu.c +2 -0
index 5c902df..626384c 100644
@@ -50,6 +50,8 @@ int cleanup_before_linux (void)
  	/* turn off I/D-cache */
  	icache_disable();
  	dcache_disable();
+	l2_cache_disable();
+
  	/* flush I/D-cache */
  	cache_flush();
 
arch/arm/cpu/arm926ejs/kirkwood/Makefile +1 -0
index 0754297..777006c 100644
@@ -30,6 +30,7 @@ COBJS-y	= cpu.o
  COBJS-y	+= dram.o
  COBJS-y	+= mpp.o
  COBJS-y	+= timer.o
+COBJS-y	+= cache.o
 
  SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
  OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS-y))
arch/arm/cpu/arm926ejs/kirkwood/cache.c new file +24 -0
new file mode 100644
index 0000000..645d962
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2012 Michael Walle
+ * Michael Walle<[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+#include<common.h>
+#include<asm/arch/cpu.h>
+

arch/arm/cpu/arm926ejs/kirkwood/cache.c line 34

Quoted 10 lines
arch/arm/cpu/arm926ejs/kirkwood/cache.c new file +10 -0
+#define FEROCEON_EXTRA_FEATURE_L2C_EN (1<<22)
+
+void l2_cache_disable()
+{
+	u32 ctrl;
+
+	ctrl = readfr_extra_feature_reg();
+	ctrl&= ~FEROCEON_EXTRA_FEATURE_L2C_EN;
+	writefr_extra_feature_reg(ctrl);
+}

Prafulla, do you take this patch in, or do I?

Amicalement,

Signature · 1 line
Albert.
#3 lore raw

PATCH v4 1/1 arm, arm-kirkwood: disable l2c before linux boot

In reply to Michael Walle
Quoted 115 lines

-----Original Message-----
From: Michael Walle [mailto:michael at walle.cc]
Sent: 01 February 2012 23:54
To: u-boot at lists.denx.de
Cc: Michael Walle; Albert ARIBAUD; Prafulla Wadaskar; Wolfgang Denk
Subject: [PATCH v4] arm, arm-kirkwood: disable l2c before linux boot

The decompressor expects the L2 cache to be disabled. This fixes booting
some kernels, which have CONFIG_ARM_PATCH_PHYS_VIRT enabled.

Cc Albert ARIBAUD <[email protected]>
Cc Prafulla Wadaskar <[email protected]>
Cc Wolfgang Denk <[email protected]>

---
v4:
update copyright year of arch/arm/cpu/arm926ejs/kirkwood/cache.c add acked by prafulla

v3:
remove unused enable function

v2:
replace magic number with macro

 arch/arm/cpu/arm926ejs/cache.c           |    9 ++++++++
 arch/arm/cpu/arm926ejs/cpu.c             |    2 +
 arch/arm/cpu/arm926ejs/kirkwood/Makefile |    1 +
 arch/arm/cpu/arm926ejs/kirkwood/cache.c  |   34
++++++++++++++++++++++++++++++
 4 files changed, 46 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/kirkwood/cache.c
arch/arm/cpu/arm926ejs/cache.c +9 -0
index ee90ab7..504f604 100644
@@ -68,3 +68,12 @@ void  flush_cache(unsigned long start, unsigned
 long size)
 {
 }
 #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
+
+/*
+ * Stub implementations for l2 cache operations
+ */
+void __l2_cache_disable(void)
+{
+}
+void l2_cache_disable(void)
+        __attribute__((weak, alias("__l2_cache_disable")));
arch/arm/cpu/arm926ejs/cpu.c +2 -0
index 5c902df..626384c 100644
@@ -50,6 +50,8 @@ int cleanup_before_linux (void)
 	/* turn off I/D-cache */
 	icache_disable();
 	dcache_disable();
+	l2_cache_disable();
+
 	/* flush I/D-cache */
 	cache_flush();
 
arch/arm/cpu/arm926ejs/kirkwood/Makefile +1 -0
index 0754297..777006c 100644
@@ -30,6 +30,7 @@ COBJS-y	= cpu.o
 COBJS-y	+= dram.o
 COBJS-y	+= mpp.o
 COBJS-y	+= timer.o
+COBJS-y	+= cache.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS-y))
arch/arm/cpu/arm926ejs/kirkwood/cache.c new file +25 -0
new file mode 100644
index 0000000..645d962
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2012 Michael Walle
+ * Michael Walle <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+#include <common.h>
+#include <asm/arch/cpu.h>
+
+#define FEROCEON_EXTRA_FEATURE_L2C_EN (1<<22)

arch/arm/cpu/arm926ejs/kirkwood/cache.c

Quoted 10 lines
arch/arm/cpu/arm926ejs/kirkwood/cache.c new file +9 -1
+
+void l2_cache_disable()
+{
+	u32 ctrl;
+
+	ctrl = readfr_extra_feature_reg();
+	ctrl &= ~FEROCEON_EXTRA_FEATURE_L2C_EN;
+	writefr_extra_feature_reg(ctrl);
+}
--

Applied to u-boot-marvell.git master branch

Regards..
Prafulla . . .