Skip to contentSkip to conversation

PPC: Add PIR register to POWER7 CPU

PATCH In review Nathan Whitehorn 3 participants 3 messages Mar 3, 2012 – Mar 7, 2012

lore
Share & tools
lore
#0 lore raw

PATCH 1/1 PPC: Add PIR register to POWER7 CPU

The POWER7 emulation is missing the Processor Identification Register, mandatory in recent POWER CPUs, that is required for SMP on at least some operating systems (e.g. FreeBSD) to function properly. This patch copies the existing PIR code from the other CPUs that implement it.

---
 target-ppc/translate_init.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)
target-ppc/translate_init.c +5 -0
index 8a7233f..01f4030 100644
@@ -6537,6 +6537,11 @@ static void init_proc_POWER7 (CPUPPCState *env)
     /* Time base */
     gen_tbl(env);
 #if !defined(CONFIG_USER_ONLY)
+    /* Processor identification */
+    spr_register(env, SPR_PIR, "PIR",
+                 SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_pir,
+                 0x00000000);
     /* PURR & SPURR: Hack - treat these as aliases for the TB for now */
     spr_register(env, SPR_PURR,   "PURR",

&spr_read_purr, SPR_NOACCESS,
--
1.7.9

#1 lore raw

Am 03.03.2012 17:36, schrieb Nathan Whitehorn:

Quoted 6 lines

The POWER7 emulation is missing the Processor Identification Register, mandatory in recent POWER CPUs, that is required for SMP on at least some operating systems (e.g. FreeBSD) to function properly. This patch copies the existing PIR code from the other CPUs that implement it.

Please always cc the respective maintainers (and lists) according to MAINTAINERS. CC'ing Alex and qemu-ppc.

Quoted 9 lines
---
 target-ppc/translate_init.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)
target-ppc/translate_init.c +0 -0
index 8a7233f..01f4030 100644

target-ppc/translate_init.c static void init_proc_POWER7 (CPUPPCState *env) · line 6543

Quoted 7 lines
target-ppc/translate_init.c +4 -0
@@ -6537,6 +6537,11 @@ static void init_proc_POWER7 (CPUPPCState *env)
     /* Time base */
     gen_tbl(env);
 #if !defined(CONFIG_USER_ONLY)
+    /* Processor identification */
+    spr_register(env, SPR_PIR, "PIR",
+                 SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_pir,

Indentation looks weird here. Stray tab maybe?

Andreas

Quoted 6 lines
target-ppc/translate_init.c +1 -0
+                 0x00000000);
     /* PURR & SPURR: Hack - treat these as aliases for the TB for now */
     spr_register(env, SPR_PURR,   "PURR",
 &spr_read_purr, SPR_NOACCESS,
Signature · 1 line
1.7.9
Signature · 2 lines
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
#2 lore raw
Quoted 14 lines · Andreas Färber

Am 03.03.2012 17:36, schrieb Nathan Whitehorn:

Quoted 6 lines

The POWER7 emulation is missing the Processor Identification Register, mandatory in recent POWER CPUs, that is required for SMP on at least some operating systems (e.g. FreeBSD) to function properly. This patch copies the existing PIR code from the other CPUs that implement it.

Please always cc the respective maintainers (and lists) according to MAINTAINERS. CC'ing Alex and qemu-ppc.

Quoted 4 lines
---
  target-ppc/translate_init.c |    5 +++++
  1 files changed, 5 insertions(+), 0 deletions(-)
Quoted 13 lines

target-ppc/translate_init.c static void init_proc_POWER7 (CPUPPCState *env) · line 6543

Quoted 12 lines
target-ppc/translate_init.c +4 -0
index 8a7233f..01f4030 100644
@@ -6537,6 +6537,11 @@ static void init_proc_POWER7 (CPUPPCState *env)
      /* Time base */
      gen_tbl(env);
  #if !defined(CONFIG_USER_ONLY)
+    /* Processor identification */
+    spr_register(env, SPR_PIR, "PIR",
+                 SPR_NOACCESS, SPR_NOACCESS,
+&spr_read_generic,&spr_write_pir,

Indentation looks weird here. Stray tab maybe?

No tab, just a broken patch. I fixed the whitespace and applied it to ppc-next.

Alex