mx6: Read silicon revision from register
Subsystems (2)
Fabio Estevam
reviewerPATCH v5 1/1 mx6: Read silicon revision from register
Instead of hardcoding the mx6 silicon revision, read it in run-time.
Also, besides the silicon version print the mx6 variant type: quad,dual/solo or solo-lite.
Tested on a mx6qsabrelite, where it shows:
CPU: Freescale i.MX6Q rev1.0 at 792 MHz
---
Changes since v5:
- Distinguish the the CPU print depending on the SoC type (MX5 or MX6) Changes since v3:
- Provide a complete struct for anatop registers
Changes since v2:
- Read both chip variant and chip silicon version from anatop
- Create a struct for accessing the anatop registers Changes since v1:
- Fix typo on Subject
arch/arm/cpu/armv7/imx-common/cpu.c | 28 ++++++- arch/arm/cpu/armv7/mx6/soc.c | 8 ++- arch/arm/include/asm/arch-mx6/imx-regs.h | 142 ++++++++++++++++++++++++++++++ 3 files changed, 176 insertions(+), 2 deletions(-)
arch/arm/cpu/armv7/imx-common/cpu.c +27 -1
@@ -64,16 +64,42 @@ static char *get_reset_cause(void) }#if defined(CONFIG_DISPLAY_CPUINFO ) + +#ifdef CONFIG_MX6Q +static char *get_mx6_type (u32 mx6type) +{ +switch (mx6type) { +case 0x63 : +return "Q" ;/* Quad-core version of the mx6 */ +case 0x61 : +return "DS" ;/* Dual/Solo version of the mx6 */ +case 0x60 : +return "SL" ;/* Solo-Lite version of the mx6 */ +default : +return "unknown" ; + } +} +#endif +int print_cpuinfo (void ) {u32 cpurev; cpurev =get_cpu_rev (); -printf ("CPU: Freescale i.MX%x family rev%d.%d at %d MHz\n" , + +#ifdef CONFIG_MX6Q +printf ("CPU: Freescale i.MX6%s rev%d.%d at %d MHz\n" , +get_mx6_type ((cpurev &0xFF000 ) >>12 ), + (cpurev &0x000F0 ) >>4 , + (cpurev &0x0000F ) >>0 , +mxc_get_clock (MXC_ARM_CLK ) /1000000 ); +#else +printf ("CPU: Freescale i.MX%x rev%d.%d at %d MHz\n" , (cpurev &0xFF000 ) >>12 , (cpurev &0x000F0 ) >>4 , (cpurev &0x0000F ) >>0 ,mxc_get_clock (MXC_ARM_CLK ) /1000000 ); +#endif printf ("Reset cause: %s\n" ,get_reset_cause ());return 0 ; }
arch/arm/cpu/armv7/mx6/soc.c +7 -1
@@ -32,7 +32,13 @@u32 get_cpu_rev (void ) { -int system_rev =0x61000 |CHIP_REV_1_0 ; +struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR ; +int reg =readl (&anatop->digprog); + +/* Read mx6 variant: quad, dual or solo */ +int system_rev = (reg >>4 ) &0xFF000 ; +/* Read mx6 silicon revision */ + system_rev |= (reg &0xFF ) +0x10 ;return system_rev; }
arch/arm/include/asm/arch-mx6/imx-regs.h +142 -0
147 lines not on this page · raw message
Signature · 1 line
1.7.1
PATCH v5 1/1 mx6: Read silicon revision from register
Quoted 11 lines · Fabio Estevam
Instead of hardcoding the mx6 silicon revision, read it in run-time.
Also, besides the silicon version print the mx6 variant type: quad,dual/solo or solo-lite.
Tested on a mx6qsabrelite, where it shows:
CPU: Freescale i.MX6Q rev1.0 at 792 MHz
Signed-off-by Fabio Estevam <[email protected]>---
Hi Fabio,
Quoted 29 lines
#if
defined(CONFIG_DISPLAY_CPUINFO)arch/arm/cpu/armv7/imx-common/cpu.c +21
-1+ +#ifdef CONFIG_MX6Q +static char *get_mx6_type (u32 mx6type) +{ +switch (mx6type) { +case 0x63 : +return "Q" ;/* Quad-core version of the mx6 */ +case 0x61 : +return "DS" ;/* Dual/Solo version of the mx6 */ +case 0x60 : +return "SL" ;/* Solo-Lite version of the mx6 */ +default : +return "unknown" ; + } +} +#endif +int print_cpuinfo (void ) {u32 cpurev; cpurev =get_cpu_rev (); - printf("CPU: Freescale i.MX%x family rev%d.%d at %d MHz\n", + +#ifdef CONFIG_MX6Q + printf("CPU: Freescale i.MX6%s rev%d.%d at %d MHz\n", + get_mx6_type((cpurev & 0xFF000) >> 12),
arch/arm/cpu/armv7/imx-common/cpu.c static char *get_reset_cause(void) · line 102
Quoted 10 lines
arch/arm/cpu/armv7/imx-common/cpu.c +6
-0+ (cpurev &0x000F0 ) >>4 , + (cpurev &0x0000F ) >>0 , + mxc_get_clock(MXC_ARM_CLK) / 1000000); +#else +printf ("CPU: Freescale i.MX%x rev%d.%d at %d MHz\n" , (cpurev &0xFF000 ) >>12 , (cpurev &0x000F0 ) >>4 , (cpurev &0x0000F ) >>0 ,mxc_get_clock (MXC_ARM_CLK ) /1000000 ); +#endif
What about if we modify slightly the code checking for MX6 in get_mx6_type (that could become get_mx_type) ? Something like:
static char *get_mx6_type(u32 mx6type) {
if ((mx6type & 0x60) != 0x60)
return NULL;
we could drop CONFIG_MX6Q at all and also the duplication of code in print_cpuinfo()
Best regards,
Stefano
Signature · 5 lines
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