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USB: ehci-mx6: Add proper IO accessors

PATCH New Fabio Estevam 4 participants 5 messages Mar 19, 2012 – Mar 22, 2012

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#0 lore raw

PATCH 1/1 USB: ehci-mx6: Add proper IO accessors

Add proper IO accessors for mx6 usb registers.

---
This patch depends on "[PATCH v5] mx6: Read silicon revision from register"

 drivers/usb/host/ehci-mx6.c |   13 ++++---------
 1 files changed, 4 insertions(+), 9 deletions(-)
drivers/usb/host/ehci-mx6.c +4 -9
index b7bf49d..5dec673 100644
@@ -46,13 +46,9 @@
 #define USBPHY_CTRL_ENUTMILEVEL3		0x00008000
 #define USBPHY_CTRL_ENUTMILEVEL2		0x00004000
 
-#define ANADIG_USB2_CHRG_DETECT			0x00000210
 #define ANADIG_USB2_CHRG_DETECT_EN_B		0x00100000
 #define ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B	0x00080000
 
-#define ANADIG_USB2_PLL_480_CTRL		0x00000020
-#define ANADIG_USB2_PLL_480_CTRL_SET		0x00000024
-#define ANADIG_USB2_PLL_480_CTRL_CLR		0x00000028
 #define ANADIG_USB2_PLL_480_CTRL_BYPASS		0x00010000
 #define ANADIG_USB2_PLL_480_CTRL_ENABLE		0x00002000
 #define ANADIG_USB2_PLL_480_CTRL_POWER		0x00001000
@@ -77,8 +73,7 @@ static void usbh1_internal_phy_clock_gate(int on)
 
 static void usbh1_power_config(void)
 {
-	void __iomem *anatop_base = (void __iomem *)ANATOP_BASE_ADDR;
-
+	struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
 	/*
 	 * Some phy and power's special controls for host1
 	 * 1. The external charger detector needs to be disabled
@@ -89,15 +84,15 @@ static void usbh1_power_config(void)
 	 */
 	__raw_writel(ANADIG_USB2_CHRG_DETECT_EN_B |
 		     ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B,
-		     anatop_base + ANADIG_USB2_CHRG_DETECT);
+		     &anatop->usb2_chrg_detect);
 
 	__raw_writel(ANADIG_USB2_PLL_480_CTRL_BYPASS,
-		     anatop_base + ANADIG_USB2_PLL_480_CTRL_CLR);
+		     &anatop->usb2_pll_480_ctrl);
 
 	__raw_writel(ANADIG_USB2_PLL_480_CTRL_ENABLE |
 		     ANADIG_USB2_PLL_480_CTRL_POWER |
 		     ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS,
-		     anatop_base + ANADIG_USB2_PLL_480_CTRL_SET);
+		     &anatop->usb2_pll_480_ctrl_set);
 }
 
 static int usbh1_phy_enable(void)
Signature · 1 line
1.7.1
#1 lore raw

PATCH 1/1 USB: ehci-mx6: Add proper IO accessors

Quoted 46 lines · Fabio Estevam

Add proper IO accessors for mx6 usb registers.

---
This patch depends on "[PATCH v5] mx6: Read silicon revision from register"

 drivers/usb/host/ehci-mx6.c |   13 ++++---------
 1 files changed, 4 insertions(+), 9 deletions(-)
drivers/usb/host/ehci-mx6.c +2 -8
index b7bf49d..5dec673 100644
@@ -46,13 +46,9 @@
 #define USBPHY_CTRL_ENUTMILEVEL3		0x00008000
 #define USBPHY_CTRL_ENUTMILEVEL2		0x00004000
 
-#define ANADIG_USB2_CHRG_DETECT			0x00000210
 #define ANADIG_USB2_CHRG_DETECT_EN_B		0x00100000
 #define ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B	0x00080000
 
-#define ANADIG_USB2_PLL_480_CTRL		0x00000020
-#define ANADIG_USB2_PLL_480_CTRL_SET		0x00000024
-#define ANADIG_USB2_PLL_480_CTRL_CLR		0x00000028
 #define ANADIG_USB2_PLL_480_CTRL_BYPASS		0x00010000
 #define ANADIG_USB2_PLL_480_CTRL_ENABLE		0x00002000
 #define ANADIG_USB2_PLL_480_CTRL_POWER		0x00001000
@@ -77,8 +73,7 @@ static void usbh1_internal_phy_clock_gate(int on)
 
 static void usbh1_power_config(void)
 {
-	void __iomem *anatop_base = (void __iomem *)ANATOP_BASE_ADDR;
-
+	struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
 	/*
 	 * Some phy and power's special controls for host1
 	 * 1. The external charger detector needs to be disabled
@@ -89,15 +84,15 @@ static void usbh1_power_config(void)
 	 */
 	__raw_writel(ANADIG_USB2_CHRG_DETECT_EN_B |
 		     ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B,
-		     anatop_base + ANADIG_USB2_CHRG_DETECT);
+		     &anatop->usb2_chrg_detect);
 
 	__raw_writel(ANADIG_USB2_PLL_480_CTRL_BYPASS,
-		     anatop_base + ANADIG_USB2_PLL_480_CTRL_CLR);

drivers/usb/host/ehci-mx6.c static void usbh1_power_config(void) · line 98

Quoted 10 lines
drivers/usb/host/ehci-mx6.c +2 -1
+		     &anatop->usb2_pll_480_ctrl);
 
 	__raw_writel(ANADIG_USB2_PLL_480_CTRL_ENABLE |
 		     ANADIG_USB2_PLL_480_CTRL_POWER |
 		     ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS,
-		     anatop_base + ANADIG_USB2_PLL_480_CTRL_SET);
+		     &anatop->usb2_pll_480_ctrl_set);
 }
 
 static int usbh1_phy_enable(void)

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================
#2 lore raw

PATCH 1/1 USB: ehci-mx6: Add proper IO accessors

Dear Stefano Babic,

Quoted 68 lines · Fabio Estevam
Quoted 67 lines

Add proper IO accessors for mx6 usb registers.

---
This patch depends on "[PATCH v5] mx6: Read silicon revision from register"

 drivers/usb/host/ehci-mx6.c |   13 ++++---------
 1 files changed, 4 insertions(+), 9 deletions(-)
drivers/usb/host/ehci-mx6.c +0 -4
index b7bf49d..5dec673 100644
@@ -46,13 +46,9 @@
 
 #define USBPHY_CTRL_ENUTMILEVEL3		0x00008000
 #define USBPHY_CTRL_ENUTMILEVEL2		0x00004000
 
-#define ANADIG_USB2_CHRG_DETECT			0x00000210
 
 #define ANADIG_USB2_CHRG_DETECT_EN_B		0x00100000
 #define ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B	0x00080000
 
-#define ANADIG_USB2_PLL_480_CTRL		0x00000020
-#define ANADIG_USB2_PLL_480_CTRL_SET		0x00000024
-#define ANADIG_USB2_PLL_480_CTRL_CLR		0x00000028
 

#define ANADIG_USB2_PLL_480_CTRL_BYPASS 0x00010000
#define ANADIG_USB2_PLL_480_CTRL_ENABLE 0x00002000
#define ANADIG_USB2_PLL_480_CTRL_POWER 0x00001000

drivers/usb/host/ehci-mx6.c +1 -2
@@ -77,8 +73,7 @@ static void usbh1_internal_phy_clock_gate(int on)
 
 static void usbh1_power_config(void)
 {
 
-	void __iomem *anatop_base = (void __iomem *)ANATOP_BASE_ADDR;
-
+	struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
 
 	/*
drivers/usb/host/ehci-mx6.c +2 -2
 	 * Some phy and power's special controls for host1
 	 * 1. The external charger detector needs to be disabled
@@ -89,15 +84,15 @@ static void usbh1_power_config(void)
 
 	 */
 
 	__raw_writel(ANADIG_USB2_CHRG_DETECT_EN_B |
 
 		     ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B,
 
-		     anatop_base + ANADIG_USB2_CHRG_DETECT);
+		     &anatop->usb2_chrg_detect);
 
 	__raw_writel(ANADIG_USB2_PLL_480_CTRL_BYPASS,
 
-		     anatop_base + ANADIG_USB2_PLL_480_CTRL_CLR);
+		     &anatop->usb2_pll_480_ctrl);
 
 	__raw_writel(ANADIG_USB2_PLL_480_CTRL_ENABLE |
 
drivers/usb/host/ehci-mx6.c +0 -0
 		     ANADIG_USB2_PLL_480_CTRL_POWER |
 		     ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS,
Quoted 9 lines

drivers/usb/host/ehci-mx6.c static void usbh1_power_config(void) · line 98

Quoted 6 lines
drivers/usb/host/ehci-mx6.c +1 -1
-		     anatop_base + ANADIG_USB2_PLL_480_CTRL_SET);
+		     &anatop->usb2_pll_480_ctrl_set);
 
 }
 
 static int usbh1_phy_enable(void)

Agreed

Best regards,
Marek Vasut

#3 lore raw

PATCH 1/1 USB: ehci-mx6: Add proper IO accessors

In reply to Fabio Estevam
Quoted 1 line

-----Original Message-----

From: [email protected] [mailto:u-boot-bounces at lists.denx.de]

Quoted 62 lines

On Behalf Of Fabio Estevam
Sent: Tuesday, March 20, 2012 6:36 AM
To: u-boot at lists.denx.de
Cc: marex at denx.de; Estevam Fabio-R49496; wg at denx.de
Subject: [U-Boot] [PATCH] USB: ehci-mx6: Add proper IO accessors

Add proper IO accessors for mx6 usb registers.

---
This patch depends on "[PATCH v5] mx6: Read silicon revision from register"

drivers/usb/host/ehci-mx6.c | 13 ++++---------

1 files changed, 4 insertions(+), 9 deletions(-)
drivers/usb/host/ehci-mx6.c index renamed from drivers/usb/host/ehci-mx6.c +0 -0

b7bf49d..5dec673 100644

drivers/usb/host/ehci-mx6.c +1 -6
@@ -46,13 +46,9 @@
 #define USBPHY_CTRL_ENUTMILEVEL3		0x00008000
 #define USBPHY_CTRL_ENUTMILEVEL2		0x00004000
 
-#define ANADIG_USB2_CHRG_DETECT			0x00000210
 #define ANADIG_USB2_CHRG_DETECT_EN_B		0x00100000
 #define ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B	0x00080000
 
-#define ANADIG_USB2_PLL_480_CTRL		0x00000020
-#define ANADIG_USB2_PLL_480_CTRL_SET		0x00000024
-#define ANADIG_USB2_PLL_480_CTRL_CLR		0x00000028
 #define ANADIG_USB2_PLL_480_CTRL_BYPASS		0x00010000
 #define ANADIG_USB2_PLL_480_CTRL_ENABLE		0x00002000
 #define ANADIG_USB2_PLL_480_CTRL_POWER		0x00001000
@@ -77,8 +73,7 @@ static void usbh1_internal_phy_clock_gate(int on)
 
 static void usbh1_power_config(void)
 {
-	void __iomem *anatop_base = (void __iomem *)ANATOP_BASE_ADDR;
-
+	struct anatop_regs *anatop = (struct anatop_regs
 *)ANATOP_BASE_ADDR;
 	/*
 	 * Some phy and power's special controls for host1

* 1. The external charger detector needs to be disabled @@ -89,15
+84,15 @@ static void usbh1_power_config(void)

	 */
	__raw_writel(ANADIG_USB2_CHRG_DETECT_EN_B |
		     ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B,
drivers/usb/host/ehci-mx6.c +1 -1
-		     anatop_base + ANADIG_USB2_CHRG_DETECT);
+		     &anatop->usb2_chrg_detect);
	__raw_writel(ANADIG_USB2_PLL_480_CTRL_BYPASS,
drivers/usb/host/ehci-mx6.c +1 -1
-		     anatop_base + ANADIG_USB2_PLL_480_CTRL_CLR);
+		     &anatop->usb2_pll_480_ctrl);
	__raw_writel(ANADIG_USB2_PLL_480_CTRL_ENABLE |
		     ANADIG_USB2_PLL_480_CTRL_POWER |
		     ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS,
drivers/usb/host/ehci-mx6.c +1 -1
-		     anatop_base + ANADIG_USB2_PLL_480_CTRL_SET);
+		     &anatop->usb2_pll_480_ctrl_set);

}

Quoted 1 line

static int usbh1_phy_enable(void)

Quoted 7 lines

--
1.7.1

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#4 lore raw

PATCH 1/1 USB: ehci-mx6: Add proper IO accessors

In reply to Fabio Estevam
Quoted 9 lines · Fabio Estevam

Add proper IO accessors for mx6 usb registers.

---
This patch depends on "[PATCH v5] mx6: Read silicon revision from register"

 drivers/usb/host/ehci-mx6.c |   13 ++++---------
 1 files changed, 4 insertions(+), 9 deletions(-)

Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================