doc:Add documentation for e500 external debugger support

index 8964672..48e50ed 100644
@@ -3347,6 +3347,20 @@ Low Level (hardware related) configuration options:
 		be used if available. These functions may be faster under some
 		conditions but may increase the binary size.
 
+E500 (MPC85xx) External Debug Support
+-------------------------------------
+-CONFIG_E500
+		Enables BOOKE e500 family.It includes e500, e500v2 e500mc,
+		e5500 processor etc.
+
+- CONFIG_SYS_PPC_E500_DEBUG_TLB
+		Enables a temporary TLB entry to be used during boot to work
+		around limitations in e500v1 and e500v2 external debugger
+		support. This reduces the portions of the boot code where
+		breakpoints and single stepping do not work.  The value of this
+		symbol should be set to the TLB1 entry to be used for this
+		purpose.
+
 Freescale QE/FMAN Firmware Support:
 -----------------------------------
 

new file mode 100644
index 0000000..dbd74be
@@ -0,0 +1,23 @@
+External Debug Support
+----------------------
+
+Freescale's e500v1 and e500v2 cores (used in mpc85xx chips) have some
+restrictions on external debugging (JTAG).  In particular, for the debugger to
+be able to receive control after a single step or breakpoint:
+	- MSR[DE] must be set
+	- A valid opcode must be fetchable, through the MMU, from the debug
+	  exception vector (IVPR + IVOR15).
+
+To maximize the time during which this requirement is met, U-Boot sets MSR[DE]
+immediately on entry and keeps it set. It also uses a temporary TLB to keep a
+mapping to a valid opcode at the debug exception vector, even if we normally
+don't support exception vectors being used that early, and that's not the area
+where U-Boot currently executes from.
+
+Note that there may still be some small windows where debugging will not work,
+such as in between updating IVPR and IVOR15.
+
+Config Switches:
+----------------
+
+Please refer README section "MPC85xx External Debug Support"