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U-Boot Superseded Eric Nelson 2 participants 9 messages Mar 25, 2012 – Apr 25, 2012 1 message not in the archive

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A message that is not in the archive (sent off-list or not yet received): http://lists.denx.de/pipermail/u-boot/2012-March/120899.html

Eric Nelson

author

2012-03-25 23:00 UTC #1 lore raw

These two patches split the previous patch

	http://lists.denx.de/pipermail/u-boot/2012-March/120150.html

into two parts.

The first is board-independent and will be useful on all i.MX6 boards. The second is specific to the mx6qsabrelite board.

Eric Nelson

author

2012-03-25 23:00 UTC #2 lore raw

PATCH v3 1/2 i.MX6: add enable_sata_clock()

Signed-off-by Eric Nelson <[email protected]>

---
This patch requires Stefano's driver for MX5/MX6 to be useful.

	http://lists.denx.de/pipermail/u-boot/2012-February/118530.html

This is the first and board-independent part of what's needed to enable SATA on an i.MX6 board as discussed in this thread:

	http://lists.denx.de/pipermail/u-boot/2012-March/120919.html

 arch/arm/cpu/armv7/mx6/clock.c           |   31 ++++++++
 arch/arm/include/asm/arch-mx6/clock.h    |    1 +
 arch/arm/include/asm/arch-mx6/imx-regs.h |    9 +++
 arch/arm/include/asm/arch-mx6/iomux-v3.h |  111 ++++++++++++++++++++++++++++++
 4 files changed, 152 insertions(+), 0 deletions(-)

arch/arm/cpu/armv7/mx6/clock.c +31 -0

index ef98563..0ec4c15 100644
@@ -303,6 +303,37 @@ u32 imx_get_fecclk(void)
 	return decode_pll(PLL_ENET, CONFIG_SYS_MX6_HCLK);
 }
 
+int enable_sata_clock(void)
+{
+	u32 reg = 0;
+	s32 timeout = 100000;
+	struct imx_ccm_reg *const imx_ccm
+		= (struct imx_ccm_reg *) CCM_BASE_ADDR;
+
+	/* Enable sata clock */
+	reg = readl(&imx_ccm->CCGR5); /* CCGR5 */
+	reg |= MXC_CCM_CCGR5_CG2_MASK;
+	writel(reg, &imx_ccm->CCGR5);
+
+	/* Enable PLLs */
+	reg = readl(&imx_ccm->analog_pll_enet);
+	reg &= ~BM_ANADIG_PLL_SYS_POWERDOWN;
+	writel(reg, &imx_ccm->analog_pll_enet);
+	reg |= BM_ANADIG_PLL_SYS_ENABLE;
+	while (timeout--) {
+		if (readl(&imx_ccm->analog_pll_enet) & BM_ANADIG_PLL_SYS_LOCK)
+			break;
+	}
+	if (timeout <= 0)
+		return -1;
+	reg &= ~BM_ANADIG_PLL_SYS_BYPASS;
+	writel(reg, &imx_ccm->analog_pll_enet);
+	reg |= BM_ANADIG_PLL_ENET_ENABLE_SATA;
+	writel(reg, &imx_ccm->analog_pll_enet);
+
+	return 0 ;
+}
+
 unsigned int mxc_get_clock(enum mxc_clock clk)
 {
 	switch (clk) {

arch/arm/include/asm/arch-mx6/clock.h +1 -0

index 613809b..b91d8bf 100644
@@ -47,5 +47,6 @@ u32 imx_get_uartclk(void);
 u32 imx_get_fecclk(void);
 unsigned int mxc_get_clock(enum mxc_clock clk);
 void enable_usboh3_clk(unsigned char enable);
+int enable_sata_clock(void);
 
 #endif /* __ASM_ARCH_CLOCK_H */

arch/arm/include/asm/arch-mx6/imx-regs.h +9 -0

index 1033d05..f72e753 100644
@@ -438,5 +438,14 @@ struct anatop_regs {
 	u32	digprog;		/* 0x260 */
 };
 
+struct iomuxc_base_regs {
+	u32     gpr[14];        /* 0x000 */
+	u32     obsrv[5];       /* 0x038 */
+	u32     swmux_ctl[197]; /* 0x04c */
+	u32     swpad_ctl[250]; /* 0x360 */
+	u32     swgrp[26];      /* 0x748 */
+	u32     daisy[104];     /* 0x7b0..94c */
+};
+
 #endif /* __ASSEMBLER__*/
 #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */

arch/arm/include/asm/arch-mx6/iomux-v3.h +111 -0

115 lines not on this page · raw message

Signature · 1 line

1.7.9

Eric Nelson

author

2012-03-25 23:00 UTC #3 lore raw

PATCH v3 2/2 i.MX6: mx6q_sabrelite: add SATA bindings

In reply to Eric Nelson

V2 has been stripped of the board-independent changes and uses clrsetbits_le32() instead of twiddling bits by hand.

Signed-off-by Eric Nelson <[email protected]>

---
 board/freescale/mx6qsabrelite/mx6qsabrelite.c |   32 +++++++++++++++++++++++++
 include/configs/mx6qsabrelite.h               |   13 ++++++++++
 2 files changed, 45 insertions(+), 0 deletions(-)

board/freescale/mx6qsabrelite/mx6qsabrelite.c +32 -0

index 1d09a72..afb1245 100644
@@ -25,6 +25,8 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx6x_pins.h>
 #include <asm/arch/iomux-v3.h>
+#include <asm/arch/ccm_regs.h>
+#include <asm/arch/clock.h>
 #include <asm/errno.h>
 #include <asm/gpio.h>
 #include <mmc.h>

@@ -267,6 +269,32 @@ int board_eth_init(bd_t *bis)
 	return 0;
 }
 
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+	int rval = enable_sata_clock();
+	if (rval == 0) {
+		struct iomuxc_base_regs *const iomuxc_regs
+			= (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
+		clrsetbits_le32(&iomuxc_regs->gpr[13],
+				IOMUXC_GPR13_SATA_MASK,
+				IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+				|IOMUXC_GPR13_SATA_PHY_7_SATA2M
+				|IOMUXC_GPR13_SATA_SPEED_3G
+				|(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+				|IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+				|IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+				|IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+				|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+				|IOMUXC_GPR13_SATA_PHY_1_SLOW);
+		rval = 0;
+	}
+
+	return rval;
+}
+#endif
+
 int board_early_init_f(void)
 {
        setup_iomux_uart();

@@ -283,6 +311,10 @@ int board_init(void)
 	setup_spi();
 #endif
 
+#ifdef CONFIG_CMD_SATA
+	setup_sata();
+#endif
+
        return 0;
 }

include/configs/mx6qsabrelite.h +13 -0

index c851559..a3c97c6 100644
@@ -71,6 +71,19 @@
 #define CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
 
+#define CONFIG_CMD_SATA
+/*
+ * SATA Configs
+ */
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_DWC_AHSATA
+#define CONFIG_SYS_SATA_MAX_DEVICE	1
+#define CONFIG_DWC_AHSATA_PORT_ID	0
+#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
+#define CONFIG_LBA48
+#define CONFIG_LIBATA
+#endif
+
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_DHCP
 #define CONFIG_CMD_MII

Signature · 1 line

1.7.9

Stefano Babic

2012-03-26 08:35 UTC #4 lore raw

PATCH 2/2 i.MX6: mx6q_sabrelite: add SATA bindings

Quoted 5 lines · Eric Nelson

V2 has been stripped of the board-independent changes and uses clrsetbits_le32() instead of twiddling bits by hand.
Signed-off-by Eric Nelson <[email protected]>
---

Hi Eric,

Quoted 18 lines

 board/freescale/mx6qsabrelite/mx6qsabrelite.c |   32 +++++++++++++++++++++++++
 include/configs/mx6qsabrelite.h               |   13 ++++++++++
 2 files changed, 45 insertions(+), 0 deletions(-)

board/freescale/mx6qsabrelite/mx6qsabrelite.c +2 -0

index 1d09a72..afb1245 100644
@@ -25,6 +25,8 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx6x_pins.h>
 #include <asm/arch/iomux-v3.h>
+#include <asm/arch/ccm_regs.h>
+#include <asm/arch/clock.h>
 #include <asm/errno.h>
 #include <asm/gpio.h>
 #include <mmc.h>

board/freescale/mx6qsabrelite/mx6qsabrelite.c int board_eth_init(bd_t *bis) · line 276

Quoted 8 lines

board/freescale/mx6qsabrelite/mx6qsabrelite.c +5 -0

@@ -267,6 +269,32 @@ int board_eth_init(bd_t *bis)
 	return 0;
 }
 
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+	int rval = enable_sata_clock();

What about to return at this point if there is an error ?

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

Eric Nelson

author

2012-03-26 13:35 UTC #5 lore raw

PATCH v3 2/2 i.MX6: mx6q_sabrelite: add SATA bindings

Quoted 30 lines · Stefano Babic

Quoted 5 lines · Eric Nelson

V2 has been stripped of the board-independent changes and uses clrsetbits_le32() instead of twiddling bits by hand.
Signed-off-by Eric Nelson<[email protected]>
---

Hi Eric,

Quoted 21 lines

  board/freescale/mx6qsabrelite/mx6qsabrelite.c |   32 +++++++++++++++++++++++++
  include/configs/mx6qsabrelite.h               |   13 ++++++++++
  2 files changed, 45 insertions(+), 0 deletions(-)

board/freescale/mx6qsabrelite/mx6qsabrelite.c +2 -0

index 1d09a72..afb1245 100644
@@ -25,6 +25,8 @@
  #include<asm/arch/imx-regs.h>
  #include<asm/arch/mx6x_pins.h>
  #include<asm/arch/iomux-v3.h>
+#include<asm/arch/ccm_regs.h>
+#include<asm/arch/clock.h>
  #include<asm/errno.h>
  #include<asm/gpio.h>
  #include<mmc.h>

@@ -267,6 +269,32 @@ int board_eth_init(bd_t *bis)
  	return 0;
  }

Quoted 8 lines

board/freescale/mx6qsabrelite/mx6qsabrelite.c int board_eth_init(bd_t *bis) · line 276
Quoted 5 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +5 -0
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+	int rval = enable_sata_clock();
What about to return at this point if there is an error ?

I'm not sure I understand. Do you mean re-structure the code with two returns like this?

(quoted diff) +0 -0

b/board/freescale/mx6qsabrelite/mx6qsabrelite.c
index afb1245..0d625af 100644

board/freescale/mx6qsabrelite/mx6qsabrelite.c +16 ~~-16~~

@@ -273,23 +273,23 @@ int board_eth_init(bd_t *bis)
 
  int setup_sata(void)
  {
+       struct iomuxc_base_regs *const iomuxc_regs
+               = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
         int rval = enable_sata_clock();
-       if (rval == 0) {
-               struct iomuxc_base_regs *const iomuxc_regs
-                       = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
-               clrsetbits_le32(&iomuxc_regs->gpr[13],
-                               IOMUXC_GPR13_SATA_MASK,
-                               IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
-                               |IOMUXC_GPR13_SATA_PHY_7_SATA2M
-                               |IOMUXC_GPR13_SATA_SPEED_3G
-                               |(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
-                               |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
-                               |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
-                               |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
-                               |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
-                               |IOMUXC_GPR13_SATA_PHY_1_SLOW);
-               rval = 0;
-       }
+       if (rval)
+               return rval ;
+
+       clrsetbits_le32(&iomuxc_regs->gpr[13],
+                       IOMUXC_GPR13_SATA_MASK,
+                       IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+                       |IOMUXC_GPR13_SATA_PHY_7_SATA2M
+                       |IOMUXC_GPR13_SATA_SPEED_3G
+                       |(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+                       |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+                       |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+                       |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+                       |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+                       |IOMUXC_GPR13_SATA_PHY_1_SLOW);
 
         return rval;
  }

Stefano Babic

2012-03-26 13:42 UTC #6 lore raw

PATCH 2/2 i.MX6: mx6q_sabrelite: add SATA bindings

Quoted 42 lines · Eric Nelson

Quoted 32 lines · Stefano Babic
Quoted 5 lines · Eric Nelson
V2 has been stripped of the board-independent changes and uses clrsetbits_le32() instead of twiddling bits by hand.
Signed-off-by Eric Nelson<[email protected]>
---
Hi Eric,
Quoted 23 lines
  board/freescale/mx6qsabrelite/mx6qsabrelite.c |   32
+++++++++++++++++++++++++
  include/configs/mx6qsabrelite.h               |   13 ++++++++++
  2 files changed, 45 insertions(+), 0 deletions(-)
board/freescale/mx6qsabrelite/mx6qsabrelite.c +2 -0
index 1d09a72..afb1245 100644
@@ -25,6 +25,8 @@
  #include<asm/arch/imx-regs.h>
  #include<asm/arch/mx6x_pins.h>
  #include<asm/arch/iomux-v3.h>
+#include<asm/arch/ccm_regs.h>
+#include<asm/arch/clock.h>
  #include<asm/errno.h>
  #include<asm/gpio.h>
  #include<mmc.h>
@@ -267,6 +269,32 @@ int board_eth_init(bd_t *bis)
      return 0;
  }
 
Quoted 8 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c int board_eth_init(bd_t *bis) · line 276
Quoted 5 lines
board/freescale/mx6qsabrelite/mx6qsabrelite.c +5 -0
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+    int rval = enable_sata_clock();
What about to return at this point if there is an error ?

Quoted 2 lines

I'm not sure I understand. Do you mean re-structure the code with two returns like this?

No, much easier - I find the code is easy to understand if it looks like if the function returns immediately in case of error.

	if (do_something())
		return ERROR;

	< code when no error happens>

Your enable_sata_clock() return only -1 in case of error. You could easy write:

	if (enable_sata_clock())
		return -1 (or better a value in errno.h)
        struct iomuxc_base_regs *const iomuxc_regs
                   = (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
        clrsetbits_le32(&iomuxc_regs->gpr[13],
                       IOMUXC_GPR13_SATA_MASK,
                       IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
                       |IOMUXC_GPR13_SATA_PHY_7_SATA2M
                       |IOMUXC_GPR13_SATA_SPEED_3G
                       |(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
                       |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
                       |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
                       |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
                       |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
                       |IOMUXC_GPR13_SATA_PHY_1_SLOW);

	return 0;

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: [email protected]
=====================================================================

Eric Nelson

author

2012-03-26 16:59 UTC #7 lore raw

PATCH v3 2/2 i.MX6: mx6q_sabrelite: add SATA bindings

Quoted 26 lines · Stefano Babic

Quoted 14 lines · Eric Nelson
Quoted 5 lines · Stefano Babic
Quoted 4 lines · Eric Nelson
V2 has been stripped of the board-independent changes and
<snip>
Quoted 8 lines
Review
Quoted 5 lines
(quoted diff) +5 -0
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+    int rval = enable_sata_clock();
What about to return at this point if there is an error ?
Quoted 2 lines
I'm not sure I understand. Do you mean re-structure the code with two returns like this?
No, much easier - I find the code is easy to understand if it looks like if the function returns immediately in case of error.
	if (do_something())
		return ERROR;

	<  code when no error happens>

Quoted 6 lines

Your enable_sata_clock() return only -1 in case of error. You could easy write:
if (enable_sata_clock())
return -1 (or better a value in errno.h)

The choice of error code is better made inside enable_sata_clock(), although I'm not really sure what error code to choose.

The error occurs if the PLL fails to lock and would indicate that something's horribly wrong.

I'm guessing -EIO is probably the right choice.

If you agree, I'll send V2 of "i.MX6: add enable_sata_clock()" and V3 of "i.MX6: mx6q_sabrelite: add SATA bindings".

Please advise,

Eric

Eric Nelson

author

2012-04-25 23:12 UTC #8 lore raw

PATCH v3 2/2 i.MX6: mx6q_sabrelite: add SATA bindings

Quoted 36 lines · Eric Nelson

Quoted 24 lines · Stefano Babic
Quoted 14 lines · Eric Nelson
Quoted 5 lines · Stefano Babic
Quoted 4 lines · Eric Nelson
V2 has been stripped of the board-independent changes and
<snip>
Quoted 8 lines
Review
Quoted 5 lines
(quoted diff) +5 -0
+#ifdef CONFIG_CMD_SATA
+
+int setup_sata(void)
+{
+ int rval = enable_sata_clock();
What about to return at this point if there is an error ?
Quoted 2 lines
I'm not sure I understand. Do you mean re-structure the code with two returns like this?
No, much easier - I find the code is easy to understand if it looks like if the function returns immediately in case of error.
if (do_something())
return ERROR;
Quoted 8 lines
< code when no error happens>
Your enable_sata_clock() return only -1 in case of error. You could easy write:
if (enable_sata_clock())
return -1 (or better a value in errno.h)
The choice of error code is better made inside enable_sata_clock(), although I'm not really sure what error code to choose.

Quoted 8 lines

The error occurs if the PLL fails to lock and would indicate that something's horribly wrong.
I'm guessing -EIO is probably the right choice.
If you agree, I'll send V2 of "i.MX6: add enable_sata_clock()" and V3 of "i.MX6: mx6q_sabrelite: add SATA bindings".

Hi Stefano,

It looks like I was waiting for you and never did send V3 of this patch.

I'll forward one shortly.

Regards,

Eric

Eric Nelson

author

2012-03-25 23:10 UTC #9 lore raw

v3 cover i.MX6: mx6q_sabrelite: add SATA bindings

In reply to Eric Nelson

Quoted 7 lines · Eric Nelson

These two patches split the previous patch
	http://lists.denx.de/pipermail/u-boot/2012-March/120150.html
into two parts.
The first is board-independent and will be useful on all i.MX6 boards. The second is specific to the mx6qsabrelite board.

Sorry about the prior e-mail. It looks like I botched the header.

I'm still trying to figure out this 'git send-email' thing.

This should say that the following two patches are V3 of a patch originally titled "i.MX6: mx6q_sabrelite: add SATA bindings", though the title doesn't match because only the second is board-specific.

	http://lists.denx.de/pipermail/u-boot/2012-March#120150

Regards,

Eric