Correct corrupted NAND Flash access on KARO TX25 modules

PATCH Superseded Gachet Daniel 4 participants 7 messages Apr 2, 2012 – Apr 6, 2012 Arm i.MX and Layerscape

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Gachet Daniel

author

2012-04-02 20:55 UTC #0 lore raw

PATCH v2 1/1 Correct corrupted NAND Flash access on KARO TX25 modules

This patch v2 correct corrupted data while reading NAND flash modules on the KARO TX25 module.

The current version of the mxc_nand driver uses the symmetric mode to access the NAND flash, but the devices populated on the KARO TX25 only support an asymmetric mode (i.MX25: bit 8 within NAND_FLASH_CONFIG1 register cleared).

To solve the problem in a generic way, the proposition is to define a specific value for that bit, CONFIG_NAND_MXC_NFC_ONE_CYCLE. This value could be defined in the specific board configuration file (./include/configs/...). Short description:

CONFIG_NAND_MXC_NFC_ONE_CYCLE enables to specify how to access NAND flash on the i.MX25 CPU.
If CONFIG_NAND_MXC_NFC_ONE_CYCLE is defined, a one-clock cycle will be used to access the NAND flash (symmetric mode); otherwise a two-clock cycle will be used (asymmetric mode).

Signed-off-by Daniel Gachet <[email protected]>

Cc stefano babic <[email protected]>

mtd/nand/mxc_nand.c +2 -0

diff -upr drivers/mtd/nand/mxc_nand.c drivers/mtd/nand/mxc_nand.c
@@ -1290,7 +1290,9 @@ static void mxc_setup_config1(void)
 	uint16_t tmp;
 
 	tmp = readw(&host->regs->nfc_config1);
+#ifdef CONFIG_NAND_MXC_NFC_ONE_CYCLE
 	tmp |= NFC_ONE_CYCLE;
+#endif
 	tmp |= NFC_4_8N_ECC;
 	writew(tmp, &host->regs->nfc_config1);
 	if (host->pagesize_2k)

Marek Vasut

2012-04-02 21:08 UTC #1 lore raw

PATCH v2 1/1 Correct corrupted NAND Flash access on KARO TX25 modules

Dear Gachet Daniel,

Quoted 26 lines

This patch v2 correct corrupted data while reading NAND flash modules on the KARO TX25 module.
The current version of the mxc_nand driver uses the symmetric mode to access the NAND flash, but the devices populated on the KARO TX25 only support an asymmetric mode (i.MX25: bit 8 within NAND_FLASH_CONFIG1 register cleared).
To solve the problem in a generic way, the proposition is to define a specific value for that bit, CONFIG_NAND_MXC_NFC_ONE_CYCLE. This value could be defined in the specific board configuration file (./include/configs/...). Short description:
CONFIG_NAND_MXC_NFC_ONE_CYCLE enables to specify how to access NAND flash on the i.MX25 CPU. If CONFIG_NAND_MXC_NFC_ONE_CYCLE is defined, a one-clock cycle will be used to access the NAND flash (symmetric mode); otherwise a two-clock cycle will be used (asymmetric mode).
Signed-off-by Daniel Gachet <[email protected]>
Cc stefano babic <[email protected]>
diff -upr drivers/mtd/nand/mxc_nand.c drivers/mtd/nand/mxc_nand.c

mtd/nand/mxc_nand.c static void mxc_setup_config1(void) · line 1298

Quoted 9 lines

mtd/nand/mxc_nand.c +2 -0

@@ -1290,7 +1290,9 @@ static void mxc_setup_config1(void)
 	uint16_t tmp;
 
 	tmp = readw(&host->regs->nfc_config1);
+#ifdef CONFIG_NAND_MXC_NFC_ONE_CYCLE
 	tmp |= NFC_ONE_CYCLE;
+#endif
 	tmp |= NFC_4_8N_ECC;
 	writew(tmp, &host->regs->nfc_config1);
 	if (host->pagesize_2k)

Won't this break other MX25 boards? Stefano?

Best regards,
Marek Vasut

stefano babic

2012-04-02 21:56 UTC #2 lore raw

PATCH v2 1/1 Correct corrupted NAND Flash access on KARO TX25 modules

Am 02/04/2012 23:08, schrieb Marek Vasut:

Quoted 29 lines

Dear Gachet Daniel,
Quoted 27 lines
This patch v2 correct corrupted data while reading NAND flash modules on the KARO TX25 module.
The current version of the mxc_nand driver uses the symmetric mode to access the NAND flash, but the devices populated on the KARO TX25 only support an asymmetric mode (i.MX25: bit 8 within NAND_FLASH_CONFIG1 register cleared).
To solve the problem in a generic way, the proposition is to define a specific value for that bit, CONFIG_NAND_MXC_NFC_ONE_CYCLE. This value could be defined in the specific board configuration file (./include/configs/...). Short description:
CONFIG_NAND_MXC_NFC_ONE_CYCLE enables to specify how to access NAND flash on the i.MX25 CPU. If CONFIG_NAND_MXC_NFC_ONE_CYCLE is defined, a one-clock cycle will be used to access the NAND flash (symmetric mode); otherwise a two-clock cycle will be used (asymmetric mode).
Signed-off-by Daniel Gachet <[email protected]>
Cc stefano babic <[email protected]>
diff -upr drivers/mtd/nand/mxc_nand.c drivers/mtd/nand/mxc_nand.c
mtd/nand/mxc_nand.c +0 -0
@@ -1290,7 +1290,9 @@ static void mxc_setup_config1(void)
 	uint16_t tmp;
 

Quoted 10 lines

mtd/nand/mxc_nand.c static void mxc_setup_config1(void) · line 1298
Quoted 8 lines
mtd/nand/mxc_nand.c +2 -0
 	tmp = readw(&host->regs->nfc_config1);
+#ifdef CONFIG_NAND_MXC_NFC_ONE_CYCLE
 	tmp |= NFC_ONE_CYCLE;
+#endif
 	tmp |= NFC_4_8N_ECC;
 	writew(tmp, &host->regs->nfc_config1);
 	if (host->pagesize_2k)
Won't this break other MX25 boards? Stefano?

Yes - please check my answer to your patch.

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

stefano babic

2012-04-02 21:54 UTC #3 lore raw

PATCH v2 1/1 Correct corrupted NAND Flash access on KARO TX25 modules

In reply to Gachet Daniel

Am 02/04/2012 22:55, schrieb Gachet Daniel:

Quoted 2 lines

This patch v2 correct corrupted data while reading NAND flash modules on the KARO TX25 module.

Hi Daniel,

Quoted 14 lines

The current version of the mxc_nand driver uses the symmetric mode to access the NAND flash, but the devices populated on the KARO TX25 only support an asymmetric mode (i.MX25: bit 8 within NAND_FLASH_CONFIG1 register cleared).
To solve the problem in a generic way, the proposition is to define a specific value for that bit, CONFIG_NAND_MXC_NFC_ONE_CYCLE. This value could be defined in the specific board configuration file (./include/configs/...). Short description:
CONFIG_NAND_MXC_NFC_ONE_CYCLE enables to specify how to access NAND flash on the i.MX25 CPU.
If CONFIG_NAND_MXC_NFC_ONE_CYCLE is defined, a one-clock cycle will be used to access the NAND flash (symmetric mode); otherwise a two-clock cycle will be used (asymmetric mode).
Signed-off-by Daniel Gachet <[email protected]>
Cc stefano babic <[email protected]>
diff -upr drivers/mtd/nand/mxc_nand.c drivers/mtd/nand/mxc_nand.c

mtd/nand/mxc_nand.c static void mxc_setup_config1(void) · line 1295

Quoted 6 lines

mtd/nand/mxc_nand.c +2 -0

@@ -1290,7 +1290,9 @@ static void mxc_setup_config1(void)
 	uint16_t tmp;
 
 	tmp = readw(&host->regs->nfc_config1);
+#ifdef CONFIG_NAND_MXC_NFC_ONE_CYCLE
 	tmp |= NFC_ONE_CYCLE;
+#endif

This is not correct. You invert the logic, making as default your board. But this breaks other boards because none of them set this switch.

To complete your patch you should:
- use an inverted logic, letting as default the current behavior and modifying the behavior only for your board.
- add the config switch to your board configuration file, that is tx25.h
- add a description in the README file for your new configuration switch

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: office at denx.de
=====================================================================

Gachet Daniel

author

2012-04-03 05:26 UTC #4 lore raw

PATCH v2 1/1 Correct corrupted NAND Flash access on KARO TX25 modules

Hi Stefano,

No problem, I will do it with the inverse logic, using a CONFIG_NAND_MXC_NFC_TWO_CYCLES, and adapt the tx25.h file.
But could you tell me in which README file I should add the description for that switch? I have a look at all README, but no one has any description about NAND flash configuration flags (like CONFIG_NAND_MXC, CONFIG_NAND_MXC_V1_1 or CONFIG_MXC_NAND_HWECC).

Cordially,

Daniel

-----Original Message-----
From: stefano babic [mailto:sbabic at denx.de]
Sent: lundi 2 avril 2012 23:54
To: Gachet Daniel
Cc: U-Boot at lists.denx.de; stefano babic
Subject: Re: [U-Boot] [PATCH v2] Correct corrupted NAND Flash access on KARO TX25 modules

Am 02/04/2012 22:55, schrieb Gachet Daniel:

Quoted 2 lines

This patch v2 correct corrupted data while reading NAND flash modules on the KARO TX25 module.

Hi Daniel,

Quoted 14 lines

The current version of the mxc_nand driver uses the symmetric mode to access the NAND flash, but the devices populated on the KARO TX25 only support an asymmetric mode (i.MX25: bit 8 within NAND_FLASH_CONFIG1 register cleared).
To solve the problem in a generic way, the proposition is to define a specific value for that bit, CONFIG_NAND_MXC_NFC_ONE_CYCLE. This value could be defined in the specific board configuration file (./include/configs/...). Short description:
CONFIG_NAND_MXC_NFC_ONE_CYCLE enables to specify how to access NAND flash on the i.MX25 CPU.
If CONFIG_NAND_MXC_NFC_ONE_CYCLE is defined, a one-clock cycle will be used to access the NAND flash (symmetric mode); otherwise a two-clock cycle will be used (asymmetric mode).
Signed-off-by Daniel Gachet <[email protected]>
Cc stefano babic <[email protected]>
diff -upr drivers/mtd/nand/mxc_nand.c drivers/mtd/nand/mxc_nand.c

mtd/nand/mxc_nand.c static void mxc_setup_config1(void) · line 1295

Quoted 6 lines

mtd/nand/mxc_nand.c +2 -0

@@ -1290,7 +1290,9 @@ static void mxc_setup_config1(void)
 	uint16_t tmp;
 
 	tmp = readw(&host->regs->nfc_config1);
+#ifdef CONFIG_NAND_MXC_NFC_ONE_CYCLE
 	tmp |= NFC_ONE_CYCLE;
+#endif

This is not correct. You invert the logic, making as default your board. But this breaks other boards because none of them set this switch.

Best regards,
Stefano Babic

--
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de =====================================================================

Stefano Babic

2012-04-03 12:28 UTC #5 lore raw

PATCH v2 1/1 Correct corrupted NAND Flash access on KARO TX25 modules

Quoted 1 line · Gachet Daniel

Hi Stefano,

Hi Daniel,

Quoted 7 lines

No problem, I will do it with the inverse logic, using a CONFIG_NAND_MXC_NFC_TWO_CYCLES, and adapt the tx25.h file. But could you tell me in which README file I should add the description for that switch? I have a look at all README, but no one has any description about NAND flash configuration flags (like CONFIG_NAND_MXC, CONFIG_NAND_MXC_V1_1 or CONFIG_MXC_NAND_HWECC).

You have found missing documentation ;-(. Maybe it was not checked before, but you're right: there is no documentation for this driver. Even worse, there is no "NAND Support" at all.

Please feel free to add a section. I think the right place is under "Low Level (hardware related) configuration options", adding a part for the MXC Nand driver. And if you want to integrate it with the missing documentation for the other CONFIG_NAND_MXC options, it will be highly appreciated.

Thanks,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

Scott Wood

2012-04-06 20:16 UTC #6 lore raw

PATCH v2 1/1 Correct corrupted NAND Flash access on KARO TX25 modules

Quoted 17 lines · Stefano Babic

Quoted 1 line · Gachet Daniel
Hi Stefano,
Hi Daniel,
Quoted 7 lines
No problem, I will do it with the inverse logic, using a CONFIG_NAND_MXC_NFC_TWO_CYCLES, and adapt the tx25.h file. But could you tell me in which README file I should add the description for that switch? I have a look at all README, but no one has any description about NAND flash configuration flags (like CONFIG_NAND_MXC, CONFIG_NAND_MXC_V1_1 or CONFIG_MXC_NAND_HWECC).
You have found missing documentation ;-(. Maybe it was not checked before, but you're right: there is no documentation for this driver. Even worse, there is no "NAND Support" at all.

Quoted 5 lines

Please feel free to add a section. I think the right place is under "Low Level (hardware related) configuration options", adding a part for the MXC Nand driver. And if you want to integrate it with the missing documentation for the other CONFIG_NAND_MXC options, it will be highly appreciated.

There is doc/README.nand that would be appropriate for this, or it could go in an MXC-specific file.

-Scott