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Add AES crypto library

PATCH In review Simon Glass 4 participants 13 messages Apr 5, 2012 – Apr 10, 2012

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Library code Tegra architecture support
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Simon Glass

author
#0 lore raw

PATCH v4 5/23 Add AES crypto library

From: Yen Lin <[email protected]>

Add support for AES using an implementation from Karl Malbrain. This offers small code size (around 5KB on ARM) and supports 128-bit AES only.

Signed-off-by Yen Lin <[email protected]>
Signed-off-by Simon Glass <[email protected]>

---
Changes in v2:
- Tidy whitespace problems
- Use const for sbox arrays

Changes in v4:
- Correct 'form' typo

 include/aes.h |   70 +++++++
 lib/Makefile  |    1 +
 lib/aes.c     |  598 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 669 insertions(+), 0 deletions(-)
 create mode 100644 include/aes.h
 create mode 100644 lib/aes.c
include/aes.h new file +70 -0
new file mode 100644
index 0000000..41b0db2
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * (C) Copyright 2010 - 2011 NVIDIA Corporation <www.nvidia.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _AES_REF_H_
+#define _AES_REF_H_
+
+/*
+ * AES encryption library, with small code size, supporting only 128-bit AES
+ *
+ * AES is a stream cipher which works a block at a time, with each block
+ * in this case being AES_KEY_LENGTH bytes.
+ */
+
+enum {
+	AES_STATECOLS	= 4,	/* columns in the state & expanded key */
+	AES_KEYCOLS	= 4,	/* columns in a key */
+	AES_ROUNDS	= 10,	/* rounds in encryption */
+
+	AES_KEY_LENGTH	= 128 / 8,
+	AES_EXPAND_KEY_LENGTH	= 4 * AES_STATECOLS * (AES_ROUNDS + 1),
+};
+
+/**
+ * Expand a key into a key schedule, which is then used for the other
+ * operations.
+ *
+ * \param key		Key, of length AES_KEY_LENGTH bytes
+ * \param expkey	Buffer to place expanded key, AES_EXPAND_KEY_LENGTH
+ */
+void aes_expand_key(u8 *key, u8 *expkey);
+
+/**
+ * Encrypt a single block of data
+ *
+ * in		Input data
+ * expkey	Expanded key to use for encryption (from aes_expand_key())
+ * out		Output data
+ */
+void aes_encrypt(u8 *in, u8 *expkey, u8 *out);
+
+/**
+ * Decrypt a single block of data
+ *
+ * in		Input data
+ * expkey	Expanded key to use for decryption (from aes_expand_key())
+ * out		Output data
+ */
+void aes_decrypt(u8 *in, u8 *expkey, u8 *out);
+
+#endif /* _AES_REF_H_ */
lib/Makefile +1 -0
index a0fec60..1e8478f 100644
@@ -28,6 +28,7 @@ LIB	= $(obj)libgeneric.o
 ifndef CONFIG_SPL_BUILD
 COBJS-$(CONFIG_ADDR_MAP) += addr_map.o
 COBJS-$(CONFIG_BCH) += bch.o
+COBJS-$(CONFIG_AES) += aes.o
 COBJS-$(CONFIG_BZIP2) += bzlib.o
 COBJS-$(CONFIG_BZIP2) += bzlib_crctable.o
 COBJS-$(CONFIG_BZIP2) += bzlib_decompress.o
lib/aes.c new file +598 -0

598 lines not on this page · raw message

Signature · 1 line
1.7.7.3
author
#1 lore raw

PATCH v4 19/23 tegra: Add EMC settings for Seaboard

From: Jimmy Zhang <[email protected]>

Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).

Signed-off-by Simon Glass <[email protected]>

---
Changes in v2:
- Move EMC tables to device tree
- Removed check for nominal voltage (not needed as it is done just before)

Changes in v3:
- Add better error reporting when EMC setup fails

Changes in v4:
- Remove support for T20 memory timings

 board/nvidia/common/Makefile |    1 +
 board/nvidia/common/board.c  |   13 ++++++++-
 board/nvidia/common/emc.c    |   53 ++++++++++++++++++++++++++++++++++++++++++
 board/nvidia/common/emc.h    |   29 +++++++++++++++++++++++
 4 files changed, 94 insertions(+), 2 deletions(-)
 create mode 100644 board/nvidia/common/emc.c
 create mode 100644 board/nvidia/common/emc.h
board/nvidia/common/Makefile +1 -0
index 3e748fd..a93d458 100644
@@ -27,6 +27,7 @@ LIB	= $(obj)lib$(VENDOR).o
 
 COBJS-y += board.o
 COBJS-$(CONFIG_SPI_UART_SWITCH) += uart-spi-switch.o
+COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
board/nvidia/common/board.c +11 -2
index 1d6b002..e2cdb6e 100644
@@ -30,6 +30,7 @@
 #include <asm/arch/board.h>
 #include <asm/arch/clk_rst.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/emc.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/pmc.h>
 #include <asm/arch/pmu.h>

@@ -39,6 +40,7 @@
 #include <asm/arch/usb.h>
 #include <i2c.h>
 #include "board.h"
+#include "emc.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 

@@ -82,6 +84,8 @@ static void power_det_init(void)
  */
 int board_init(void)
 {
+	int err;
+
 	/* Do clocks and UART first so that printf() works */
 	clock_init();
 	clock_verify();

@@ -105,8 +109,13 @@ int board_init(void)
 # ifdef CONFIG_TEGRA_PMU
 	if (pmu_set_nominal())
 		debug("Failed to select nominal voltages\n");
-# endif
-#endif
+#  ifdef CONFIG_TEGRA_CLOCK_SCALING
+	err = board_emc_init();
+	if (err)
+		debug("Memory controller init failed: %d\n", err);
+#  endif
+# endif /* CONFIG_TEGRA_PMU */
+#endif /* CONFIG_TEGRA_I2C */
 
 #ifdef CONFIG_USB_EHCI_TEGRA
 	pin_mux_usb();
board/nvidia/common/emc.c new file +53 -0

53 lines not on this page · raw message

board/nvidia/common/emc.h new file +29 -0
new file mode 100644
index 0000000..ec1b115
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2011 The Chromium OS Authors.
+ * (C) Copyright 2010,2011 NVIDIA Corporation <www.nvidia.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _NVIDIA_EMC_H_
+#define _NVIDIA_EMC_H_
+
+int board_emc_init(void);
+
+#endif
Signature · 1 line
1.7.7.3
#2 lore raw

PATCH v4 19/23 tegra: Add EMC settings for Seaboard

Quoted 20 lines · Simon Glass

From: Jimmy Zhang <[email protected]>

Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).

Signed-off-by Simon Glass <[email protected]>

---
Changes in v2:
- Move EMC tables to device tree
- Removed check for nominal voltage (not needed as it is done just before)

Changes in v3:
- Add better error reporting when EMC setup fails

Changes in v4:
- Remove support for T20 memory timings

board/nvidia/common/emc.c +2 -0
 
+/* This rate is hard-coded for now, until fdt provides them */
+#define EMC_SDRAM_RATE_T25	(380000 * 2 * 1000)

board/nvidia/common/emc.c line 46

Quoted 10 lines
board/nvidia/common/emc.c +10 -0
+
+int board_emc_init(void)
+{
+	unsigned rate;
+
+	switch (tegra_get_chip_type()) {
+	default:
+	case TEGRA_SOC_T20:
+		debug("%s: EMC timings not supported for T20 Seaboard\n",
+		      __func__);

This isn't Seaboard-specific code, so the string shouldn't say "Seaboard" there.

Why not support Tegra20? Many/all of the other Tegra boards U-Boot supports are Tegra20 not Tegra25.

Presumably this code doesn't blow up if the EMC tables aren't in the .dts file; the code should use the tables if they're present, otherwise be a no-op.

Quoted 7 lines
board/nvidia/common/emc.c +7 -0
+		return -1;
+	case TEGRA_SOC_T25:
+		rate  = EMC_SDRAM_RATE_T25;
+		break;
+	}
+	return tegra_set_emc(gd->fdt_blob, rate);
+}
author
#3 lore raw

PATCH v4 19/23 tegra: Add EMC settings for Seaboard

+Olof

Hi Stephen,

Quoted 35 lines · Stephen Warren
Quoted 20 lines · Simon Glass

From: Jimmy Zhang <[email protected]>

Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).

Signed-off-by Simon Glass <[email protected]>

---
Changes in v2:
- Move EMC tables to device tree
- Removed check for nominal voltage (not needed as it is done just before)

Changes in v3:
- Add better error reporting when EMC setup fails

Changes in v4:
- Remove support for T20 memory timings

board/nvidia/common/emc.c +2 -0
 
+/* This rate is hard-coded for now, until fdt provides them */
+#define EMC_SDRAM_RATE_T25 ? (380000 * 2 * 1000)

board/nvidia/common/emc.c

Quoted 10 lines
board/nvidia/common/emc.c +10 -0
+
+int board_emc_init(void)
+{
+ ? ? unsigned rate;
+
+ ? ? switch (tegra_get_chip_type()) {
+ ? ? default:
+ ? ? case TEGRA_SOC_T20:
+ ? ? ? ? ? ? debug("%s: EMC timings not supported for T20 Seaboard\n",
+ ? ? ? ? ? ? ? ? ? __func__);

This isn't Seaboard-specific code, so the string shouldn't say "Seaboard" there.

Quoted 6 lines

Why not support Tegra20? Many/all of the other Tegra boards U-Boot supports are Tegra20 not Tegra25.

Presumably this code doesn't blow up if the EMC tables aren't in the .dts file; the code should use the tables if they're present, otherwise be a no-op.

I don't mind, we can either go with v3 (with T20) or v4 (without). Both sets of patches are on the list and the removable of T20 support is the only change in v4. Please can you discuss this with Olof?

Quoted 8 lines
Quoted 8 lines

+ ? ? ? ? ? ? return -1;
+ ? ? case TEGRA_SOC_T25:
+ ? ? ? ? ? ? rate ?= EMC_SDRAM_RATE_T25;
+ ? ? ? ? ? ? break;
+ ? ? }
+ ? ? return tegra_set_emc(gd->fdt_blob, rate);
+}

Regards,
Simon

#4 lore raw

PATCH v4 19/23 tegra: Add EMC settings for Seaboard

Quoted 43 lines · Simon Glass

+Olof

Hi Stephen,

Quoted 38 lines · Stephen Warren
Quoted 20 lines · Simon Glass

From: Jimmy Zhang <[email protected]>

Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).

Signed-off-by Simon Glass <[email protected]>

---
Changes in v2:
- Move EMC tables to device tree
- Removed check for nominal voltage (not needed as it is done just before)

Changes in v3:
- Add better error reporting when EMC setup fails

Changes in v4:
- Remove support for T20 memory timings

board/nvidia/common/emc.c +2 -0
 
+/* This rate is hard-coded for now, until fdt provides them */
+#define EMC_SDRAM_RATE_T25   (380000 * 2 * 1000)

board/nvidia/common/emc.c line 46

Quoted 10 lines
board/nvidia/common/emc.c +10 -0
+
+int board_emc_init(void)
+{
+     unsigned rate;
+
+     switch (tegra_get_chip_type()) {
+     default:
+     case TEGRA_SOC_T20:
+             debug("%s: EMC timings not supported for T20 Seaboard\n",
+                   __func__);

This isn't Seaboard-specific code, so the string shouldn't say "Seaboard" there.

Why not support Tegra20? Many/all of the other Tegra boards U-Boot supports are Tegra20 not Tegra25.

Quoted 7 lines
Quoted 3 lines

Presumably this code doesn't blow up if the EMC tables aren't in the .dts file; the code should use the tables if they're present, otherwise be a no-op.

I don't mind, we can either go with v3 (with T20) or v4 (without). Both sets of patches are on the list and the removable of T20 support is the only change in v4. Please can you discuss this with Olof?

IIRC, Olof objected to the incorrect Seaboard .dts file (which contained two unrelated sets of EMC tables for different board variants), not the ability for the EMC driver itself to function on either Tegra20 or Tegra25.

#5 lore raw

PATCH v4 19/23 tegra: Add EMC settings for Seaboard

Quoted 48 lines · Stephen Warren
Quoted 47 lines · Simon Glass

+Olof

Hi Stephen,

Quoted 41 lines · Stephen Warren
Quoted 20 lines · Simon Glass

From: Jimmy Zhang <[email protected]>

Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).

Signed-off-by Simon Glass <[email protected]>

---
Changes in v2:
- Move EMC tables to device tree
- Removed check for nominal voltage (not needed as it is done just before)

Changes in v3:
- Add better error reporting when EMC setup fails

Changes in v4:
- Remove support for T20 memory timings

board/nvidia/common/emc.c +2 -0
 
+/* This rate is hard-coded for now, until fdt provides them */
+#define EMC_SDRAM_RATE_T25 ? (380000 * 2 * 1000)

board/nvidia/common/emc.c

Quoted 10 lines
board/nvidia/common/emc.c +10 -0
+
+int board_emc_init(void)
+{
+ ? ? unsigned rate;
+
+ ? ? switch (tegra_get_chip_type()) {
+ ? ? default:
+ ? ? case TEGRA_SOC_T20:
+ ? ? ? ? ? ? debug("%s: EMC timings not supported for T20 Seaboard\n",
+ ? ? ? ? ? ? ? ? ? __func__);

This isn't Seaboard-specific code, so the string shouldn't say "Seaboard" there.

Why not support Tegra20? Many/all of the other Tegra boards U-Boot supports are Tegra20 not Tegra25.

Presumably this code doesn't blow up if the EMC tables aren't in the .dts file; the code should use the tables if they're present, otherwise be a no-op.

Quoted 7 lines
Quoted 3 lines

I don't mind, we can either go with v3 (with T20) or v4 (without). Both sets of patches are on the list and the removable of T20 support is the only change in v4. Please can you discuss this with Olof?

IIRC, Olof objected to the incorrect Seaboard .dts file (which contained two unrelated sets of EMC tables for different board variants), not the ability for the EMC driver itself to function on either Tegra20 or Tegra25.

Correct. I objected to the one device tree describing 50% inaccurate contents without a documented way to tell the accurate from inaccurate (unlike the case with bootid straps).

What we do on the kernel side is that if the existing programming, i.e. what's setup by BCT/u-boot is not matching the clocks in the table, then we report it but continue with the existing settings. If someone passes in bogus (matching) data in both BCT and the device tree then all bets are off.

-Olof

author
#6 lore raw

PATCH v4 19/23 tegra: Add EMC settings for Seaboard

Hi Stephen,

Quoted 61 lines · Olof Johansson
Quoted 48 lines · Stephen Warren
Quoted 47 lines · Simon Glass

+Olof

Hi Stephen,

Quoted 41 lines · Stephen Warren
Quoted 20 lines · Simon Glass

From: Jimmy Zhang <[email protected]>

Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).

Signed-off-by Simon Glass <[email protected]>

---
Changes in v2:
- Move EMC tables to device tree
- Removed check for nominal voltage (not needed as it is done just before)

Changes in v3:
- Add better error reporting when EMC setup fails

Changes in v4:
- Remove support for T20 memory timings

board/nvidia/common/emc.c +2 -0
 
+/* This rate is hard-coded for now, until fdt provides them */
+#define EMC_SDRAM_RATE_T25 ? (380000 * 2 * 1000)

board/nvidia/common/emc.c

Quoted 10 lines
board/nvidia/common/emc.c +10 -0
+
+int board_emc_init(void)
+{
+ ? ? unsigned rate;
+
+ ? ? switch (tegra_get_chip_type()) {
+ ? ? default:
+ ? ? case TEGRA_SOC_T20:
+ ? ? ? ? ? ? debug("%s: EMC timings not supported for T20 Seaboard\n",
+ ? ? ? ? ? ? ? ? ? __func__);

This isn't Seaboard-specific code, so the string shouldn't say "Seaboard" there.

Why not support Tegra20? Many/all of the other Tegra boards U-Boot supports are Tegra20 not Tegra25.

Presumably this code doesn't blow up if the EMC tables aren't in the .dts file; the code should use the tables if they're present, otherwise be a no-op.

Quoted 7 lines
Quoted 3 lines

I don't mind, we can either go with v3 (with T20) or v4 (without). Both sets of patches are on the list and the removable of T20 support is the only change in v4. Please can you discuss this with Olof?

IIRC, Olof objected to the incorrect Seaboard .dts file (which contained two unrelated sets of EMC tables for different board variants), not the ability for the EMC driver itself to function on either Tegra20 or Tegra25.

Correct. I objected to the one device tree describing 50% inaccurate contents without a documented way to tell the accurate from inaccurate (unlike the case with bootid straps).

Quoted 5 lines

What we do on the kernel side is that if the existing programming, i.e. what's setup by BCT/u-boot is not matching the clocks in the table, then we report it but continue with the existing settings. If someone passes in bogus (matching) data in both BCT and the device tree then all bets are off.

OK, that's different from what I understood (remove support for T20 Seaboard as was apparently done in the kernel). So I think this means that this patch should revert back to the original version, right?

Quoted 3 lines

-Olof

Regards,
Simon

#7 lore raw

PATCH v4 19/23 tegra: Add EMC settings for Seaboard

Quoted 70 lines · Simon Glass

Hi Stephen,

Quoted 61 lines · Olof Johansson
Quoted 48 lines · Stephen Warren
Quoted 47 lines · Simon Glass

+Olof

Hi Stephen,

Quoted 41 lines · Stephen Warren
Quoted 20 lines · Simon Glass

From: Jimmy Zhang <[email protected]>

Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).

Signed-off-by Simon Glass <[email protected]>

---
Changes in v2:
- Move EMC tables to device tree
- Removed check for nominal voltage (not needed as it is done just before)

Changes in v3:
- Add better error reporting when EMC setup fails

Changes in v4:
- Remove support for T20 memory timings

board/nvidia/common/emc.c +2 -0
 
+/* This rate is hard-coded for now, until fdt provides them */
+#define EMC_SDRAM_RATE_T25   (380000 * 2 * 1000)

board/nvidia/common/emc.c line 46

Quoted 10 lines
board/nvidia/common/emc.c +10 -0
+
+int board_emc_init(void)
+{
+     unsigned rate;
+
+     switch (tegra_get_chip_type()) {
+     default:
+     case TEGRA_SOC_T20:
+             debug("%s: EMC timings not supported for T20 Seaboard\n",
+                   __func__);

This isn't Seaboard-specific code, so the string shouldn't say "Seaboard" there.

Why not support Tegra20? Many/all of the other Tegra boards U-Boot supports are Tegra20 not Tegra25.

Presumably this code doesn't blow up if the EMC tables aren't in the .dts file; the code should use the tables if they're present, otherwise be a no-op.

Quoted 7 lines
Quoted 3 lines

I don't mind, we can either go with v3 (with T20) or v4 (without). Both sets of patches are on the list and the removable of T20 support is the only change in v4. Please can you discuss this with Olof?

IIRC, Olof objected to the incorrect Seaboard .dts file (which contained two unrelated sets of EMC tables for different board variants), not the ability for the EMC driver itself to function on either Tegra20 or Tegra25.

Correct. I objected to the one device tree describing 50% inaccurate contents without a documented way to tell the accurate from inaccurate (unlike the case with bootid straps).

Quoted 5 lines

What we do on the kernel side is that if the existing programming, i.e. what's setup by BCT/u-boot is not matching the clocks in the table, then we report it but continue with the existing settings. If someone passes in bogus (matching) data in both BCT and the device tree then all bets are off.

Quoted 3 lines

OK, that's different from what I understood (remove support for T20 Seaboard as was apparently done in the kernel). So I think this means that this patch should revert back to the original version, right?

In the kernel, the Seaboard .dts file only supports Tegra25 since the EMC tables we put into that .dts file are for Tegra25. There is no Seaboard-with-Tegra20 .dts file.

I don't believe the EMC driver has any code that cares about Tegra20-vs-Tegra25, so should work just fine for either.

In practice, we don't have any .dts files for boards with Tegra20 that contain EMC tables though.

#8 lore raw

PATCH v4 19/23 tegra: Add EMC settings for Seaboard

Am Montag, 9. April 2012, 21:51:32 schrieb Stephen Warren:

Quoted 5 lines · Simon Glass
Quoted 4 lines

Hi Stephen,

Quoted 1 line · Olof Johansson

On Mon, Apr 9, 2012 at 2:59 PM, Stephen Warren <[email protected]>

Quoted 6 lines · wrote:
Quoted 6 lines
Quoted 6 lines
Quoted 6 lines · Simon Glass
Quoted 5 lines

+Olof

Hi Stephen,

On Mon, Apr 9, 2012 at 2:27 PM, Stephen Warren <[email protected]>

Quoted 73 lines · wrote:
Quoted 65 lines
Quoted 59 lines
Quoted 46 lines
Quoted 46 lines
Quoted 45 lines · Simon Glass
Quoted 31 lines

From: Jimmy Zhang <[email protected]>

Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).

Signed-off-by Simon Glass <[email protected]>

---
Changes in v2:
- Move EMC tables to device tree
- Removed check for nominal voltage (not needed as it is done just before)

Changes in v3:
- Add better error reporting when EMC setup fails

Changes in v4:
- Remove support for T20 memory timings

board/nvidia/common/emc.c +11 -0
 
+/* This rate is hard-coded for now, until fdt provides them */
+#define EMC_SDRAM_RATE_T25   (380000 * 2 * 1000)
+
+int board_emc_init(void)
+{
+     unsigned rate;
+
+     switch (tegra_get_chip_type()) {
+     default:
+     case TEGRA_SOC_T20:
+             debug("%s: EMC timings not supported for T20
Quoted 2 lines

Seaboard\n",
+ __func__);

This isn't Seaboard-specific code, so the string shouldn't say "Seaboard" there.

Why not support Tegra20? Many/all of the other Tegra boards U-Boot supports are Tegra20 not Tegra25.

Presumably this code doesn't blow up if the EMC tables aren't in the .dts file; the code should use the tables if they're present, otherwise
be a no-op.

Quoted 8 lines
Quoted 3 lines

I don't mind, we can either go with v3 (with T20) or v4 (without). Both sets of patches are on the list and the removable of T20 support is the only change in v4. Please can you discuss this with Olof?

IIRC, Olof objected to the incorrect Seaboard .dts file (which contained two unrelated sets of EMC tables for different board variants), not the ability for the EMC driver itself to function on either Tegra20 or Tegra25.

Correct. I objected to the one device tree describing 50% inaccurate contents without a documented way to tell the accurate from inaccurate (unlike the case with bootid straps).

Quoted 5 lines

What we do on the kernel side is that if the existing programming, i.e. what's setup by BCT/u-boot is not matching the clocks in the table, then we report it but continue with the existing settings. If someone passes in bogus (matching) data in both BCT and the device tree then all bets are off.

Quoted 3 lines

OK, that's different from what I understood (remove support for T20 Seaboard as was apparently done in the kernel). So I think this means that this patch should revert back to the original version, right?

In the kernel, the Seaboard .dts file only supports Tegra25 since the EMC tables we put into that .dts file are for Tegra25. There is no Seaboard-with-Tegra20 .dts file.

Quoted 5 lines

I don't believe the EMC driver has any code that cares about Tegra20-vs-Tegra25, so should work just fine for either.

In practice, we don't have any .dts files for boards with Tegra20 that contain EMC tables though.

well, that may change in the future. In fact, I have a EMC table here for paz00, but only for 333 MHz. I like to submit them once I got 166 MHz values.

Marc

author
#9 lore raw

PATCH v4 19/23 tegra: Add EMC settings for Seaboard

Hi,

Quoted 87 lines · Marc Dietrich

Am Montag, 9. April 2012, 21:51:32 schrieb Stephen Warren:

Quoted 5 lines · Simon Glass
Quoted 4 lines

Hi Stephen,

Quoted 1 line · Olof Johansson

On Mon, Apr 9, 2012 at 2:59 PM, Stephen Warren <[email protected]>

Quoted 6 lines · wrote:
Quoted 6 lines
Quoted 6 lines
Quoted 6 lines · Simon Glass
Quoted 5 lines

+Olof

Hi Stephen,

On Mon, Apr 9, 2012 at 2:27 PM, Stephen Warren <[email protected]>

Quoted 73 lines · wrote:
Quoted 65 lines
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Quoted 46 lines
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Quoted 45 lines · Simon Glass
Quoted 31 lines

From: Jimmy Zhang <[email protected]>

Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).

Signed-off-by Simon Glass <[email protected]>

---
Changes in v2:
- Move EMC tables to device tree
- Removed check for nominal voltage (not needed as it is done just before)

Changes in v3:
- Add better error reporting when EMC setup fails

Changes in v4:
- Remove support for T20 memory timings

board/nvidia/common/emc.c +11 -0
 
+/* This rate is hard-coded for now, until fdt provides them */
+#define EMC_SDRAM_RATE_T25 ? (380000 * 2 * 1000)
+
+int board_emc_init(void)
+{
+ ? ? unsigned rate;
+
+ ? ? switch (tegra_get_chip_type()) {
+ ? ? default:
+ ? ? case TEGRA_SOC_T20:
+ ? ? ? ? ? ? debug("%s: EMC timings not supported for T20
Quoted 2 lines

Seaboard\n",
+ ? ? ? ? ? ? ? ? ? __func__);

This isn't Seaboard-specific code, so the string shouldn't say "Seaboard" there.

Why not support Tegra20? Many/all of the other Tegra boards U-Boot supports are Tegra20 not Tegra25.

Presumably this code doesn't blow up if the EMC tables aren't in the .dts file; the code should use the tables if they're present, otherwise
be a no-op.

Quoted 8 lines
Quoted 3 lines

I don't mind, we can either go with v3 (with T20) or v4 (without). Both sets of patches are on the list and the removable of T20 support is the only change in v4. Please can you discuss this with Olof?

IIRC, Olof objected to the incorrect Seaboard .dts file (which contained two unrelated sets of EMC tables for different board variants), not the ability for the EMC driver itself to function on either Tegra20 or Tegra25.

Correct. I objected to the one device tree describing 50% inaccurate contents without a documented way to tell the accurate from inaccurate (unlike the case with bootid straps).

Quoted 5 lines

What we do on the kernel side is that if the existing programming, i.e. what's setup by BCT/u-boot is not matching the clocks in the table, then we report it but continue with the existing settings. If someone passes in bogus (matching) data in both BCT and the device tree then all bets are off.

Quoted 3 lines

OK, that's different from what I understood (remove support for T20 Seaboard as was apparently done in the kernel). So I think this means that this patch should revert back to the original version, right?

In the kernel, the Seaboard .dts file only supports Tegra25 since the EMC tables we put into that .dts file are for Tegra25. There is no Seaboard-with-Tegra20 .dts file.

Quoted 8 lines
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I don't believe the EMC driver has any code that cares about Tegra20-vs-Tegra25, so should work just fine for either.

In practice, we don't have any .dts files for boards with Tegra20 that contain EMC tables though.

well, that may change in the future. In fact, I have a EMC table here for paz00, but only for 333 MHz. I like to submit them once I got 166 MHz values.

OK, I am going to put the T20 code back in and send an updated patch.

Regards,
Simon

Quoted 7 lines

Marc

author
#10 lore raw

PATCH v4 22/23 tegra: fdt: Add EMC data for Tegra2 Seaboard

In reply to Simon Glass

This adds timings for T20 and T25 Seaboards, using the bindings found here:

http://patchwork.ozlabs.org/patch/132928/

We supply both full speed options for normal running, and half speed options for testing / development.

Signed-off-by Simon Glass <[email protected]>

---
Changes in v4:
- Remove T20 memory timings - we only support T25 Seaboards

 board/nvidia/dts/tegra2-seaboard.dts |   37 ++++++++++++++++++++++++++++++++++
 1 files changed, 37 insertions(+), 0 deletions(-)
board/nvidia/dts/tegra2-seaboard.dts +37 -0
index 6ba3ec4..08ada8c 100644
@@ -89,4 +89,41 @@
 	i2c@7000c500 {
 		clock-frequency = <100000>;
 	};
+
+	emc@7000f400 {
+		emc-table@190000 {
+			reg = < 190000 >;
+			compatible = "nvidia,tegra20-emc-table";
+			clock-frequency = < 190000 >;
+			nvidia,emc-registers = < 0x0000000c 0x00000026
+				0x00000009 0x00000003 0x00000004 0x00000004
+				0x00000002 0x0000000c 0x00000003 0x00000003
+				0x00000002 0x00000001 0x00000004 0x00000005
+				0x00000004 0x00000009 0x0000000d 0x0000059f
+				0x00000000 0x00000003 0x00000003 0x00000003
+				0x00000003 0x00000001 0x0000000b 0x000000c8
+				0x00000003 0x00000007 0x00000004 0x0000000f
+				0x00000002 0x00000000 0x00000000 0x00000002
+				0x00000000 0x00000000 0x00000083 0xa06204ae
+				0x007dc010 0x00000000 0x00000000 0x00000000
+				0x00000000 0x00000000 0x00000000 0x00000000 >;
+		};
+		emc-table@380000 {
+			reg = < 380000 >;
+			compatible = "nvidia,tegra20-emc-table";
+			clock-frequency = < 380000 >;
+			nvidia,emc-registers = < 0x00000017 0x0000004b
+				0x00000012 0x00000006 0x00000004 0x00000005
+				0x00000003 0x0000000c 0x00000006 0x00000006
+				0x00000003 0x00000001 0x00000004 0x00000005
+				0x00000004 0x00000009 0x0000000d 0x00000b5f
+				0x00000000 0x00000003 0x00000003 0x00000006
+				0x00000006 0x00000001 0x00000011 0x000000c8
+				0x00000003 0x0000000e 0x00000007 0x0000000f
+				0x00000002 0x00000000 0x00000000 0x00000002
+				0x00000000 0x00000000 0x00000083 0xe044048b
+				0x007d8010 0x00000000 0x00000000 0x00000000
+				0x00000000 0x00000000 0x00000000 0x00000000 >;
+		};
+	};
 };
Signature · 1 line
1.7.7.3
author
#12 lore raw

Re: [PATCH v4 22/23] tegra: fdt: Add EMC data for Tegra2 Seaboard

Hi Stephen,

Quoted 11 lines · Stephen Warren
Quoted 8 lines · Simon Glass

This adds timings for T20 and T25 Seaboards, using the bindings found here:

http://patchwork.ozlabs.org/patch/132928/

We supply both full speed options for normal running, and half speed options for testing / development.

Signed-off-by Simon Glass <[email protected]>
Acked-by Stephen Warren <[email protected]>

This is the patch where I removed the T20 data. If it is not present, then things will still work, although if you define DEBUG then you will get warnings. We can either leave it out or put it back in for v5, up to you.

Regards,
Simon