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ARM: spear-soc DT support for 3.5

GIT PULL Viresh Kumar 4 participants 13 messages Apr 2, 2012 – Apr 12, 2012 1 message not in the archive

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Viresh Kumar

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#0 lore raw

Hi Arnd/Olof,

The following changes since commit dd775ae2549217d3ae09363e3edb305d0fa19928:

Linux 3.4-rc1 (2012-03-31 16:24:09 -0700)

are available in the git repository at:

git://git.stlinux.com/spear/linux-2.6.git spear-dt

for you to fetch changes up to 8f21ec99c7b78c3f0baf6bbf2e438da68da3dc08:

SPEAr: Update defconfigs (2012-04-02 09:03:59 +0530)

----------------------------------------------------------------
Stefan Roese (1):
ARM: SPEAr600: Change FSMC and SMI clock names

Viresh Kumar (8):
SPI/Pl022: Include types.h to remove compilation warnings
SPEAr: Use CLKDEV_INIT for defining clk_lookups
SPEAr3xx: Add clock instance of usb hosts - ehci and ohci 0 and 1
SPEAr6xx: Add compilation support for dtbs using 'make dtbs'
SPEAr3xx: Replace printk() with pr_*()
ARM: SPEAr3xx: Add device-tree support to SPEAr3xx architecture
SPEAr: Add PL080 DMA support for 3xx and 6xx
SPEAr: Update defconfigs

 Documentation/arm/SPEAr/overview.txt            |   13 +-
 Documentation/devicetree/bindings/arm/spear.txt |   18 ++
 arch/arm/boot/dts/spear300-evb.dts              |  183 +++++++++++
 arch/arm/boot/dts/spear300.dtsi                 |   72 +++++
 arch/arm/boot/dts/spear310-evb.dts              |  111 +++++++
 arch/arm/boot/dts/spear310.dtsi                 |   75 +++++
 arch/arm/boot/dts/spear320-evb.dts              |  112 +++++++
 arch/arm/boot/dts/spear320.dtsi                 |   90 ++++++
 arch/arm/boot/dts/spear3xx.dtsi                 |  144 +++++++++
 arch/arm/boot/dts/spear600-evb.dts              |    4 +
 arch/arm/boot/dts/spear600.dtsi                 |    8 +
 arch/arm/configs/spear3xx_defconfig             |   52 +++-
 arch/arm/configs/spear6xx_defconfig             |   41 ++-
 arch/arm/mach-spear3xx/Kconfig                  |   34 +--
 arch/arm/mach-spear3xx/Makefile                 |   13 +-
 arch/arm/mach-spear3xx/Makefile.boot            |    4 +
 arch/arm/mach-spear3xx/clock.c                  |  182 +++++++-----
 arch/arm/mach-spear3xx/include/mach/generic.h   |   31 +--
 arch/arm/mach-spear3xx/include/mach/hardware.h  |    3 -
 arch/arm/mach-spear3xx/include/mach/spear.h     |    9 +-
 arch/arm/mach-spear3xx/spear300.c               |  294 ++++++++++++++++--
 arch/arm/mach-spear3xx/spear300_evb.c           |   75 -----
 arch/arm/mach-spear3xx/spear310.c               |  329 +++++++++++++++++++--
 arch/arm/mach-spear3xx/spear310_evb.c           |   81 -----
 arch/arm/mach-spear3xx/spear320.c               |  328 +++++++++++++++++++--
 arch/arm/mach-spear3xx/spear320_evb.c           |   79 -----
 arch/arm/mach-spear3xx/spear3xx.c               |  148 +++++----
 arch/arm/mach-spear6xx/Makefile.boot            |    2 +
 arch/arm/mach-spear6xx/clock.c                  |   80 +++---
 arch/arm/mach-spear6xx/spear6xx.c               |  372 ++++++++++++++++++++++-
 arch/arm/plat-spear/Kconfig                     |    3 +-
 arch/arm/plat-spear/Makefile                    |    2 +-
 arch/arm/plat-spear/include/plat/pl080.h        |   21 ++
 arch/arm/plat-spear/pl080.c                     |   79 +++++
 include/linux/amba/pl022.h                      |    2 +
 35 files changed, 2507 insertions(+), 587 deletions(-)
 create mode 100644 arch/arm/boot/dts/spear300-evb.dts
 create mode 100644 arch/arm/boot/dts/spear300.dtsi
 create mode 100644 arch/arm/boot/dts/spear310-evb.dts
 create mode 100644 arch/arm/boot/dts/spear310.dtsi
 create mode 100644 arch/arm/boot/dts/spear320-evb.dts
 create mode 100644 arch/arm/boot/dts/spear320.dtsi
 create mode 100644 arch/arm/boot/dts/spear3xx.dtsi
 delete mode 100644 arch/arm/mach-spear3xx/spear300_evb.c
 delete mode 100644 arch/arm/mach-spear3xx/spear310_evb.c
 delete mode 100644 arch/arm/mach-spear3xx/spear320_evb.c
 create mode 100644 arch/arm/plat-spear/include/plat/pl080.h
 create mode 100644 arch/arm/plat-spear/pl080.c
Signature · 1 line
viresh

A message that is not in the archive (sent off-list or not yet received): CAOh2x=n8GO-vzFgDEdeyUVdGiOE_-BxgpC5+LbKRMtvgnoSxHQ@mail.gmail.com

#2 lore raw
Quoted 13 lines · viresh kumar
Quoted 12 lines · Viresh Kumar

Hi Arnd/Olof,

The following changes since commit
dd775ae2549217d3ae09363e3edb305d0fa19928:

?Linux 3.4-rc1 (2012-03-31 16:24:09 -0700)

are available in the git repository at:

?git://git.stlinux.com/spear/linux-2.6.git spear-dt

Quoted 8 lines
Quoted 3 lines

for you to fetch changes up to 8f21ec99c7b78c3f0baf6bbf2e438da68da3dc08:

?SPEAr: Update defconfigs (2012-04-02 09:03:59 +0530)

Arnd,

I don't exactly know how it works, but Linus would require this pull before he applies pinctrl patches.

Will there be conflicts between this patch set and the stuff you're submitting for pinctrl? Or is it just runtime problems?

The ARM SoC and pinctrl are not on top of each other or anything like that, they are merged in parallell.

Yours,
Linus Walleij

author
#3 lore raw
Quoted 2 lines · Linus Walleij

Will there be conflicts between this patch set and the stuff you're submitting for pinctrl? Or is it just runtime problems?

Yes. There will be conflicts. I have touched dts files in pinctrl patches that got added in this patchset.

Signature · 1 line
viresh
#4 lore raw
Quoted 6 lines · Viresh Kumar
Quoted 2 lines · Linus Walleij

Will there be conflicts between this patch set and the stuff you're submitting for pinctrl? Or is it just runtime problems?

Yes. There will be conflicts. I have touched dts files in pinctrl patches that got added in this patchset.

Hm, then we should maybe consider mergeing all that pinctrl stuff through ARM SoC later as well. I can probably provide the necessary ACKs.

Yours,
Linus Walleij

author
#5 lore raw
Quoted 3 lines · Linus Walleij

Hm, then we should maybe consider mergeing all that pinctrl stuff through ARM SoC later as well. I can probably provide the necessary ACKs.

That would be much better. Just to know who should update these Acks in commits. If it isn't a pull request, Arnd will do it. But if it is, then probably i am required to update this?

Signature · 1 line
viresh
#6 lore raw
Quoted 8 lines · Viresh Kumar
Quoted 3 lines · Linus Walleij

Hm, then we should maybe consider mergeing all that pinctrl stuff through ARM SoC later as well. I can probably provide the necessary ACKs.

That would be much better. Just to know who should update these Acks in commits. If it isn't a pull request, Arnd will do it. But if it is, then probably i am required to update this?

Yeah you can send this pull request and then Arnd or Olof will put it on some topic branch like "topic-spear" and then you base your further work on top of that and then send a new pull request to be merged into that same branch, with the pinctrl stuff. And include the ACK:s directly in the patches (git rebase -i is your friend...)

Yours,
Linus Walleij

author
#7 lore raw
Quoted 5 lines · Linus Walleij

Yeah you can send this pull request and then Arnd or Olof will put it on some topic branch like "topic-spear" and then you base your further work on top of that and then send a new pull request to be merged into that same branch, with the pinctrl stuff. And include the ACK:s directly in the patches (git rebase -i is your friend...)

git rebase -i is an old friend, but it seem i don't know him completely :( How does it help in adding Acked-by automatically? Is there anything more than marking all of them as "rework" and add these Acks manually?

Signature · 1 line
viresh
#8 lore raw
Quoted 10 lines · Viresh Kumar
Quoted 5 lines · Linus Walleij

Yeah you can send this pull request and then Arnd or Olof will put it on some topic branch like "topic-spear" and then you base your further work on top of that and then send a new pull request to be merged into that same branch, with the pinctrl stuff. And include the ACK:s directly in the patches (git rebase -i is your friend...)

git rebase -i is an old friend, but it seem i don't know him completely :( How does it help in adding Acked-by automatically? Is there anything more than marking all of them as "rework" and add these Acks manually?

Not that I'm aware of ... That's how I do it atleast.

Linus Walleij

#9 lore raw
Quoted 8 lines · Linus Walleij
Quoted 7 lines · Viresh Kumar
Quoted 5 lines · Linus Walleij

Yeah you can send this pull request and then Arnd or Olof will put it on some topic branch like "topic-spear" and then you base your further work on top of that and then send a new pull request to be merged into that same branch, with the pinctrl stuff. And include the ACK:s directly in the patches (git rebase -i is your friend...)

Quoted 5 lines
Quoted 3 lines

git rebase -i is an old friend, but it seem i don't know him completely :( How does it help in adding Acked-by automatically? Is there anything more than marking all of them as "rework" and add these Acks manually?

Not that I'm aware of ... That's how I do it atleast.

In your 'git party' I remember, someone mentioning about 'git filter-branch' which can help on this. Perhaps we need to go through the help pages.

--
regards
Shiraz

#10 lore raw
In reply to Viresh Kumar
Quoted 4 lines · Viresh Kumar

The following changes since commit dd775ae2549217d3ae09363e3edb305d0fa19928:

?Linux 3.4-rc1 (2012-03-31 16:24:09 -0700)

Quoted 8 lines

are available in the git repository at:

?git://git.stlinux.com/spear/linux-2.6.git spear-dt

for you to fetch changes up to 8f21ec99c7b78c3f0baf6bbf2e438da68da3dc08:

Viresh Kumar (8):
? ? ?SPI/Pl022: Include types.h to remove compilation warnings

This patch should go through Grant's SPI tree I think? Especially since it is eligible for -rc:s...

Yours,
Linus Walleij

author
#11 lore raw
Quoted 4 lines · Linus Walleij
Quoted 2 lines
Quoted 2 lines

Viresh Kumar (8):
SPI/Pl022: Include types.h to remove compilation warnings

This patch should go through Grant's SPI tree I think? Especially since it is eligible for -rc:s...

I knew about this issue and was almost sure, it wouldn't be acceptable. :)

When i sent this pull request, this patch wasn't there in linux-next and so i required it for basic compilation. Without it, compilation was breaking.

I couldn't think of a way to handle it other than waiting for this patch to come to linux-next.

Signature · 1 line
viresh
#12 lore raw
In reply to Viresh Kumar
Quoted 6 lines · Viresh Kumar

The following changes since commit dd775ae2549217d3ae09363e3edb305d0fa19928:

Linux 3.4-rc1 (2012-03-31 16:24:09 -0700)

are available in the git repository at:

Quoted 7 lines

git://git.stlinux.com/spear/linux-2.6.git spear-dt

for you to fetch changes up to 8f21ec99c7b78c3f0baf6bbf2e438da68da3dc08:

SPEAr: Update defconfigs (2012-04-02 09:03:59 +0530)

----------------------------------------------------------------

Hi Viresh,

I've played around with spear myself, based on your patches. Please consider adding this patch, or a variation of it.

8<---
ARM: spear: remove most mach/*.h header contents

The register and irq definitions in mach/*.h for spear3xx and spear6xx are now mostly obsolete, after the platforms have been converted to device tree based probing and the data is now part of the device tree files.

The misc_regs.h contents are moved into clock.c because that is the only user, aside from the DMA_CHN_CFG that should eventually get handled differently. Some of the contents of mach/spear.h still remain, because they are used to set up the static map table, timer, uart and auxdata tables, but almost everything got removed. We might remove everything but the map table as the DT conversion completes, but that is not a priority. I've also made sure to make both copies of spear.h more or less identical so we can eventually combine them.

The spear3?0.h files were only used by the spear3?0.c files, so I merged the contents in there and removed the bits that were unused. This is something that should still be looked at.

Signed-off-by Arnd Bergmann <[email protected]>
 arch/arm/mach-spear3xx/clock.c                  |  145 +++++++++++++++++++++
 arch/arm/mach-spear3xx/include/mach/generic.h   |   11 +--
 arch/arm/mach-spear3xx/include/mach/hardware.h  |   21 +---
 arch/arm/mach-spear3xx/include/mach/irqs.h      |  130 +-------------------
 arch/arm/mach-spear3xx/include/mach/misc_regs.h |  144 ---------------------
 arch/arm/mach-spear3xx/include/mach/spear.h     |   38 +------
 arch/arm/mach-spear3xx/include/mach/spear300.h  |   54 --------
 arch/arm/mach-spear3xx/include/mach/spear310.h  |   58 ---------
 arch/arm/mach-spear3xx/include/mach/spear320.h  |   67 ----------
 arch/arm/mach-spear3xx/spear300.c               |   41 ++++++-
 arch/arm/mach-spear3xx/spear310.c               |   62 +++++++++-
 arch/arm/mach-spear3xx/spear320.c               |   62 +++++++++-
 arch/arm/mach-spear3xx/spear3xx.c               |    4 +-
 arch/arm/mach-spear6xx/clock.c                  |  154 +++++++++++++++++++++++
 arch/arm/mach-spear6xx/include/mach/generic.h   |   29 +----
 arch/arm/mach-spear6xx/include/mach/hardware.h  |   24 +----
 arch/arm/mach-spear6xx/include/mach/irqs.h      |   75 +-----------
 arch/arm/mach-spear6xx/include/mach/misc_regs.h |  154 -----------------------
 arch/arm/mach-spear6xx/include/mach/spear.h     |   55 +-------
 arch/arm/mach-spear6xx/include/mach/spear600.h  |   21 ---
 arch/arm/mach-spear6xx/spear6xx.c               |   49 ++++----
 arch/arm/plat-spear/include/plat/debug-macro.S  |    2 +-
 arch/arm/plat-spear/include/plat/hardware.h     |   17 ---
 arch/arm/plat-spear/include/plat/uncompress.h   |    2 +-
 arch/arm/plat-spear/pl080.c                     |    1 +
 arch/arm/plat-spear/restart.c                   |    2 +-
 arch/arm/plat-spear/time.c                      |   17 ++--
 27 files changed, 518 insertions(+), 921 deletions(-)
arch/arm/mach-spear3xx/clock.c +145 -0
index eeafe38..00c508a 100644
@@ -19,6 +19,151 @@
 #include <asm/mach-types.h>
 #include <plat/clock.h>
 #include <mach/misc_regs.h>
+#include <mach/spear.h>
+
+#define MISC_BASE		IOMEM(VA_SPEAR3XX_ICM3_MISC_REG_BASE)
+
+#define SOC_CFG_CTR		(MISC_BASE + 0x000)
+#define DIAG_CFG_CTR		(MISC_BASE + 0x004)
+#define PLL1_CTR		(MISC_BASE + 0x008)
+#define PLL1_FRQ		(MISC_BASE + 0x00C)
+#define PLL1_MOD		(MISC_BASE + 0x010)
+#define PLL2_CTR		(MISC_BASE + 0x014)
+/* PLL_CTR register masks */
+#define PLL_ENABLE		2
+#define PLL_MODE_SHIFT		4
+#define PLL_MODE_MASK		0x3
+#define PLL_MODE_NORMAL		0
+#define PLL_MODE_FRACTION	1
+#define PLL_MODE_DITH_DSB	2
+#define PLL_MODE_DITH_SSB	3
+
+#define PLL2_FRQ		(MISC_BASE + 0x018)
+/* PLL FRQ register masks */
+#define PLL_DIV_N_SHIFT		0
+#define PLL_DIV_N_MASK		0xFF
+#define PLL_DIV_P_SHIFT		8
+#define PLL_DIV_P_MASK		0x7
+#define PLL_NORM_FDBK_M_SHIFT	24
+#define PLL_NORM_FDBK_M_MASK	0xFF
+#define PLL_DITH_FDBK_M_SHIFT	16
+#define PLL_DITH_FDBK_M_MASK	0xFFFF
+
+#define PLL2_MOD		(MISC_BASE + 0x01C)
+#define PLL_CLK_CFG		(MISC_BASE + 0x020)
+#define CORE_CLK_CFG		(MISC_BASE + 0x024)
+/* CORE CLK CFG register masks */
+#define PLL_HCLK_RATIO_SHIFT	10
+#define PLL_HCLK_RATIO_MASK	0x3
+#define HCLK_PCLK_RATIO_SHIFT	8
+#define HCLK_PCLK_RATIO_MASK	0x3
+
+#define PERIP_CLK_CFG		(MISC_BASE + 0x028)
+/* PERIP_CLK_CFG register masks */
+#define UART_CLK_SHIFT		4
+#define UART_CLK_MASK		0x1
+#define FIRDA_CLK_SHIFT		5
+#define FIRDA_CLK_MASK		0x3
+#define GPT0_CLK_SHIFT		8
+#define GPT1_CLK_SHIFT		11
+#define GPT2_CLK_SHIFT		12
+#define GPT_CLK_MASK		0x1
+#define AUX_CLK_PLL3_VAL	0
+#define AUX_CLK_PLL1_VAL	1
+
+#define PERIP1_CLK_ENB		(MISC_BASE + 0x02C)
+/* PERIP1_CLK_ENB register masks */
+#define UART_CLK_ENB		3
+#define SSP_CLK_ENB		5
+#define I2C_CLK_ENB		7
+#define JPEG_CLK_ENB		8
+#define FIRDA_CLK_ENB		10
+#define GPT1_CLK_ENB		11
+#define GPT2_CLK_ENB		12
+#define ADC_CLK_ENB		15
+#define RTC_CLK_ENB		17
+#define GPIO_CLK_ENB		18
+#define DMA_CLK_ENB		19
+#define SMI_CLK_ENB		21
+#define GMAC_CLK_ENB		23
+#define USBD_CLK_ENB		24
+#define USBH_CLK_ENB		25
+#define C3_CLK_ENB		31
+
+#define SOC_CORE_ID		(MISC_BASE + 0x030)
+#define RAS_CLK_ENB		(MISC_BASE + 0x034)
+#define PERIP1_SOF_RST		(MISC_BASE + 0x038)
+/* PERIP1_SOF_RST register masks */
+#define JPEG_SOF_RST		8
+
+#define SOC_USER_ID		(MISC_BASE + 0x03C)
+#define RAS_SOF_RST		(MISC_BASE + 0x040)
+#define PRSC1_CLK_CFG		(MISC_BASE + 0x044)
+#define PRSC2_CLK_CFG		(MISC_BASE + 0x048)
+#define PRSC3_CLK_CFG		(MISC_BASE + 0x04C)
+/* gpt synthesizer register masks */
+#define GPT_MSCALE_SHIFT	0
+#define GPT_MSCALE_MASK		0xFFF
+#define GPT_NSCALE_SHIFT	12
+#define GPT_NSCALE_MASK		0xF
+
+#define AMEM_CLK_CFG		(MISC_BASE + 0x050)
+#define EXPI_CLK_CFG		(MISC_BASE + 0x054)
+#define CLCD_CLK_SYNT		(MISC_BASE + 0x05C)
+#define FIRDA_CLK_SYNT		(MISC_BASE + 0x060)
+#define UART_CLK_SYNT		(MISC_BASE + 0x064)
+#define GMAC_CLK_SYNT		(MISC_BASE + 0x068)
+#define RAS1_CLK_SYNT		(MISC_BASE + 0x06C)
+#define RAS2_CLK_SYNT		(MISC_BASE + 0x070)
+#define RAS3_CLK_SYNT		(MISC_BASE + 0x074)
+#define RAS4_CLK_SYNT		(MISC_BASE + 0x078)
+/* aux clk synthesiser register masks for irda to ras4 */
+#define AUX_SYNT_ENB		31
+#define AUX_EQ_SEL_SHIFT	30
+#define AUX_EQ_SEL_MASK		1
+#define AUX_EQ1_SEL		0
+#define AUX_EQ2_SEL		1
+#define AUX_XSCALE_SHIFT	16
+#define AUX_XSCALE_MASK		0xFFF
+#define AUX_YSCALE_SHIFT	0
+#define AUX_YSCALE_MASK		0xFFF
+
+#define ICM1_ARB_CFG		(MISC_BASE + 0x07C)
+#define ICM2_ARB_CFG		(MISC_BASE + 0x080)
+#define ICM3_ARB_CFG		(MISC_BASE + 0x084)
+#define ICM4_ARB_CFG		(MISC_BASE + 0x088)
+#define ICM5_ARB_CFG		(MISC_BASE + 0x08C)
+#define ICM6_ARB_CFG		(MISC_BASE + 0x090)
+#define ICM7_ARB_CFG		(MISC_BASE + 0x094)
+#define ICM8_ARB_CFG		(MISC_BASE + 0x098)
+#define ICM9_ARB_CFG		(MISC_BASE + 0x09C)
+#define USB2_PHY_CFG		(MISC_BASE + 0x0A4)
+#define GMAC_CFG_CTR		(MISC_BASE + 0x0A8)
+#define EXPI_CFG_CTR		(MISC_BASE + 0x0AC)
+#define PRC1_LOCK_CTR		(MISC_BASE + 0x0C0)
+#define PRC2_LOCK_CTR		(MISC_BASE + 0x0C4)
+#define PRC3_LOCK_CTR		(MISC_BASE + 0x0C8)
+#define PRC4_LOCK_CTR		(MISC_BASE + 0x0CC)
+#define PRC1_IRQ_CTR		(MISC_BASE + 0x0D0)
+#define PRC2_IRQ_CTR		(MISC_BASE + 0x0D4)
+#define PRC3_IRQ_CTR		(MISC_BASE + 0x0D8)
+#define PRC4_IRQ_CTR		(MISC_BASE + 0x0DC)
+#define PWRDOWN_CFG_CTR		(MISC_BASE + 0x0E0)
+#define COMPSSTL_1V8_CFG	(MISC_BASE + 0x0E4)
+#define COMPSSTL_2V5_CFG	(MISC_BASE + 0x0E8)
+#define COMPCOR_3V3_CFG		(MISC_BASE + 0x0EC)
+#define SSTLPAD_CFG_CTR		(MISC_BASE + 0x0F0)
+#define BIST1_CFG_CTR		(MISC_BASE + 0x0F4)
+#define BIST2_CFG_CTR		(MISC_BASE + 0x0F8)
+#define BIST3_CFG_CTR		(MISC_BASE + 0x0FC)
+#define BIST4_CFG_CTR		(MISC_BASE + 0x100)
+#define BIST5_CFG_CTR		(MISC_BASE + 0x104)
+#define BIST1_STS_RES		(MISC_BASE + 0x108)
+#define BIST2_STS_RES		(MISC_BASE + 0x10C)
+#define BIST3_STS_RES		(MISC_BASE + 0x110)
+#define BIST4_STS_RES		(MISC_BASE + 0x114)
+#define BIST5_STS_RES		(MISC_BASE + 0x118)
+#define SYSERR_CFG_CTR		(MISC_BASE + 0x11C)
 
 /* root clks */
 /* 32 KHz oscillator clock */
arch/arm/mach-spear3xx/include/mach/generic.h +1 -10
index a756958..e4f4d72 100644
@@ -22,22 +22,13 @@
 #include <asm/mach/map.h>
 #include <plat/padmux.h>
 
-/* spear3xx declarations */
-/*
- * Each GPT has 2 timer channels
- * Following GPT channels will be used as clock source and clockevent
- */
-#define SPEAR_GPT0_BASE		SPEAR3XX_ML1_TMR_BASE
-#define SPEAR_GPT0_CHAN0_IRQ	SPEAR3XX_IRQ_CPU_GPT1_1
-#define SPEAR_GPT0_CHAN1_IRQ	SPEAR3XX_IRQ_CPU_GPT1_2
-
 /* Add spear3xx family device structure declarations here */
 extern struct sys_timer spear3xx_timer;
 extern struct pl022_ssp_controller pl022_plat_data;
 extern struct pl08x_platform_data pl080_plat_data;
 
 /* Add spear3xx family function declarations here */
-void __init spear_setup_timer(void);
+void __init spear_setup_timer(resource_size_t base, int irq);
 void __init spear3xx_map_io(void);
 void __init spear3xx_dt_init_irq(void);
arch/arm/mach-spear3xx/include/mach/hardware.h +1 -20
index defa374..40a8c17 100644
@@ -1,20 +1 @@
-/*
- * arch/arm/mach-spear3xx/include/mach/hardware.h
- *
- * Hardware definitions for SPEAr3xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<[email protected]>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_HARDWARE_H
-#define __MACH_HARDWARE_H
-
-#include <plat/hardware.h>
-#include <mach/spear.h>
-
-#endif /* __MACH_HARDWARE_H */
+/* empty */
arch/arm/mach-spear3xx/include/mach/irqs.h +2 -128

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arch/arm/mach-spear3xx/include/mach/misc_regs.h +0 -144

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arch/arm/mach-spear3xx/include/mach/spear.h +2 -36
index 8e3900a..6d4dadc 100644
@@ -15,61 +15,27 @@
 #define __MACH_SPEAR3XX_H
 
 #include <asm/memory.h>
-#include <mach/spear300.h>
-#include <mach/spear310.h>
-#include <mach/spear320.h>
-
-#define SPEAR3XX_ML_SDRAM_BASE		UL(0x00000000)
-
-#define SPEAR3XX_ICM9_BASE		UL(0xC0000000)
 
 /* ICM1 - Low speed connection */
 #define SPEAR3XX_ICM1_2_BASE		UL(0xD0000000)
 #define VA_SPEAR3XX_ICM1_2_BASE		UL(0xFD000000)
 #define SPEAR3XX_ICM1_UART_BASE		UL(0xD0000000)
 #define VA_SPEAR3XX_ICM1_UART_BASE	(VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE)
-#define SPEAR3XX_ICM1_ADC_BASE		UL(0xD0080000)
 #define SPEAR3XX_ICM1_SSP_BASE		UL(0xD0100000)
-#define SPEAR3XX_ICM1_I2C_BASE		UL(0xD0180000)
-#define SPEAR3XX_ICM1_JPEG_BASE		UL(0xD0800000)
-#define SPEAR3XX_ICM1_IRDA_BASE		UL(0xD1000000)
-#define SPEAR3XX_ICM1_SRAM_BASE		UL(0xD2800000)
-
-/* ICM2 - Application Subsystem */
-#define SPEAR3XX_ICM2_HWACCEL0_BASE	UL(0xD8800000)
-#define SPEAR3XX_ICM2_HWACCEL1_BASE	UL(0xD9000000)
-
-/* ICM4 - High Speed Connection */
-#define SPEAR3XX_ICM4_BASE		UL(0xE0000000)
-#define SPEAR3XX_ICM4_MII_BASE		UL(0xE0800000)
-#define SPEAR3XX_ICM4_USBD_FIFO_BASE	UL(0xE1000000)
-#define SPEAR3XX_ICM4_USBD_CSR_BASE	UL(0xE1100000)
-#define SPEAR3XX_ICM4_USBD_PLDT_BASE	UL(0xE1200000)
-#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE	UL(0xE1800000)
-#define SPEAR3XX_ICM4_USB_OHCI0_BASE	UL(0xE1900000)
-#define SPEAR3XX_ICM4_USB_OHCI1_BASE	UL(0xE2100000)
-#define SPEAR3XX_ICM4_USB_ARB_BASE	UL(0xE2800000)
 
 /* ML1 - Multi Layer CPU Subsystem */
 #define SPEAR3XX_ICM3_ML1_2_BASE	UL(0xF0000000)
-#define SPEAR3XX_ML1_TMR_BASE		UL(0xF0000000)
-#define SPEAR3XX_ML1_VIC_BASE		UL(0xF1100000)
+#define VA_SPEAR6XX_ML_CPU_BASE		UL(0xF0000000)
+#define SPEAR3XX_CPU_TMR_BASE		UL(0xF0000000)
 
 /* ICM3 - Basic Subsystem */
-#define SPEAR3XX_ICM3_SMEM_BASE		UL(0xF8000000)
 #define SPEAR3XX_ICM3_SMI_CTRL_BASE	UL(0xFC000000)
 #define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE	UL(0xFC000000)
 #define SPEAR3XX_ICM3_DMA_BASE		UL(0xFC400000)
-#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE	UL(0xFC600000)
-#define SPEAR3XX_ICM3_TMR0_BASE		UL(0xFC800000)
-#define SPEAR3XX_ICM3_WDT_BASE		UL(0xFC880000)
-#define SPEAR3XX_ICM3_RTC_BASE		UL(0xFC900000)
-#define SPEAR3XX_ICM3_GPIO_BASE		UL(0xFC980000)
 #define SPEAR3XX_ICM3_SYS_CTRL_BASE	UL(0xFCA00000)
 #define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE	(VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE)
 #define SPEAR3XX_ICM3_MISC_REG_BASE	UL(0xFCA80000)
 #define VA_SPEAR3XX_ICM3_MISC_REG_BASE	(VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE)
-#define SPEAR3XX_ICM3_TMR1_BASE		UL(0xFCB00000)
 
 /* Debug uart for linux, will be used for debug and uncompress messages */
 #define SPEAR_DBG_UART_BASE		SPEAR3XX_ICM1_UART_BASE
arch/arm/mach-spear3xx/include/mach/spear300.h deleted +0 -54

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arch/arm/mach-spear3xx/include/mach/spear310.h deleted +0 -58

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arch/arm/mach-spear3xx/include/mach/spear320.h deleted +0 -67

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arch/arm/mach-spear3xx/spear300.c +40 -1

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arch/arm/mach-spear3xx/spear310.c +61 -1

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arch/arm/mach-spear3xx/spear320.c +61 -1

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arch/arm/mach-spear3xx/spear3xx.c +2 -2
index 17d4ac9..434ae47 100644
@@ -20,8 +20,8 @@
 #include <asm/hardware/pl080.h>
 #include <asm/hardware/vic.h>
 #include <plat/pl080.h>
+#include <mach/spear.h>
 #include <mach/generic.h>
-#include <mach/hardware.h>
 
 /* pad multiplexing support */
 /* devices */

@@ -534,7 +534,7 @@ static void __init spear3xx_timer_init(void)
 	clk_put(gpt_clk);
 	clk_put(pclk);
 
-	spear_setup_timer();
+	spear_setup_timer(SPEAR3XX_CPU_TMR_BASE, SPEAR3XX_IRQ_CPU_GPT1_1);
 }
 
 struct sys_timer spear3xx_timer = {
arch/arm/mach-spear6xx/clock.c +154 -0

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arch/arm/mach-spear6xx/include/mach/generic.h +2 -27
index 116b993..7167fd3 100644
@@ -15,34 +15,9 @@
 #define __MACH_GENERIC_H
 
 #include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/amba/bus.h>
-#include <asm/mach/time.h>
-#include <asm/mach/map.h>
-
-/*
- * Each GPT has 2 timer channels
- * Following GPT channels will be used as clock source and clockevent
- */
-#define SPEAR_GPT0_BASE		SPEAR6XX_CPU_TMR_BASE
-#define SPEAR_GPT0_CHAN0_IRQ	IRQ_CPU_GPT1_1
-#define SPEAR_GPT0_CHAN1_IRQ	IRQ_CPU_GPT1_2
-
-/* Add spear6xx family device structure declarations here */
-extern struct amba_device gpio_device[];
-extern struct amba_device uart_device[];
-extern struct sys_timer spear6xx_timer;
-
-/* Add spear6xx family function declarations here */
-void __init spear_setup_timer(void);
-void __init spear6xx_map_io(void);
-void __init spear6xx_init_irq(void);
-void __init spear6xx_init(void);
-void __init spear600_init(void);
-void __init spear6xx_clk_init(void);
 
+void __init spear_setup_timer(resource_size_t base, int irq);
 void spear_restart(char, const char *);
-
-/* Add spear600 machine device structure declarations here */
+void __init spear6xx_clk_init(void);
 
 #endif /* __MACH_GENERIC_H */
arch/arm/mach-spear6xx/include/mach/hardware.h +1 -23
index 0b3f96a..40a8c17 100644
@@ -1,23 +1 @@
-/*
- * arch/arm/mach-spear6xx/include/mach/hardware.h
- *
- * Hardware definitions for SPEAr6xx machine family
- *
- * Copyright (C) 2009 ST Microelectronics
- * Rajeev Kumar<[email protected]>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_HARDWARE_H
-#define __MACH_HARDWARE_H
-
-#include <plat/hardware.h>
-#include <mach/spear.h>
-
-/* Vitual to physical translation of statically mapped space */
-#define IO_ADDRESS(x)		(x | 0xF0000000)
-
-#endif /* __MACH_HARDWARE_H */
+/* empty */
arch/arm/mach-spear6xx/include/mach/irqs.h +3 -72

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arch/arm/mach-spear6xx/include/mach/misc_regs.h +0 -154

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arch/arm/mach-spear6xx/include/mach/spear.h +6 -49

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arch/arm/mach-spear6xx/include/mach/spear600.h deleted +0 -21
deleted file mode 100644
index c068cc5..0000000
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-spear66xx/include/mach/spear600.h
- *
- * SPEAr600 Machine specific definition
- *
- * Copyright (C) 2009 ST Microelectronics
- * Viresh Kumar<[email protected]>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifdef	CONFIG_MACH_SPEAR600
-
-#ifndef __MACH_SPEAR600_H
-#define __MACH_SPEAR600_H
-
-#endif /* __MACH_SPEAR600_H */
-
-#endif /* CONFIG_MACH_SPEAR600 */
arch/arm/mach-spear6xx/spear6xx.c +25 -24

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arch/arm/plat-spear/include/plat/debug-macro.S +1 -1
index 02b160a..ab3de72 100644
@@ -12,7 +12,7 @@
  */
 
 #include <linux/amba/serial.h>
-#include <mach/hardware.h>
+#include <mach/spear.h>
 
 		.macro	addruart, rp, rv, tmp
 		mov	\rp, #SPEAR_DBG_UART_BASE		@ Physical base
arch/arm/plat-spear/include/plat/hardware.h deleted +0 -17
deleted file mode 100644
index 70187d7..0000000
@@ -1,17 +0,0 @@
-/*
- * arch/arm/plat-spear/include/plat/hardware.h
- *
- * Hardware definitions for SPEAr
- *
- * Copyright (C) 2010 ST Microelectronics
- * Viresh Kumar<[email protected]>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __PLAT_HARDWARE_H
-#define __PLAT_HARDWARE_H
-
-#endif /* __PLAT_HARDWARE_H */
arch/arm/plat-spear/include/plat/uncompress.h +1 -1
index 1bf8452..6dd455b 100644
@@ -13,7 +13,7 @@
 
 #include <linux/io.h>
 #include <linux/amba/serial.h>
-#include <mach/hardware.h>
+#include <mach/spear.h>
 
 #ifndef __PLAT_UNCOMPRESS_H
 #define __PLAT_UNCOMPRESS_H
arch/arm/plat-spear/pl080.c +1 -0
index d53d75e..a56a067 100644
@@ -17,6 +17,7 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/spinlock_types.h>
+#include <mach/spear.h>
 #include <mach/misc_regs.h>
 
 static spinlock_t lock = __SPIN_LOCK_UNLOCKED(x);
arch/arm/plat-spear/restart.c +1 -1
index 16f203e..4471a23 100644
@@ -13,7 +13,7 @@
 #include <linux/io.h>
 #include <asm/system_misc.h>
 #include <asm/hardware/sp810.h>
-#include <mach/hardware.h>
+#include <mach/spear.h>
 #include <mach/generic.h>
 
 void spear_restart(char mode, const char *cmd)
arch/arm/plat-spear/time.c +8 -9
index abb5bde..a3164d1 100644
@@ -15,14 +15,13 @@
 #include <linux/err.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/ioport.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/time.h>
 #include <linux/irq.h>
 #include <asm/mach/time.h>
 #include <mach/generic.h>
-#include <mach/hardware.h>
-#include <mach/irqs.h>
 
 /*
  * We would use TIMER0 and TIMER1 as clockevent and clocksource.

@@ -175,7 +174,7 @@ static struct irqaction spear_timer_irq = {
 	.handler = spear_timer_interrupt
 };
 
-static void __init spear_clockevent_init(void)
+static void __init spear_clockevent_init(int irq)
 {
 	u32 tick_rate;
 

@@ -195,19 +194,19 @@ static void __init spear_clockevent_init(void)
 
 	clockevents_register_device(&clkevt);
 
-	setup_irq(SPEAR_GPT0_CHAN0_IRQ, &spear_timer_irq);
+	setup_irq(irq, &spear_timer_irq);
 }
 
-void __init spear_setup_timer(void)
+void __init spear_setup_timer(resource_size_t base, int irq)
 {
 	int ret;
 
-	if (!request_mem_region(SPEAR_GPT0_BASE, SZ_1K, "gpt0")) {
+	if (!request_mem_region(base, SZ_1K, "gpt0")) {
 		pr_err("%s:cannot get IO addr\n", __func__);
 		return;
 	}
 
-	gpt_base = (void __iomem *)ioremap(SPEAR_GPT0_BASE, SZ_1K);
+	gpt_base = ioremap(base, SZ_1K);
 	if (!gpt_base) {
 		pr_err("%s:ioremap failed for gpt\n", __func__);
 		goto err_mem;

@@ -225,7 +224,7 @@ void __init spear_setup_timer(void)
 		goto err_clk;
 	}
 
-	spear_clockevent_init();
+	spear_clockevent_init(irq);
 	spear_clocksource_init();
 
 	return;

@@ -235,5 +234,5 @@ err_clk:
 err_iomap:
 	iounmap(gpt_base);
 err_mem:
-	release_mem_region(SPEAR_GPT0_BASE, SZ_1K);
+	release_mem_region(base, SZ_1K);
 }
author
#13 lore raw
Quoted 23 lines · Arnd Bergmann

Hi Viresh,

I've played around with spear myself, based on your patches. Please consider adding this patch, or a variation of it.

8<---
ARM: spear: remove most mach/*.h header contents

The register and irq definitions in mach/*.h for spear3xx and spear6xx are now mostly obsolete, after the platforms have been converted to device tree based probing and the data is now part of the device tree files.

The misc_regs.h contents are moved into clock.c because that is the only user, aside from the DMA_CHN_CFG that should eventually get handled differently. Some of the contents of mach/spear.h still remain, because they are used to set up the static map table, timer, uart and auxdata tables, but almost everything got removed. We might remove everything but the map table as the DT conversion completes, but that is not a priority. I've also made sure to make both copies of spear.h more or less identical so we can eventually combine them.

Quoted 5 lines

The spear3?0.h files were only used by the spear3?0.c files, so I merged the contents in there and removed the bits that were unused. This is something that should still be looked at.

Signed-off-by Arnd Bergmann <[email protected]>

Thanks Arnd for this.

I have applied it in my local branch with minor fixes. I will add this to my pull branch: spear-dt, once i get Acks by linus for pinctrl stuff.

This branch will contain following:
- SPEAr3xx DT patches
- SPEAr Pinctrl Patches (with Acks from Linus)
- Your rework patch.

Will send you pull request again, as soon i as get feedback on pinctrl stuff.

Signature · 1 line
viresh