Skip to contentSkip to conversation

i.MX6: arm2: Add AXI cache and Qos setting

PATCH New Dirk Behme 3 participants 4 messages Apr 13, 2012 – Apr 16, 2012 Arm i.MX and Layerscape

lore
Share & tools
lore

Dirk Behme

author
#0 lore raw

PATCH 1/1 i.MX6: arm2: Add AXI cache and Qos setting

Do the same AXI cache and Qos settings done already in the SabreLite imximage.cfg for the ARM2 board, too.

It fixes a display flash issue caused by low priority of the display IDMA channel.

Signed-off-by Dirk Behme <[email protected]>
CC Jason Chen <[email protected]>
CC Jason Liu <[email protected]>
CC Stefano Babic <[email protected]>
CC Fabio Estevam <[email protected]>
---
 board/freescale/mx6qarm2/imximage.cfg |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)
board/freescale/mx6qarm2/imximage.cfg +6 -0
index 5f0ee0d..ceecbf9 100644
@@ -165,3 +165,9 @@ DATA 4 0x020c4074 0x3FF00000
 DATA 4 0x020c4078 0x00FFF300
 DATA 4 0x020c407c 0x0F0000C3
 DATA 4 0x020c4080 0x000003FF
+
+# enable AXI cache for VDOA/VPU/IPU
+DATA 4 0x020e0010 0xF00000FF
+# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7
+DATA 4 0x020e0018 0x007F007F
+DATA 4 0x020e001c 0x007F007F
Signature · 1 line
1.7.0.4
#1 lore raw

PATCH 1/1 i.MX6: arm2: Add AXI cache and Qos setting

Quoted 29 lines

-----Original Message-----
From: Dirk Behme [mailto:dirk.behme at de.bosch.com]
Sent: Friday, April 13, 2012 2:46 PM
To: u-boot at lists.denx.de
Cc: Dirk Behme; Jason Chen; Liu Hui-R64343; Stefano Babic; Fabio Estevam
Subject: [PATCH] i.MX6: arm2: Add AXI cache and Qos setting

Do the same AXI cache and Qos settings done already in the SabreLite imximage.cfg for the ARM2 board, too.

It fixes a display flash issue caused by low priority of the display IDMA channel.

Signed-off-by Dirk Behme <[email protected]>
CC Jason Chen <[email protected]>
CC Jason Liu <[email protected]>
CC Stefano Babic <[email protected]>
CC Fabio Estevam <[email protected]>

---
board/freescale/mx6qarm2/imximage.cfg | 6 ++++++

1 files changed, 6 insertions(+), 0 deletions(-)
board/freescale/mx6qarm2/imximage.cfg +0 -0
index 5f0ee0d..ceecbf9 100644
@@ -165,3 +165,9 @@ DATA 4 0x020c4074 0x3FF00000  DATA 4 0x020c4078

0x00FFF300 DATA 4 0x020c407c 0x0F0000C3 DATA 4 0x020c4080 0x000003FF

board/freescale/mx6qarm2/imximage.cfg DATA 4 0x020c4074 0x3FF00000

Quoted 5 lines
board/freescale/mx6qarm2/imximage.cfg +5 -0
+
+# enable AXI cache for VDOA/VPU/IPU
+DATA 4 0x020e0010 0xF00000FF
+# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 DATA 4 0x020e0018
+0x007F007F DATA 4 0x020e001c 0x007F007F
Acked-by Jason Liu <[email protected]>
Quoted 3 lines

--
1.7.0.4

#2 lore raw

PATCH 1/1 i.MX6: arm2: Add AXI cache and Qos setting

Quoted 22 lines · On 13/04/2012 09:10, Liu Hui-R64343 wrote:
Quoted 22 lines

-----Original Message-----
From: Dirk Behme [mailto:dirk.behme at de.bosch.com]
Sent: Friday, April 13, 2012 2:46 PM
To: u-boot at lists.denx.de
Cc: Dirk Behme; Jason Chen; Liu Hui-R64343; Stefano Babic; Fabio Estevam
Subject: [PATCH] i.MX6: arm2: Add AXI cache and Qos setting

Do the same AXI cache and Qos settings done already in the SabreLite imximage.cfg for the ARM2 board, too.

It fixes a display flash issue caused by low priority of the display IDMA channel.

Signed-off-by Dirk Behme <[email protected]>
CC Jason Chen <[email protected]>
CC Jason Liu <[email protected]>
CC Stefano Babic <[email protected]>
CC Fabio Estevam <[email protected]>

---
board/freescale/mx6qarm2/imximage.cfg | 6 ++++++

1 files changed, 6 insertions(+), 0 deletions(-)
Quoted 15 lines

board/freescale/mx6qarm2/imximage.cfg DATA 4 0x020c4074 0x3FF00000

Quoted 12 lines
board/freescale/mx6qarm2/imximage.cfg +0 -0
index 5f0ee0d..ceecbf9 100644
@@ -165,3 +165,9 @@ DATA 4 0x020c4074 0x3FF00000  DATA 4 0x020c4078

0x00FFF300 DATA 4 0x020c407c 0x0F0000C3 DATA 4 0x020c4080 0x000003FF

board/freescale/mx6qarm2/imximage.cfg +5 -0
+
+# enable AXI cache for VDOA/VPU/IPU
+DATA 4 0x020e0010 0xF00000FF
+# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 DATA 4 0x020e0018
+0x007F007F DATA 4 0x020e001c 0x007F007F
Acked-by Jason Liu <[email protected]>

Thanks all - this is a fix, I will try to push it for the release.

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
#3 lore raw

PATCH 1/1 i.MX6: arm2: Add AXI cache and Qos setting

In reply to Dirk Behme
Quoted 6 lines · Dirk Behme

Do the same AXI cache and Qos settings done already in the SabreLite imximage.cfg for the ARM2 board, too.

It fixes a display flash issue caused by low priority of the display IDMA channel.

Quoted 6 lines
Signed-off-by Dirk Behme <[email protected]>
CC Jason Chen <[email protected]>
CC Jason Liu <[email protected]>
CC Stefano Babic <[email protected]>
CC Fabio Estevam <[email protected]>

---

Applied to u-boot-imx (fix), thanks.

Best regards,
Stefano Babic

Signature · 5 lines
=====================================================================
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================