i.MX25: Miscellaneus fixes
Subsystems (10)
cover i.MX25: Miscellaneus fixes
These are the fixes I needed to do to get my board going.
[PATCH 1/8] i.MX25: add mxc_get_clock infrastructure
SD-controller (fsl_esdhc.c) needs a clock frequency in gd->sdhc_clk. I tried to follow the idea of other architectures.
[PATCH 2/8] i.MX: Add target flashable to offset 0
Helps flashing with openocd
[PATCH 4/8] i.MX25: Has a GPIO4 too
GPIO4 is used in our board
[PATCH 5/8] MXC FEC: Resolve speed before configuring gasket
Without this 10BaseT doesn't work
First and second OOB bytes are used for bad block indication
USB controller in the i.MX25 has PORTSC register like the controller in i.MX31
BTW, I can't understand what is the meaning of writing into &ehci->control. I can't find such a register from reference manuals of i.MX25, 28 nor 31.
[PATCH 3/8] Build: Ignore build tree and IDE control file [PATCH 6/8] i.MX25: Add Exertus EXE4026 board
Maybe these does not belong into this series but I didn't know how to exclude them from this series.
PATCH 1/8 i.MX25: add mxc_get_clock infrastructure
--- arch/arm/cpu/arm926ejs/mx25/generic.c | 27 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx25/clock.h | 23 +++++++++++++++++++++++ 2 files changed, 50 insertions(+), 0 deletions(-)
arch/arm/cpu/arm926ejs/mx25/generic.c +27 -0
@@ -28,10 +28,15 @@#include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/arch/imx25-pinmux.h> +#include <asm/arch/clock.h> #ifdef CONFIG_MXC_MMC #include <asm/arch/mxcmmc.h> #endif +#ifdef CONFIG_FSL_ESDHC +DECLARE_GLOBAL_DATA_PTR ; +#endif +/* * get the system pll clock in Hz *
@@ -105,6 +110,20 @@ ulong imx_get_perclk(int clk)return lldiv (fref, div); } +unsigned int mxc_get_clock (enum mxc_clock clk) +{ +if (clk >=MXC_CLK_NUM ) +return -1 ; +switch (clk) { +case MXC_ARM_CLK : +return imx_get_armclk (); +case MXC_FEC_CLK : +return imx_get_ahbclk (); +default : +return imx_get_perclk (clk); + } +} +u32 get_cpu_rev (void ) {u32 srev;
@@ -182,6 +201,14 @@ int cpu_eth_init(bd_t *bis)#endif } +int get_clocks (void ) +{ +#ifdef CONFIG_FSL_ESDHC + gd->sdhc_clk =mxc_get_clock (MXC_ESDHC_CLK ); +#endif +return 0 ; +} +/* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init()
arch/arm/include/asm/arch-mx25/clock.h +23 -0
@@ -26,11 +26,34 @@#ifndef __ASM_ARCH_CLOCK_H#define __ASM_ARCH_CLOCK_H +enum mxc_clock { +MXC_CSI_CLK , +MXC_EPIT_CLK , +MXC_ESAI_CLK , +MXC_ESDHC1_CLK , +MXC_ESDHC2_CLK , +MXC_GPT_CLK , +MXC_I2C_CLK , +MXC_LCDC_CLK , +MXC_NFC_CLK , +MXC_OWIRE_CLK , +MXC_PWM_CLK , +MXC_SIM1_CLK , +MXC_SIM2_CLK , +MXC_SSI1_CLK , +MXC_SSI2_CLK , +MXC_UART_CLK , +MXC_ARM_CLK , +MXC_FEC_CLK , +MXC_CLK_NUM +}; +ulong imx_get_perclk (int clk);ulong imx_get_ahbclk (void );#define imx_get_uartclk () imx_get_perclk(15)#define imx_get_fecclk () (imx_get_ahbclk()/2) +unsigned int mxc_get_clock (enum mxc_clock clk);#endif /* __ASM_ARCH_CLOCK_H */
Signature · 1 line
1.7.5.4
PATCH 2/8 i.MX: Add target flashable to offset 0
In reply to Timo Ketola.imx image directly from mkimage must be flashed at offset 0x400 into the nand. Thats a little hard with e.g. openocd.
--- Makefile | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)
Makefile +3 -0
@@ -410,6 +410,9 @@ $(obj)u-boot.imx: $(obj)u-boot.bin $(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \ -e $(CONFIG_SYS_TEXT_BASE) -d $< $@ +$(obj)u-boot-nand.imx: $(obj)u-boot.imx + dd if=$< of=$@ seek=2 + $(obj)u-boot.kwb: $(obj)u-boot.bin $(obj)tools/mkimage -n $(CONFIG_SYS_KWD_CONFIG) -T kwbimage \ -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) -d $< $@
Signature · 1 line
1.7.5.4
PATCH v3 2/8 i.MX: Add target flashable to offset 0
Quoted 4 lines · Timo Ketola
.imx image directly from mkimage must be flashed at offset
0x400into the nand. Thats a little hard with e.g. openocd.Signed-off-by Timo Ketola <[email protected]>---
Hi Timo,
Quoted 8 lines
Makefile | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)Makefile +0
-0
Makefile $(obj)u-boot.imx: $(obj)u-boot.bin · line 415
Quoted 6 lines
Makefile +3
-0@@ -410,6 +410,9 @@ $(obj)u-boot.imx: $(obj)u-boot.bin $(obj)tools/mkimage -n $(CONFIG_IMX_CONFIG) -T imximage \ -e $(CONFIG_SYS_TEXT_BASE) -d $< $@ +$(obj)u-boot-nand.imx: $(obj)u-boot.imx + dd if=$< of=$@ seek=2 +
I wonder why we need this in u-boot code and to set this rule in the main Makefile. You can always do this after generating u-boot.
The rules here are to generate the u-boot.imx. Then the same image can be stored at different addresses. Depending on the i.MX SOC, ofssets can be different (MX5 / MX6 have different offsets for NOR / NAND / oneNAND).
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 2/8 i.MX: Add target flashable to offset 0
Quoted 7 lines · Stefano Babic
Makefile $(obj)u-boot.imx: $(obj)u-boot.bin · line 415
Quoted 3 lines · Timo Ketola
+$(obj)u-boot-nand.imx: $(obj)u-boot.imx
Makefile +2
-0+ dd if=$< of=$@ seek=2 +I wonder why we need this in u-boot code and to set this rule in the main
Makefile. You can always do this after generating u-boot.
Older U-Boot (from FreeScale) made an .imx image with 1KB padding which I could flash directly into the NAND at offset 0. Now I had to do manually that dd-magic (before I put it in Makefile) because openocd doesn't allow to flash at offset 0x400 (it demands write-page alignment).
Quoted 3 lines
The rules here are to generate the u-boot.imx. Then the same image can be stored at different addresses. Depending on the i.MX SOC, ofssets can be different (MX5 / MX6 have different offsets for NOR / NAND / oneNAND).
I prefer a build system which generates an image ready for flashing but perhaps I have to do that outside of U-Boot, somehow.
--
Timo
PATCH 3/8 Build: Ignore build tree and IDE control file
In reply to Timo Ketola--- .gitignore | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
.gitignore +4 -0
@@ -15,6 +15,9 @@ *.patch *.bin +# Build tree +/build-* + # # Top-level generic files #
@@ -38,6 +41,7 @@ /u-boot.ais /u-boot.dtb /u-boot.sb +/u-boot.geany # # Generated files
Signature · 1 line
1.7.5.4
PATCH v3 3/8 Build: Ignore build tree and IDE control file
Quoted 2 lines · Timo Ketola
Signed-off-by Timo Ketola <[email protected]>---
Hi Timo,
Quoted 1 line
+/u-boot.geany
What is this ? I do not find any occurency in u-boot tree.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 3/8 Build: Ignore build tree and IDE control file
Quoted 3 lines · Stefano Babic
Quoted 1 line
+/u-boot.geany
What is this ? I do not find any occurency in u-boot tree.
It is my IDE control file. I didn't want to publish this patch at all but I have still a lot of learning about git.
--
Timo
PATCH v3 3/8 Build: Ignore build tree and IDE control file
Quoted 7 lines · Timo Ketola
Quoted 3 lines · Stefano Babic
Quoted 1 line
+/u-boot.geany
What is this ? I do not find any occurency in u-boot tree.
It is my IDE control file. I didn't want to publish this patch at all but I have still a lot of learning about git.
Ah, ok, do not worry. I wondered what it could be.
Can be helpful for you to define your global .gitignore file for your own setup ?
You could add a ~/.gitignore with:
/build-*
/uboot.gean
and then in u-boot tree you can issue the command:
$ git config --global core.excludesfile ~/.gitignore
Then all files defined in your global setting are excluded.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 3/8 Build: Ignore build tree and IDE control file
Quoted 1 line · Stefano Babic
Can be helpful for you to define your global .gitignore ...
OK, thanks for that tip!
--
Timo
PATCH 3/8 Build: Ignore build tree and IDE control file
In reply to Timo KetolaDear "Timo Ketola",
Quoted 20 lines · In message <[email protected]> you wrote:
Signed-off-by Timo Ketola <[email protected]>--- .gitignore | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-).gitignore +3
-0@@ -15,6 +15,9 @@ *.patch *.bin +# Build tree +/build-* + # # Top-level generic files #
.gitignore line 44
Quoted 4 lines
.gitignore +1
-0@@ -38,6 +41,7 @@ /u-boot.ais /u-boot.dtb /u-boot.sb +/u-boot.geany
What the heck is u-boot.geany ? I cannot see anything like this in mainline.
Best regards,
Wolfgang Denk
Signature · 5 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de In accord with UNIX philosophy, Perl gives you enough rope to hang yourself. - L. Wall & R. L. Schwartz, _Programming Perl_
PATCH 3/8 Build: Ignore build tree and IDE control file
Quoted 9 lines · Wolfgang Denk
Dear "Timo Ketola",
Quoted 6 lines · In message <[email protected]> you wrote:
Signed-off-by Timo Ketola <[email protected]>--- .gitignore | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-).gitignore +0
-0
...
Quoted 4 lines
Quoted 1 line
+/u-boot.geany
What the heck is u-boot.geany ? I cannot see anything like this in mainline.
It is the control file of my IDE (Geany). This patch was dropped long time ago.
--
Timo
PATCH 4/8 i.MX25: Has a GPIO4 too
In reply to Timo Ketola--- drivers/gpio/mxc_gpio.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/gpio/mxc_gpio.c +1 -1
@@ -40,7 +40,7 @@ static unsigned long gpio_ports[] = { [0] = GPIO1_BASE_ADDR, [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, -#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q ) +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q ) [3] = GPIO4_BASE_ADDR,#endif #if defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q )
Signature · 1 line
1.7.5.4
PATCH v3 4/8 i.MX25: Has a GPIO4 too
Quoted 10 lines · Timo Ketola
Signed-off-by Timo Ketola <[email protected]>--- drivers/gpio/mxc_gpio.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)drivers/gpio/mxc_gpio.c +0
-0
drivers/gpio/mxc_gpio.c static unsigned long gpio_ports[] = { · line 46
Quoted 8 lines
drivers/gpio/mxc_gpio.c +1
-1@@ -40,7 +40,7 @@ static unsigned long gpio_ports[] = { [0] = GPIO1_BASE_ADDR, [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, -#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q ) +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q ) [3] = GPIO4_BASE_ADDR,#endif #if defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q )
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 4/8 i.MX25: Has a GPIO4 too
In reply to Timo KetolaDear "Timo Ketola",
Quoted 10 lines · In message <[email protected]> you wrote:
Signed-off-by Timo Ketola <[email protected]>--- drivers/gpio/mxc_gpio.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)drivers/gpio/mxc_gpio.c +0
-0
drivers/gpio/mxc_gpio.c static unsigned long gpio_ports[] = { · line 43
Quoted 5 lines
drivers/gpio/mxc_gpio.c +1
-1@@ -40,7 +40,7 @@ static unsigned long gpio_ports[] = { [0] = GPIO1_BASE_ADDR, [1] = GPIO2_BASE_ADDR, [2 ] =GPIO3_BASE_ADDR , -#if defined(CONFIG_MX51) || defined(CONFIG_MX53) || defined(CONFIG_MX6Q) +#if defined(CONFIG_MX25) || defined(CONFIG_MX51) || defined(CONFIG_MX53) || defined(CONFIG_MX6Q)
line over 80 characters
Please make sure to run your patches through checkpatch !
Best regards,
Wolfgang Denk
Signature · 4 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de On a clear disk you can seek forever.
PATCH 4/8 i.MX25: Has a GPIO4 too
Quoted 1 line · Wolfgang Denk
Please make sure to run your patches through checkpatch !
Sorry about that.
Now I could use some help about how to best edit my commits...
--
Timo
PATCH 4/8 i.MX25: Has a GPIO4 too
Hi Timo,
Quoted 6 lines · Wolfgang Denk
Quoted 1 line
Please make sure to run your patches through checkpatch !
Sorry about that.
Now I could use some help about how to best edit my commits...
What works very nicely for me is to do the changes, do "git add" on them and then do a
COMMIT=<commit> ; git commit --squash=$COMMIT ; git rebase -i --autosquash ${COMMIT}^
(substitute <commit> with the commit-ID of the commit in question). In the editor you can decide to add more to the messages, or simply leave them as is.
I'm sure you will find the details on how this works and why in the manual ;)
Cheers
Detlev
Signature · 6 lines
Some mathematicians become so tense these days that they do not go to sleep during seminars. -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: dzu at denx.de
PATCH 4/8 i.MX25: Has a GPIO4 too
Quoted 4 lines · Detlev Zundel
What works very nicely for me is to do the changes, do "git add" on them and then do a
COMMIT=<commit> ; git commit --squash=$COMMIT ; git rebase -i --autosquash ${COMMIT}^
Thanks - thats the kind of handholding I'm missing...
--
Timo
PATCH 5/8 MXC FEC: Resolve speed before configuring gasket
In reply to Timo Ketola--- drivers/net/fec_mxc.c | 41 ++++++++++++++++++++++------------------- 1 files changed, 22 insertions(+), 19 deletions(-)
drivers/net/fec_mxc.c +22 -19
@@ -406,6 +406,22 @@ static int fec_open(struct eth_device *edev)*/ writel (readl (&fec->eth->ecntrl) |FEC_ECNTRL_ETHER_EN , &fec->eth->ecntrl); +#ifdef CONFIG_PHYLIB +if (!fec->phydev) +fec_eth_phy_config (edev); +if (fec->phydev) { +/* Start up the PHY */ +phy_startup (fec->phydev); + speed = fec->phydev->speed; + }else { + speed = _100BASET; + } +#else +miiphy_wait_aneg (edev); + speed =miiphy_speed (edev->name, fec->phy_id); +// FIXME: useless call: miiphy_duplex(edev->name, fec->phy_id); +#endif +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX53 )udelay (100 );/*
@@ -418,9 +434,12 @@ static int fec_open(struct eth_device *edev)/* wait for the gasket to be disabled */ while (readw (&fec->eth->miigsk_enr) &MIIGSK_ENR_READY )udelay (2 ); - -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII , &fec->eth->miigsk_cfgr); +if (speed == _100BASET) +/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII , &fec->eth->miigsk_cfgr); +else +/* configure gasket for RMII, 5 MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII |MIIGSK_CFGR_FRCONT , &fec->eth->miigsk_cfgr);/* re-enable the gasket */ writew (MIIGSK_ENR_EN , &fec->eth->miigsk_enr);
@@ -435,22 +454,6 @@ static int fec_open(struct eth_device *edev) }#endif -#ifdef CONFIG_PHYLIB -if (!fec->phydev) -fec_eth_phy_config (edev); -if (fec->phydev) { -/* Start up the PHY */ -phy_startup (fec->phydev); - speed = fec->phydev->speed; - }else { - speed = _100BASET; - } -#else -miiphy_wait_aneg (edev); - speed =miiphy_speed (edev->name, fec->phy_id); -miiphy_duplex (edev->name, fec->phy_id); -#endif -#ifdef FEC_QUIRK_ENET_MAC {u32 ecr =readl (&fec->eth->ecntrl) & ~FEC_ECNTRL_SPEED ;
Signature · 1 line
1.7.5.4
PATCH v3 5/8 MXC FEC: Resolve speed before configuring gasket
Quoted 2 lines · Timo Ketola
Signed-off-by Timo Ketola <[email protected]>---
Hi Timo,
drivers/net/fec_mxc.c
Quoted 7 lines
drivers/net/fec_mxc.c | 41 ++++++++++++++++++++++------------------- 1 files changed, 22 insertions(+), 19 deletions(-)drivers/net/fec_mxc.c +0
-0
Please consider to rebase your patch on u-boot-imx, next branch. There are already a couple of patches related to gasket and MII.
Quoted 8 lines
drivers/net/fec_mxc.c +4
-0@@ -406,6 +406,22 @@ static int fec_open(struct eth_device *edev)*/ writel (readl (&fec->eth->ecntrl) |FEC_ECNTRL_ETHER_EN , &fec->eth->ecntrl); +#ifdef CONFIG_PHYLIB +if (!fec->phydev) +fec_eth_phy_config (edev); +if (fec->phydev) {
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 422
Quoted 10 lines
drivers/net/fec_mxc.c +10
-0+/* Start up the PHY */ +phy_startup (fec->phydev); + speed = fec->phydev->speed; + }else { + speed = _100BASET; + } +#else +miiphy_wait_aneg (edev); + speed =miiphy_speed (edev->name, fec->phy_id); +// FIXME: useless call: miiphy_duplex(edev->name, fec->phy_id);
This is dead code. // comments are not allowed, comment should be real comments, not used to disable code. Why are you disabling ? Please explain the reason and, if it is required, provide a separate patch for this.
Quoted 8 lines
drivers/net/fec_mxc.c +2
-0+#endif +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX53 )udelay (100 );/* @@ -418,9 +434,12 @@ static int fec_open(struct eth_device *edev)/* wait for the gasket to be disabled */ while (readw (&fec->eth->miigsk_enr) &MIIGSK_ENR_READY )
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 442
Quoted 10 lines
drivers/net/fec_mxc.c +6
-3udelay (2 ); - -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII , &fec->eth->miigsk_cfgr); +if (speed == _100BASET) +/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII , &fec->eth->miigsk_cfgr); +else +/* configure gasket for RMII, 5 MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII |MIIGSK_CFGR_FRCONT , &fec->eth->miigsk_cfgr);
Right, this is correct for 10Mhz Ethernet.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 5/8 MXC FEC: Resolve speed before configuring gasket
Quoted 8 lines · Stefano Babic
drivers/net/fec_mxc.c
Quoted 4 lines · Timo Ketola
Signed-off-by Timo Ketola<[email protected]>drivers/net/fec_mxc.c +0
-0Please consider to rebase your patch on u-boot-imx, next branch. There are already a couple of patches related to gasket and MII.
u-boot-imx is separate repository, right? So I have to clone that and apply my patches manually, right?
Quoted 6 lines
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 422
Quoted 1 line
drivers/net/fec_mxc.c +1
-0+// FIXME: useless call: miiphy_duplex(edev->name, fec->phy_id); This is dead code. // comments are not allowed, comment should be real comments, not used to disable code. Why are you disabling ? Please explain the reason and, if it is required, provide a separate patch for this.
Return value is discarded and I didn't find any side effects. So it seems to be dead call. If agreed, then I'll edit the patch.
--
Timo
PATCH v3 5/8 MXC FEC: Resolve speed before configuring gasket
Quoted 11 lines · Timo Ketola
Quoted 8 lines · Stefano Babic
drivers/net/fec_mxc.c
Quoted 4 lines · Timo Ketola
Signed-off-by Timo Ketola<[email protected]>drivers/net/fec_mxc.c +0
-0Please consider to rebase your patch on u-boot-imx, next branch. There are already a couple of patches related to gasket and MII.
u-boot-imx is separate repository, right?
Right.
Quoted 2 lines
So I have to clone that and
apply my patches manually, right?
Yes, and maybe you should rebase some of them. Because we are very near to the release, I put new patches into the -next branch.
Quoted 10 lines
Quoted 7 lines
Quoted 2 lines
+ // FIXME: useless call:
miiphy_duplex(edev->name, fec->phy_id);This is dead code. // comments are not allowed, comment should be real comments, not used to disable code. Why are you disabling ? Please explain the reason and, if it is required, provide a separate patch for this.
Return value is discarded and I didn't find any side effects. So it seems to be dead call. If agreed, then I'll edit the patch.
Return value is discharged, but I presume the function is called to print out the status. The function itself printf "PHY duplex" or "PHY AN duplex", that you drop if you remove the call.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 5/8 MXC FEC: Resolve speed before configuring gasket
In reply to Timo KetolaDear "Timo Ketola",
Quoted 4 lines · In message <[email protected]> you wrote:
Signed-off-by Timo Ketola <[email protected]>--- drivers/net/fec_mxc.c | 41 ++++++++++++++++++++++------------------- 1 files changed, 22 insertions(+), 19 deletions(-)
...
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 422
Quoted 1 line
drivers/net/fec_mxc.c +1
-0+// FIXME: useless call: miiphy_duplex(edev->name, fec->phy_id);
ERROR: do not use C99 // comments
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 438
Quoted 1 line
drivers/net/fec_mxc.c +1
-0+/* configure gasket for RMII, 50 MHz, no loopback, and no echo */
WARNING: line over 80 characters
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 442
Quoted 4 lines
drivers/net/fec_mxc.c +4
-0+writew (MIIGSK_CFGR_IF_MODE_RMII , &fec->eth->miigsk_cfgr); + else +/* configure gasket for RMII, 5 MHz, no loopback, and no echo */ + writew(MIIGSK_CFGR_IF_MODE_RMII | MIIGSK_CFGR_FRCONT, &fec->eth->miigsk_cfgr);
WARNING: line over 80 characters
Best regards,
Wolfgang Denk
Signature · 5 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de "Beware of bugs in the above code; I have only proved it correct, not tried it." - Donald Knuth
PATCH 5/8 MXC FEC: Resolve speed before configuring gasket
In reply to Timo KetolaQuoted 36 lines · Timo Ketola
Signed-off-by Timo Ketola<[email protected]>--- drivers/net/fec_mxc.c | 41 ++++++++++++++++++++++------------------- 1 files changed, 22 insertions(+), 19 deletions(-)drivers/net/fec_mxc.c +16
-0@@ -406,6 +406,22 @@ static int fec_open(struct eth_device *edev)*/ writel (readl (&fec->eth->ecntrl) |FEC_ECNTRL_ETHER_EN , &fec->eth->ecntrl); +#ifdef CONFIG_PHYLIB +if (!fec->phydev) +fec_eth_phy_config (edev); +if (fec->phydev) { +/* Start up the PHY */ +phy_startup (fec->phydev); + speed = fec->phydev->speed; + }else { + speed = _100BASET; + } +#else +miiphy_wait_aneg (edev); + speed =miiphy_speed (edev->name, fec->phy_id); +// FIXME: useless call: miiphy_duplex(edev->name, fec->phy_id); +#endif +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX53 )udelay (100 );/* @@ -418,9 +434,12 @@ static int fec_open(struct eth_device *edev)/* wait for the gasket to be disabled */ while (readw (&fec->eth->miigsk_enr)&MIIGSK_ENR_READY )udelay (2 );
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 443
Quoted 10 lines
drivers/net/fec_mxc.c +6
-3- -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII ,&fec->eth->miigsk_cfgr); +if (speed == _100BASET) +/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII ,&fec->eth->miigsk_cfgr); +else +/* configure gasket for RMII, 5 MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII |MIIGSK_CFGR_FRCONT ,&fec->eth->miigsk_cfgr);
This will break gigabit speed. How about
if (speed != _10BASET)
Quoted 25 lines
drivers/net/fec_mxc.c +0
-16/* re-enable the gasket */ writew (MIIGSK_ENR_EN ,&fec->eth->miigsk_enr);@@ -435,22 +454,6 @@ static int fec_open(struct eth_device *edev) }#endif -#ifdef CONFIG_PHYLIB -if (!fec->phydev) -fec_eth_phy_config (edev); -if (fec->phydev) { -/* Start up the PHY */ -phy_startup (fec->phydev); - speed = fec->phydev->speed; - }else { - speed = _100BASET; - } -#else -miiphy_wait_aneg (edev); - speed =miiphy_speed (edev->name, fec->phy_id); -miiphy_duplex (edev->name, fec->phy_id); -#endif -#ifdef FEC_QUIRK_ENET_MAC {u32 ecr =readl (&fec->eth->ecntrl)& ~FEC_ECNTRL_SPEED ;
PATCH 5/8 MXC FEC: Resolve speed before configuring gasket
Quoted 6 lines · Troy Kisky
Quoted 2 lines · Timo Ketola
Signed-off-by Timo Ketola<[email protected]>+ if (speed ==
_100BASET)This will break gigabit speed. How about
if (speed !=
_10BASET)
Looks fine to me. I'll put it that way in v2.
--
Timo
PATCH 6/8 i.MX25: Add Exertus EXE4026 board
In reply to Timo Ketola--- boards.cfg | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
boards.cfg +1 -0
@@ -155,6 +155,7 @@ rd6281a arm arm926ejs - Marvell sheevaplug arm arm926ejs - Marvell kirkwood dockstar arm arm926ejs - Seagate kirkwood jadecpu arm arm926ejs jadecpu syteco mb86r0x +exe4026 arm arm926ejs exe4026 exertus mx25 exe4026:IMX_CONFIG=board/exertus/exe4026/imximage.cfg mx25pdk arm arm926ejs mx25pdk freescale mx25 mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg tx25 arm arm926ejs tx25 karo mx25 zmx25 arm arm926ejs zmx25 syteco mx25
Signature · 1 line
1.7.5.4
Fabio Estevam
reviewerPATCH 6/8 i.MX25: Add Exertus EXE4026 board
Hi Timo,
Quoted 4 lines · Timo Ketola
Signed-off-by Timo Ketola <[email protected]>---
?boards.cfg | ? ?1 +
?1 files changed, 1 insertions(+), 0 deletions(-)
Thanks for your contributions.
Please provide some more details in the commit message about this board, which peripherals are currently supported, where does it boot from, etc.
Please also add an entry for your board in the MAINTAINERS file.
You seem to have missed to do a "git add" for the files you introduced here ,ie, board/exertus/exe4026/ directory.
PATCH 6/8 i.MX25: Add Exertus EXE4026 board
Quoted 8 lines · Fabio Estevam
Please provide some more details in the commit message about this board, which peripherals are currently supported, where does it boot from, etc.
Please also add an entry for your board in the
MAINTAINERSfile.You seem to have missed to do a "git add" for the files you introduced here ,ie, board/exertus/exe4026/ directory.
Yes, I will, but actually I didn't want to publish my board specific files and changes just yet. I committed all those changes into my git tree but now I don't know how to exclude this one (6/8, and perhaps 3/8) from git-send-email to send a cleaner series. I don't know either how to use git-send-email to send a single patch. I'll need to learn more about git - or can you or somebody here tell me right away? Do I perhaps have to create a second branch where I merge the relevant commits?
--
Timo
PATCH v3 6/8 i.MX25: Add Exertus EXE4026 board
In reply to Timo KetolaQuoted 10 lines · Timo Ketola
Signed-off-by Timo Ketola <[email protected]>--- boards.cfg | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)boards.cfg +0
-0
boards.cfg rd6281a arm arm926ejs - Marvell · line 161
Quoted 7 lines
boards.cfg +1
-0@@ -155,6 +155,7 @@ rd6281a arm arm926ejs - Marvell sheevaplug arm arm926ejs - Marvell kirkwood dockstar arm arm926ejs - Seagate kirkwood jadecpu arm arm926ejs jadecpu syteco mb86r0x +exe4026 arm arm926ejs exe4026 exertus mx25 exe4026:IMX_CONFIG=board/exertus/exe4026/imximage.cfg mx25pdk arm arm926ejs mx25pdk freescale mx25 mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg tx25 arm arm926ejs tx25 karo mx25 zmx25 arm arm926ejs zmx25 syteco mx25
I assume you write also some code for this board. Maybe forgotten ?
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 6/8 i.MX25: Add Exertus EXE4026 board
Quoted 3 lines · Stefano Babic
Quoted 1 line
+exe4026 arm arm926ejs exe4026 exertus mx25 exe4026:IMX_CONFIG=board/exertus/exe4026/imximage.cfg
I assume you write also some code for this board. Maybe forgotten ?
Yes, later. I have hard time with git-send-email selecting exactly what I want to send.
--
Timo
PATCH v3 6/8 i.MX25: Add Exertus EXE4026 board
Quoted 5 lines · Timo Ketola
Quoted 4 lines · Stefano Babic
Quoted 3 lines
+exe4026 arm arm926ejs
exe4026 exertus mx25
exe4026:IMX_CONFIG=board/exertus/exe4026/imximage.cfg
Hi Timo,
Quoted 4 lines
Quoted 1 line
I assume you write also some code for this board. Maybe forgotten ?
Yes, later. I have hard time with git-send-email selecting exactly what I want to send.
If you don't already know, maybe this site can help:
http://www.denx.de/wiki/U-Boot/Patches
And if I understand what you are want, maybe the simple way is to add a branch and to cherry-pick (git cherry-pick) only the commit you want later send from your main branch. Then you can run "git format patch" to get the patchset.
Please also add always a changelog in your patches, so we can easy find changes from previous versions. And please help us adding in CC the maintainer of the subsystem your patch is thought to change (me for i.MX related parts).
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH 7/8 MXC NAND: Place BBT patterns into free OOB region
In reply to Timo Ketola--- drivers/mtd/nand/mxc_nand.c | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+), 0 deletions(-)
drivers/mtd/nand/mxc_nand.c +35 -0
@@ -1302,12 +1302,47 @@ static void mxc_setup_config1(void)#define mxc_setup_config1 ()#endif +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + +static u8 bbt_pattern[] = {'B' ,'b' ,'t' ,'0' }; +static u8 mirror_pattern[] = {'1' ,'t' ,'b' ,'B' }; + +static struct nand_bbt_descr bbt_main_descr = { + .options =NAND_BBT_LASTBLOCK |NAND_BBT_CREATE |NAND_BBT_WRITE | +NAND_BBT_2BIT |NAND_BBT_VERSION |NAND_BBT_PERCHIP , + .offs =2 , + .len =4 , + .veroffs =6 , + .maxblocks =4 , + .pattern = bbt_pattern, +}; + +static struct nand_bbt_descr bbt_mirror_descr = { + .options =NAND_BBT_LASTBLOCK |NAND_BBT_CREATE |NAND_BBT_WRITE | +NAND_BBT_2BIT |NAND_BBT_VERSION |NAND_BBT_PERCHIP , + .offs =2 , + .len =4 , + .veroffs =6 , + .maxblocks =4 , + .pattern = mirror_pattern, +}; + +#endif +int board_nand_init (struct nand_chip *this) {struct mtd_info *mtd;uint16_t tmp;int err =0 ; +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + + this->options =NAND_USE_FLASH_BBT ; + this->bbt_td = &bbt_main_descr; + this->bbt_md = &bbt_mirror_descr; + +#endif +/* structures must be linked */ mtd = &host->mtd; mtd->priv = this;
Signature · 1 line
1.7.5.4
PATCH 8/8 i.MX25: This model has almost the same USB-controller as i.MX31
In reply to Timo Ketola--- drivers/usb/host/ehci-mxc.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/usb/host/ehci-mxc.c +1 -1
@@ -125,7 +125,7 @@ int ehci_hcd_init(void) hcor = (struct ehci_hcor *)((uint32_t ) hccr +HC_LENGTH (ehci_readl (&hccr->cr_capbase)));setbits_le32 (&ehci->usbmode,CM_HOST ); -#ifdef CONFIG_MX31 +#if defined(CONFIG_MX31 ) || defined(CONFIG_MX25 )setbits_le32 (&ehci->control,USB_EN );__raw_writel (CONFIG_MXC_USB_PORTSC , &ehci->portsc);
Signature · 1 line
1.7.5.4
v2 cover i.MX25: Miscellaneus fixes
In reply to Timo KetolaThese are the fixes I needed to do to get my board going.
Changes in v2:
- Rebased to u-boot-imx next
- Patch 2: Fixed too long lines
- Patch 3: Try not to break Gbit ether
Changed configuration option putting gasket into RMII mode to CONFIG_RMII
I'm not too sure how this should be done. CONFIG_MII is normally used for this but its original purpose was to enable MII *management* interface, I think...
- Patch 9: Add .imx target in the spirit of commit 303838
PATCH v2 1/9 i.MX25: esdhc: Add mxc_get_clock infrastructure
Defining CONFIG_FSL_ESDHC brings in a call to get_clocks, so let's implement get_clocks function. This is how it seems to be implemented elsewhere.
--- arch/arm/cpu/arm926ejs/mx25/generic.c | 27 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx25/clock.h | 23 +++++++++++++++++++++++ 2 files changed, 50 insertions(+), 0 deletions(-)
arch/arm/cpu/arm926ejs/mx25/generic.c +27 -0
@@ -28,10 +28,15 @@#include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/arch/imx25-pinmux.h> +#include <asm/arch/clock.h> #ifdef CONFIG_MXC_MMC #include <asm/arch/mxcmmc.h> #endif +#ifdef CONFIG_FSL_ESDHC +DECLARE_GLOBAL_DATA_PTR ; +#endif +/* * get the system pll clock in Hz *
@@ -105,6 +110,20 @@ ulong imx_get_perclk(int clk)return lldiv (fref, div); } +unsigned int mxc_get_clock (enum mxc_clock clk) +{ +if (clk >=MXC_CLK_NUM ) +return -1 ; +switch (clk) { +case MXC_ARM_CLK : +return imx_get_armclk (); +case MXC_FEC_CLK : +return imx_get_ahbclk (); +default : +return imx_get_perclk (clk); + } +} +u32 get_cpu_rev (void ) {u32 srev;
@@ -182,6 +201,14 @@ int cpu_eth_init(bd_t *bis)#endif } +int get_clocks (void ) +{ +#ifdef CONFIG_FSL_ESDHC + gd->sdhc_clk =mxc_get_clock (MXC_ESDHC_CLK ); +#endif +return 0 ; +} +/* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init()
arch/arm/include/asm/arch-mx25/clock.h +23 -0
@@ -26,11 +26,34 @@#ifndef __ASM_ARCH_CLOCK_H#define __ASM_ARCH_CLOCK_H +enum mxc_clock { +MXC_CSI_CLK , +MXC_EPIT_CLK , +MXC_ESAI_CLK , +MXC_ESDHC1_CLK , +MXC_ESDHC2_CLK , +MXC_GPT_CLK , +MXC_I2C_CLK , +MXC_LCDC_CLK , +MXC_NFC_CLK , +MXC_OWIRE_CLK , +MXC_PWM_CLK , +MXC_SIM1_CLK , +MXC_SIM2_CLK , +MXC_SSI1_CLK , +MXC_SSI2_CLK , +MXC_UART_CLK , +MXC_ARM_CLK , +MXC_FEC_CLK , +MXC_CLK_NUM +}; +ulong imx_get_perclk (int clk);ulong imx_get_ahbclk (void );#define imx_get_uartclk () imx_get_perclk(15)#define imx_get_fecclk () (imx_get_ahbclk()/2) +unsigned int mxc_get_clock (enum mxc_clock clk);#endif /* __ASM_ARCH_CLOCK_H */
Signature · 1 line
1.7.5.4
PATCH v2 2/9 i.MX25: This architecture has a GPIO4 too
In reply to Timo Ketola--- drivers/gpio/mxc_gpio.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)
drivers/gpio/mxc_gpio.c +2 -1
@@ -40,7 +40,8 @@ static unsigned long gpio_ports[] = { [0] = GPIO1_BASE_ADDR, [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, -#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q ) +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) || \ + defined(CONFIG_MX6Q ) [3] = GPIO4_BASE_ADDR,#endif #if defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q )
Signature · 1 line
1.7.5.4
PATCH v2 3/9 imx: fec: Resolve speed before configuring gasket
In reply to Timo KetolaGasket needs a different configuration for 10BaseT than for higher speeds.
--- drivers/net/fec_mxc.c | 43 ++++++++++++++++++++++++------------------- 1 files changed, 24 insertions(+), 19 deletions(-)
drivers/net/fec_mxc.c +24 -19
@@ -440,6 +440,22 @@ static int fec_open(struct eth_device *edev)*/ writel (readl (&fec->eth->ecntrl) |FEC_ECNTRL_ETHER_EN , &fec->eth->ecntrl); +#ifdef CONFIG_PHYLIB +if (!fec->phydev) +fec_eth_phy_config (edev); +if (fec->phydev) { +/* Start up the PHY */ +phy_startup (fec->phydev); + speed = fec->phydev->speed; + }else { + speed = _100BASET; + } +#else +miiphy_wait_aneg (edev); + speed =miiphy_speed (edev->name, fec->phy_id); +miiphy_duplex (edev->name, fec->phy_id); +#endif +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX53 )udelay (100 );/*
@@ -453,9 +469,14 @@ static int fec_open(struct eth_device *edev)while (readw (&fec->eth->miigsk_enr) &MIIGSK_ENR_READY )udelay (2 ); -#if !defined(CONFIG_MII ) -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII , &fec->eth->miigsk_cfgr); +#if defined(CONFIG_RMII ) +if (speed != _10BASET) +/* configure gasket for RMII, 50MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII , &fec->eth->miigsk_cfgr); +else +/* configure gasket for RMII, 5MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII |MIIGSK_CFGR_FRCONT , + &fec->eth->miigsk_cfgr);#else /* configure gasket for MII, no loopback, and no echo */ writew (MIIGSK_CFGR_IF_MODE_MII , &fec->eth->miigsk_cfgr);
@@ -474,22 +495,6 @@ static int fec_open(struct eth_device *edev) }#endif -#ifdef CONFIG_PHYLIB -if (!fec->phydev) -fec_eth_phy_config (edev); -if (fec->phydev) { -/* Start up the PHY */ -phy_startup (fec->phydev); - speed = fec->phydev->speed; - }else { - speed = _100BASET; - } -#else -miiphy_wait_aneg (edev); - speed =miiphy_speed (edev->name, fec->phy_id); -miiphy_duplex (edev->name, fec->phy_id); -#endif -#ifdef FEC_QUIRK_ENET_MAC {u32 ecr =readl (&fec->eth->ecntrl) & ~FEC_ECNTRL_SPEED ;
Signature · 1 line
1.7.5.4
PATCH v2 4/9 imx: nand: Place BBT patterns into free OOB region
In reply to Timo KetolaFirst two bytes of the first OOB of erase block are reserved for factory bad block marking, usually.
--- drivers/mtd/nand/mxc_nand.c | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+), 0 deletions(-)
drivers/mtd/nand/mxc_nand.c +35 -0
@@ -1302,12 +1302,47 @@ static void mxc_setup_config1(void)#define mxc_setup_config1 ()#endif +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + +static u8 bbt_pattern[] = {'B' ,'b' ,'t' ,'0' }; +static u8 mirror_pattern[] = {'1' ,'t' ,'b' ,'B' }; + +static struct nand_bbt_descr bbt_main_descr = { + .options =NAND_BBT_LASTBLOCK |NAND_BBT_CREATE |NAND_BBT_WRITE | +NAND_BBT_2BIT |NAND_BBT_VERSION |NAND_BBT_PERCHIP , + .offs =2 , + .len =4 , + .veroffs =6 , + .maxblocks =4 , + .pattern = bbt_pattern, +}; + +static struct nand_bbt_descr bbt_mirror_descr = { + .options =NAND_BBT_LASTBLOCK |NAND_BBT_CREATE |NAND_BBT_WRITE | +NAND_BBT_2BIT |NAND_BBT_VERSION |NAND_BBT_PERCHIP , + .offs =2 , + .len =4 , + .veroffs =6 , + .maxblocks =4 , + .pattern = mirror_pattern, +}; + +#endif +int board_nand_init (struct nand_chip *this) {struct mtd_info *mtd;uint16_t tmp;int err =0 ; +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + + this->options =NAND_USE_FLASH_BBT ; + this->bbt_td = &bbt_main_descr; + this->bbt_md = &bbt_mirror_descr; + +#endif +/* structures must be linked */ mtd = &host->mtd; mtd->priv = this;
Signature · 1 line
1.7.5.4
PATCH 4/9 imx: nand: Place BBT patterns into free OOB region
Quoted 7 lines · Timo Ketola
First two bytes of the first OOB of erase block are reserved for factory bad block marking, usually.
Signed-off-by Timo Ketola <[email protected]>--- drivers/mtd/nand/mxc_nand.c | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+), 0 deletions(-)
So what happened before? The default is at offset 8, which doesn't conflict with the bad block marker. It seems the actual issue is a conflict with ECC?
And NAND_USE_FLASH_BBT wasn't defined before, so a better subject line for this patch would be "nand/mxc: support flash-based BBT".
Quoted 25 lines
drivers/mtd/nand/mxc_nand.c +17
-0@@ -1302,12 +1302,47 @@ static void mxc_setup_config1(void)#define mxc_setup_config1 ()#endif +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + +static u8 bbt_pattern[] = {'B', 'b', 't', '0' }; +static u8 mirror_pattern[] = {'1', 't', 'b', 'B' }; + +static struct nand_bbt_descr bbt_main_descr = { + .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE | + NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, + .offs = 2, + .len = 4, + .veroffs = 6, + .maxblocks = 4, + .pattern = bbt_pattern, +}; + +static struct nand_bbt_descr bbt_mirror_descr = { + .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
drivers/mtd/nand/mxc_nand.c static void mxc_setup_config1(void) · line 1331
Quoted 10 lines
drivers/mtd/nand/mxc_nand.c +10
-0+ NAND_BBT_2BIT | NAND_BBT_VERSION | NAND_BBT_PERCHIP, + .offs = 2, + .len = 4, + .veroffs = 6, + .maxblocks = 4, + .pattern = mirror_pattern, +}; + +#endif +
Won't veroffs = 6 conflict with ECC in the MXC_NFC_V1 case?
What about 8-bit small page support, in which case the bad block marker is at offset 5?
drivers/mtd/nand/mxc_nand.c static void mxc_setup_config1(void) · line 1344
Quoted 13 lines
drivers/mtd/nand/mxc_nand.c +7
-0int board_nand_init (struct nand_chip *this) {struct mtd_info *mtd;uint16_t tmp;int err =0 ; +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + + this->options =NAND_USE_FLASH_BBT ; + this->bbt_td = &bbt_main_descr; + this->bbt_md = &bbt_mirror_descr; + +#endif
Please remove those blank lines inside the ifdef.
-Scott
PATCH v2 4/9 imx: nand: Place BBT patterns into free OOB region
Quoted 4 lines · Scott Wood
Quoted 3 lines · Timo Ketola
First two bytes of the first OOB of erase block are reserved for factory bad block marking, usually.
Quoted 8 lines
Quoted 4 lines
Signed-off-by Timo Ketola<[email protected]>--- drivers/mtd/nand/mxc_nand.c | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+), 0 deletions(-)So what happened before? The default is at offset 8, which doesn't conflict with the bad block marker. It seems the actual issue is a conflict with ECC?
You seem to be right. I think I was badly confused with the kernel behaviour.
Quoted 2 lines
And
NAND_USE_FLASH_BBTwasn't defined before, so a better subject line for this patch would be "nand/mxc: support flash-based BBT".
Most probably right too.
Quoted 1 line
Won't veroffs = 6 conflict with ECC in the
MXC_NFC_V1case?
Seems to.
Quoted 2 lines
What about 8-bit small page support, in which case the bad block marker is at offset 5?
What about putting into the block
#if defined(MXC_NFC_V1)
#ifndef CONFIG_SYS_NAND_LARGEPAGE
defines for pattern and version offsets and use them in bbt_*_descr initializations? Or should they be in board configuration file?
Quoted 9 lines
drivers/mtd/nand/mxc_nand.c static void mxc_setup_config1(void) · line 1344
Quoted 7 lines
drivers/mtd/nand/mxc_nand.c +7
-0+#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + + this->options =NAND_USE_FLASH_BBT ; + this->bbt_td =&bbt_main_descr; + this->bbt_md =&bbt_mirror_descr; + +#endif Please remove those blank lines inside the ifdef.
Ok
--
Timo
PATCH 4/9 imx: nand: Place BBT patterns into free OOB region
Quoted 10 lines · Timo Ketola
Quoted 9 lines · Scott Wood
Quoted 7 lines · Timo Ketola
First two bytes of the first OOB of erase block are reserved for factory bad block marking, usually.
Signed-off-by Timo Ketola<[email protected]>--- drivers/mtd/nand/mxc_nand.c | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+), 0 deletions(-)
Quoted 6 lines
Quoted 3 lines
So what happened before? The default is at offset 8, which doesn't conflict with the bad block marker. It seems the actual issue is a conflict with ECC?
You seem to be right. I think I was badly confused with the kernel behaviour.
It looks like Linux wants the BBT to be at offset zero. Is there any plan to fix that? The two really should match...
Quoted 10 lines
Quoted 2 lines
What about 8-bit small page support, in which case the bad block marker is at offset 5?
What about putting into the block
#if
defined(MXC_NFC_V1)
#ifndefCONFIG_SYS_NAND_LARGEPAGEdefines for pattern and version offsets and use them in bbt_*_descr initializations?
Sure.
Quoted 1 line
Or should they be in board configuration file?
I don't think it belongs in the board config file (unless there's existing behavior that has to be matched for compatibility on a specific board).
-Scott
PATCH v2 4/9 imx: nand: Place BBT patterns into free OOB region
Quoted 1 line · Scott Wood
It looks like Linux wants the BBT to be at offset zero.
I have not dug too deeply into the BBT logic in kernel but maybe it could be possible to place BBT patterns over the factory markers. Then, when the code scans for BBT blocks, it should ignore factory markers and react only on BBT patterns. But I don't really know if this is the idea in kernel.
--
Timo
PATCH v2 4/9 imx: nand: Place BBT patterns into free OOB region
In reply to Scott WoodQuoted 2 lines · Scott Wood
It looks like Linux wants the BBT to be at offset zero. Is there any plan to fix that? The two really should match...
Somewhere in the process I got an impression that BBT couldn't be placed over the area where factory markers would be. But you made me think and I reverted the offset in my kernel back to zero and changed U-Boot accordingly. It seems to work perfectly like that. So I think now that the offset at zero is right.
Should I post v3 patchset now or only this one again or minimize noise and wait for more comments?
--
Timo
PATCH 4/9 imx: nand: Place BBT patterns into free OOB region
Quoted 2 lines · Timo Ketola
Should I post v3 patchset now or only this one again or minimize noise and wait for more comments?
Whichever you'd prefer.
-Scott
PATCH v2 5/9 i.MX25: This architecture has almost the same USB-controller as i.MX31
In reply to Timo Ketola--- drivers/usb/host/ehci-mxc.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/usb/host/ehci-mxc.c +1 -1
@@ -125,7 +125,7 @@ int ehci_hcd_init(void) hcor = (struct ehci_hcor *)((uint32_t ) hccr +HC_LENGTH (ehci_readl (&hccr->cr_capbase)));setbits_le32 (&ehci->usbmode,CM_HOST ); -#ifdef CONFIG_MX31 +#if defined(CONFIG_MX31 ) || defined(CONFIG_MX25 )setbits_le32 (&ehci->control,USB_EN );__raw_writel (CONFIG_MXC_USB_PORTSC , &ehci->portsc);
Signature · 1 line
1.7.5.4
PATCH v2 6/9 imx: usb: There is no such register
In reply to Timo KetolaThe reference manual of i.MX25 (nor i.MX31) does not define such register. This seems to access read only UH2_CAPLENGTH register (if CONFIG_MXC_USB_PORT is zero).
--- drivers/usb/host/ehci-mxc.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)
drivers/usb/host/ehci-mxc.c +0 -2
@@ -126,8 +126,6 @@ int ehci_hcd_init(void) HC_LENGTH(ehci_readl(&hccr->cr_capbase)));setbits_le32 (&ehci->usbmode,CM_HOST );#if defined(CONFIG_MX31 ) || defined(CONFIG_MX25 ) -setbits_le32 (&ehci->control,USB_EN ); -__raw_writel (CONFIG_MXC_USB_PORTSC , &ehci->portsc);#endif mxc_set_usbcontrol (CONFIG_MXC_USB_PORT ,CONFIG_MXC_USB_FLAGS );
Signature · 1 line
1.7.5.4
PATCH v2 7/9 imx: esdhc: Needed to use in imx-regs.h defined address
In reply to Timo KetolaOne might want to define CONFIG_SYS_FSL_ESDHC_ADDR with the macro already define in imx-regs.h, e.g. with IMX_MMC_SDHC1_BASE. Then the header must be included here.
--- drivers/mmc/fsl_esdhc.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
drivers/mmc/fsl_esdhc.c +1 -0
@@ -36,6 +36,7 @@#include <fsl_esdhc.h> #include <fdt_support.h> #include <asm/io.h> +#include <asm/arch/imx-regs.h> DECLARE_GLOBAL_DATA_PTR ;
Signature · 1 line
1.7.5.4
PATCH v2 8/9 imx: nand: Don't invent new configuration variable
In reply to Timo KetolaThere is already CONFIG_SYS_NAND_BASE (or CONFIG_SYS_NAND_BASE_LIST) which must be defined for nand.c. Use that. nand.c sets IO_ADDR_R with that.
--- drivers/mtd/nand/mxc_nand.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/mtd/nand/mxc_nand.c +1 -1
@@ -1361,7 +1361,7 @@ int board_nand_init(struct nand_chip *this) this->read_buf = mxc_nand_read_buf; this->verify_buf = mxc_nand_verify_buf; - host->regs = (struct nfc_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE ; + host->regs = this->IO_ADDR_R; host->clk_act =1 ;#ifdef CONFIG_MXC_NAND_HWECC
Signature · 1 line
1.7.5.4
PATCH 8/9 imx: nand: Don't invent new configuration variable
Quoted 13 lines · Timo Ketola
There is already
CONFIG_SYS_NAND_BASE(orCONFIG_SYS_NAND_BASE_LIST) which must be defined fornand.c. Use that.nand.csetsIO_ADDR_Rwith that.Signed-off-by Timo Ketola <[email protected]>--- drivers/mtd/nand/mxc_nand.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)drivers/mtd/nand/mxc_nand.c +0
-0
drivers/mtd/nand/mxc_nand.c int board_nand_init(struct nand_chip *this) · line 1367
Quoted 8 lines
drivers/mtd/nand/mxc_nand.c +1
-1@@ -1361,7 +1361,7 @@ int board_nand_init(struct nand_chip *this) this->read_buf = mxc_nand_read_buf; this->verify_buf = mxc_nand_verify_buf; - host->regs = (struct nfc_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE ; + host->regs = this->IO_ADDR_R; host->clk_act =1 ;#ifdef CONFIG_MXC_NAND_HWECC
Actually, I'd rather we go the other direction and deprecate CONFIG_SYS_NAND_BASE (see CONFIG_SYS_NAND_SELF_INIT).
-Scott
PATCH v2 8/9 imx: nand: Don't invent new configuration variable
Quoted 7 lines · Scott Wood
Quoted 3 lines · Timo Ketola
There is already
CONFIG_SYS_NAND_BASE(orCONFIG_SYS_NAND_BASE_LIST) which must be defined fornand.c. Use that.nand.csetsIO_ADDR_Rwith that.
...Actually, I'd rather we go the other direction and deprecate
CONFIG_SYS_NAND_BASE(seeCONFIG_SYS_NAND_SELF_INIT).
Maybe it's better for me to drop this patch...
--
Timo
PATCH v2 9/9 imx: Add u-boot.imx as target for ARM9 i.MX SOCs
In reply to Timo Ketola--- arch/arm/cpu/arm926ejs/config.mk | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)
arch/arm/cpu/arm926ejs/config.mk +6 -0
@@ -31,3 +31,9 @@ PLATFORM_CPPFLAGS += -march=armv5te # ========================================================================= PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT) + +ifneq ($(CONFIG_IMX_CONFIG),) + +ALL-y += $(obj)u-boot.imx + +endif
Signature · 1 line
1.7.5.4
v3 cover i.MX25: Miscellaneus fixes
In reply to Timo KetolaThese are the fixes I needed to do to get my board going.
Changes in v3:
- Dropped old patch number 8 "imx: nand: Don't invent new..."
- Changed the subject of patch 4
- Changed the BBT pattern offsets (patch 4); They are now zero as in Linux
Changes in v2:
- Rebased to u-boot-imx next
- Patch 2: Fixed too long lines
- Patch 3: Try not to break Gbit ether
Changed configuration option putting gasket into RMII mode to CONFIG_RMII
I'm not too sure how this should be done. CONFIG_MII is normally used for this but its original purpose was to enable MII *management* interface, I think...
- Patch 9: Add .imx target in the spirit of commit 303838
PATCH v2 1/9 i.MX25: esdhc: Add mxc_get_clock infrastructure
Defining CONFIG_FSL_ESDHC brings in a call to get_clocks, so let's implement get_clocks function. This is how it seems to be implemented elsewhere.
--- arch/arm/cpu/arm926ejs/mx25/generic.c | 27 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx25/clock.h | 23 +++++++++++++++++++++++ 2 files changed, 50 insertions(+), 0 deletions(-)
arch/arm/cpu/arm926ejs/mx25/generic.c +27 -0
@@ -28,10 +28,15 @@#include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/arch/imx25-pinmux.h> +#include <asm/arch/clock.h> #ifdef CONFIG_MXC_MMC #include <asm/arch/mxcmmc.h> #endif +#ifdef CONFIG_FSL_ESDHC +DECLARE_GLOBAL_DATA_PTR ; +#endif +/* * get the system pll clock in Hz *
@@ -105,6 +110,20 @@ ulong imx_get_perclk(int clk)return lldiv (fref, div); } +unsigned int mxc_get_clock (enum mxc_clock clk) +{ +if (clk >=MXC_CLK_NUM ) +return -1 ; +switch (clk) { +case MXC_ARM_CLK : +return imx_get_armclk (); +case MXC_FEC_CLK : +return imx_get_ahbclk (); +default : +return imx_get_perclk (clk); + } +} +u32 get_cpu_rev (void ) {u32 srev;
@@ -182,6 +201,14 @@ int cpu_eth_init(bd_t *bis)#endif } +int get_clocks (void ) +{ +#ifdef CONFIG_FSL_ESDHC + gd->sdhc_clk =mxc_get_clock (MXC_ESDHC_CLK ); +#endif +return 0 ; +} +/* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init()
arch/arm/include/asm/arch-mx25/clock.h +23 -0
@@ -26,11 +26,34 @@#ifndef __ASM_ARCH_CLOCK_H#define __ASM_ARCH_CLOCK_H +enum mxc_clock { +MXC_CSI_CLK , +MXC_EPIT_CLK , +MXC_ESAI_CLK , +MXC_ESDHC1_CLK , +MXC_ESDHC2_CLK , +MXC_GPT_CLK , +MXC_I2C_CLK , +MXC_LCDC_CLK , +MXC_NFC_CLK , +MXC_OWIRE_CLK , +MXC_PWM_CLK , +MXC_SIM1_CLK , +MXC_SIM2_CLK , +MXC_SSI1_CLK , +MXC_SSI2_CLK , +MXC_UART_CLK , +MXC_ARM_CLK , +MXC_FEC_CLK , +MXC_CLK_NUM +}; +ulong imx_get_perclk (int clk);ulong imx_get_ahbclk (void );#define imx_get_uartclk () imx_get_perclk(15)#define imx_get_fecclk () (imx_get_ahbclk()/2) +unsigned int mxc_get_clock (enum mxc_clock clk);#endif /* __ASM_ARCH_CLOCK_H */
Signature · 1 line
1.7.5.4
PATCH 1/9 i.MX25: esdhc: Add mxc_get_clock infrastructure
Dear "Timo Ketola",
arch/arm/cpu/arm926ejs/mx25/generic.c
Quoted 9 lines · In message <[email protected]> you wrote:
Defining
CONFIG_FSL_ESDHCbrings in a call toget_clocks, so let's implementget_clocksfunction. This is how it seems to be implemented elsewhere.Signed-off-by Timo Ketola <[email protected]>--- arch/arm/cpu/arm926ejs/mx25/generic.c | 27 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx25/clock.h | 23 +++++++++++++++++++++++ 2 files changed, 50 insertions(+), 0 deletions(-)arch/arm/cpu/arm926ejs/mx25/generic.c +0
-0
...
I understand this is a (eventually modified ?) reposting of patches you posted before. in this case it is mandatory not only to mark this in the Subject, but also to provide a detailled change log (below the "---" line); see
http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions
I'm not going to try to find out which review comments you have included, and what you changed to do so; sorry, but I don;t have that much time.
Please consider the whole patch series ignored.
Best regards,
Wolfgang Denk
Signature · 4 lines
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de "It is easier to port a shell than a shell script." - Larry Wall
PATCH v2 1/9 i.MX25: esdhc: Add mxc_get_clock infrastructure
Quoted 10 lines · Wolfgang Denk
Dear "Timo Ketola",
Quoted 3 lines · In message<[email protected]> you wrote:
Defining
CONFIG_FSL_ESDHCbrings in a call toget_clocks, so let's implementget_clocksfunction. This is how it seems to be implemented elsewhere. ......
I understand this is a (eventually modified ?) reposting of patches you posted before.
Yes
Quoted 1 line
in this case it is mandatory not only to mark this in the Subject,
Ok, how to do that I learned just now.
Quoted 2 lines
but also to provide a detailled change log (below the "---" line); see
http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions
I tried to provide that in the 0/x message but do you mean that I should provide it separately for every single patch? I see that your reference asks just that.
I was in impression that 'git send-email' (alone) would do the right thing but it doesn't give me opportunity to edit actual patch messages, only the cover letter. And I saw many examples of people putting the log in the cover letter. So how do people do that? 'git format-patch' then manually edit patch files, then send them with 'git send-email'?
Quoted 2 lines
I'm not going to try to find out which review comments you have included, and what you changed to do so; sorry, but I don;t have that much time.
So do I have to reference review comments somehow?
Quoted 1 line
Please consider the whole patch series ignored.
Ok
--
Timo
PATCH v2 2/9 i.MX25: This architecture has a GPIO4 too
In reply to Timo Ketola--- drivers/gpio/mxc_gpio.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)
drivers/gpio/mxc_gpio.c +2 -1
@@ -40,7 +40,8 @@ static unsigned long gpio_ports[] = { [0] = GPIO1_BASE_ADDR, [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, -#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q ) +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) || \ + defined(CONFIG_MX6Q ) [3] = GPIO4_BASE_ADDR,#endif #if defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q )
Signature · 1 line
1.7.5.4
PATCH v2 3/9 imx: fec: Resolve speed before configuring gasket
In reply to Timo KetolaGasket needs a different configuration for 10BaseT than for higher speeds.
--- drivers/net/fec_mxc.c | 43 ++++++++++++++++++++++++------------------- 1 files changed, 24 insertions(+), 19 deletions(-)
drivers/net/fec_mxc.c +24 -19
@@ -440,6 +440,22 @@ static int fec_open(struct eth_device *edev)*/ writel (readl (&fec->eth->ecntrl) |FEC_ECNTRL_ETHER_EN , &fec->eth->ecntrl); +#ifdef CONFIG_PHYLIB +if (!fec->phydev) +fec_eth_phy_config (edev); +if (fec->phydev) { +/* Start up the PHY */ +phy_startup (fec->phydev); + speed = fec->phydev->speed; + }else { + speed = _100BASET; + } +#else +miiphy_wait_aneg (edev); + speed =miiphy_speed (edev->name, fec->phy_id); +miiphy_duplex (edev->name, fec->phy_id); +#endif +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX53 )udelay (100 );/*
@@ -453,9 +469,14 @@ static int fec_open(struct eth_device *edev)while (readw (&fec->eth->miigsk_enr) &MIIGSK_ENR_READY )udelay (2 ); -#if !defined(CONFIG_MII ) -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII , &fec->eth->miigsk_cfgr); +#if defined(CONFIG_RMII ) +if (speed != _10BASET) +/* configure gasket for RMII, 50MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII , &fec->eth->miigsk_cfgr); +else +/* configure gasket for RMII, 5MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII |MIIGSK_CFGR_FRCONT , + &fec->eth->miigsk_cfgr);#else /* configure gasket for MII, no loopback, and no echo */ writew (MIIGSK_CFGR_IF_MODE_MII , &fec->eth->miigsk_cfgr);
@@ -474,22 +495,6 @@ static int fec_open(struct eth_device *edev) }#endif -#ifdef CONFIG_PHYLIB -if (!fec->phydev) -fec_eth_phy_config (edev); -if (fec->phydev) { -/* Start up the PHY */ -phy_startup (fec->phydev); - speed = fec->phydev->speed; - }else { - speed = _100BASET; - } -#else -miiphy_wait_aneg (edev); - speed =miiphy_speed (edev->name, fec->phy_id); -miiphy_duplex (edev->name, fec->phy_id); -#endif -#ifdef FEC_QUIRK_ENET_MAC {u32 ecr =readl (&fec->eth->ecntrl) & ~FEC_ECNTRL_SPEED ;
Signature · 1 line
1.7.5.4
PATCH v2 4/9 imx: nand: Support flash based BBT
In reply to Timo Ketola--- drivers/mtd/nand/mxc_nand.c | 35 +++++++++++++++++++++++++++++++++++ 1 files changed, 35 insertions(+), 0 deletions(-)
drivers/mtd/nand/mxc_nand.c +35 -0
@@ -1302,12 +1302,47 @@ static void mxc_setup_config1(void)#define mxc_setup_config1 ()#endif +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + +static u8 bbt_pattern[] = {'B' ,'b' ,'t' ,'0' }; +static u8 mirror_pattern[] = {'1' ,'t' ,'b' ,'B' }; + +static struct nand_bbt_descr bbt_main_descr = { + .options =NAND_BBT_LASTBLOCK |NAND_BBT_CREATE |NAND_BBT_WRITE | +NAND_BBT_2BIT |NAND_BBT_VERSION |NAND_BBT_PERCHIP , + .offs =0 , + .len =4 , + .veroffs =4 , + .maxblocks =4 , + .pattern = bbt_pattern, +}; + +static struct nand_bbt_descr bbt_mirror_descr = { + .options =NAND_BBT_LASTBLOCK |NAND_BBT_CREATE |NAND_BBT_WRITE | +NAND_BBT_2BIT |NAND_BBT_VERSION |NAND_BBT_PERCHIP , + .offs =0 , + .len =4 , + .veroffs =4 , + .maxblocks =4 , + .pattern = mirror_pattern, +}; + +#endif +int board_nand_init (struct nand_chip *this) {struct mtd_info *mtd;uint16_t tmp;int err =0 ; +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + + this->options =NAND_USE_FLASH_BBT ; + this->bbt_td = &bbt_main_descr; + this->bbt_md = &bbt_mirror_descr; + +#endif +/* structures must be linked */ mtd = &host->mtd; mtd->priv = this;
Signature · 1 line
1.7.5.4
PATCH 4/9 imx: nand: Support flash based BBT
drivers/mtd/nand/mxc_nand.c static void mxc_setup_config1(void) · line 1344
Quoted 7 lines · Timo Ketola
drivers/mtd/nand/mxc_nand.c +7
-0+#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + + this->options =NAND_USE_FLASH_BBT ; + this->bbt_td = &bbt_main_descr; + this->bbt_md = &bbt_mirror_descr; + +#endif
Remove those blank lines, and use |= for options like is done with NAND_BUSWIDTH_16.
-Scott
PATCH v2 5/9 i.MX25: This architecture has almost the same USB-controller as i.MX31
In reply to Timo Ketola--- drivers/usb/host/ehci-mxc.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
drivers/usb/host/ehci-mxc.c +1 -1
@@ -125,7 +125,7 @@ int ehci_hcd_init(void) hcor = (struct ehci_hcor *)((uint32_t ) hccr +HC_LENGTH (ehci_readl (&hccr->cr_capbase)));setbits_le32 (&ehci->usbmode,CM_HOST ); -#ifdef CONFIG_MX31 +#if defined(CONFIG_MX31 ) || defined(CONFIG_MX25 )setbits_le32 (&ehci->control,USB_EN );__raw_writel (CONFIG_MXC_USB_PORTSC , &ehci->portsc);
Signature · 1 line
1.7.5.4
PATCH v2 6/9 imx: usb: There is no such register
In reply to Timo KetolaThe reference manual of i.MX25 (nor i.MX31) does not define such register. This seems to access read only UH2_CAPLENGTH register (if CONFIG_MXC_USB_PORT is zero).
--- drivers/usb/host/ehci-mxc.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)
drivers/usb/host/ehci-mxc.c +0 -2
@@ -126,8 +126,6 @@ int ehci_hcd_init(void) HC_LENGTH(ehci_readl(&hccr->cr_capbase)));setbits_le32 (&ehci->usbmode,CM_HOST );#if defined(CONFIG_MX31 ) || defined(CONFIG_MX25 ) -setbits_le32 (&ehci->control,USB_EN ); -__raw_writel (CONFIG_MXC_USB_PORTSC , &ehci->portsc);#endif mxc_set_usbcontrol (CONFIG_MXC_USB_PORT ,CONFIG_MXC_USB_FLAGS );
Signature · 1 line
1.7.5.4
PATCH 6/9 imx: usb: There is no such register
Quoted 5 lines · Timo Ketola
The reference manual of i.MX25 (nor i.MX31) does not define such register. This seems to access read only
UH2_CAPLENGTHregister (ifCONFIG_MXC_USB_PORTis zero).Signed-off-by Timo Ketola <[email protected]>
Hi Timo,
drivers/usb/host/ehci-mxc.c int ehci_hcd_init(void) · line 128
Quoted 12 lines
--- drivers/usb/host/ehci-mxc.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)drivers/usb/host/ehci-mxc.c +0
-0@@ -126,8 +126,6 @@ int ehci_hcd_init(void) HC_LENGTH(ehci_readl(&hccr->cr_capbase)));setbits_le32 (&ehci->usbmode,CM_HOST );#if defined(CONFIG_MX31 ) || defined(CONFIG_MX25 )
As far as I can see, only MX31 and MX25 boards are using this file. Other i.MX have its own initialization file. So #if defined(CONFIG_MX31) || defined(CONFIG_MX25) is always true.
However, where is this code ? In current u-boot I see only #if defined(CONFIG_MX31) at this line. Is it your patch correct ?
drivers/usb/host/ehci-mxc.c int ehci_hcd_init(void) · line 130
Quoted 2 lines
drivers/usb/host/ehci-mxc.c +0
-2-setbits_le32 (&ehci->control,USB_EN ); -
As far as I can see, it tries to overwrite a capability register, that is for our luck read-only. Good catch !
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v2 6/9 imx: usb: There is no such register
Quoted 3 lines · Stefano Babic
As far as I can see, only MX31 and MX25 boards are using this file. Other i.MX have its own initialization file. So #if
defined(CONFIG_MX31)||defined(CONFIG_MX25)is always true.
So, would it be OK to remove this check altogether?
Quoted 2 lines
However, where is this code ? In current u-boot I see only #if
defined(CONFIG_MX31)at this line. Is it your patch correct ?
My previous patch 5 touched that one.
Quoted 5 lines
drivers/usb/host/ehci-mxc.c int ehci_hcd_init(void) · line 130
Quoted 2 lines
drivers/usb/host/ehci-mxc.c +0
-2-setbits_le32 (&ehci->control,USB_EN ); -As far as I can see, it tries to overwrite a capability register, that is for our luck read-only. Good catch !
Thanks.
--
Timo
PATCH 6/9 imx: usb: There is no such register
Quoted 6 lines · Timo Ketola
Quoted 3 lines · Stefano Babic
As far as I can see, only MX31 and MX25 boards are using this file. Other i.MX have its own initialization file. So #if
defined(CONFIG_MX31)||defined(CONFIG_MX25)is always true.So, would it be OK to remove this check altogether?
Yes, I think so - if the file is compiled only by i.MX25 or i.MX31 boards, it makes no sense.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v2 7/9 imx: esdhc: Needed to use in imx-regs.h defined address
In reply to Timo KetolaOne might want to define CONFIG_SYS_FSL_ESDHC_ADDR with the macro already define in imx-regs.h, e.g. with IMX_MMC_SDHC1_BASE. Then the header must be included here.
--- drivers/mmc/fsl_esdhc.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
drivers/mmc/fsl_esdhc.c +1 -0
@@ -36,6 +36,7 @@#include <fsl_esdhc.h> #include <fdt_support.h> #include <asm/io.h> +#include <asm/arch/imx-regs.h> DECLARE_GLOBAL_DATA_PTR ;
Signature · 1 line
1.7.5.4
PATCH 7/9 imx: esdhc: Needed to use in imx-regs.h defined address
Quoted 14 lines · Timo Ketola
One might want to define
CONFIG_SYS_FSL_ESDHC_ADDRwith the macro already define inimx-regs.h, e.g. withIMX_MMC_SDHC1_BASE. Then the header must be included here.Signed-off-by Timo Ketola <[email protected]>--- drivers/mmc/fsl_esdhc.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)drivers/mmc/fsl_esdhc.c +0
-0
drivers/mmc/fsl_esdhc.c line 40
Quoted 5 lines
drivers/mmc/fsl_esdhc.c +1
-0@@ -36,6 +36,7 @@#include <fsl_esdhc.h> #include <fdt_support.h> #include <asm/io.h> +#include <asm/arch/imx-regs.h>
NAK. There is a good reason to avoid it. The fsl_esdhc driver is common to both i.MX and PowerPc architecture, and of course PowerPC have not imx-regs.h. And CONFIG_SYS_FSL_ESDHC_ADDR cannot be set by a macro in imx-regs.h, because it is different on PowerPC.
By the way, why do you need it if you do not use that macro ?
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v2 7/9 imx: esdhc: Needed to use in imx-regs.h defined address
Quoted 13 lines · Stefano Babic
drivers/mmc/fsl_esdhc.c
Quoted 7 lines · Timo Ketola
One might want to define
CONFIG_SYS_FSL_ESDHC_ADDRwith the macro already define inimx-regs.h, e.g. withIMX_MMC_SDHC1_BASE. Then the header must be included here.
...drivers/mmc/fsl_esdhc.c +1
-0+#include <asm/arch/imx-regs.h> NAK. There is a good reason to avoid it. The
fsl_esdhcdriver is common to both i.MX and PowerPc architecture, and of course PowerPC have notimx-regs.h. AndCONFIG_SYS_FSL_ESDHC_ADDRcannot be set by a macro inimx-regs.h, because it is different on PowerPC.
Ok, I was afraid about something like that and tried first to include it in board configuration but that broke something else (at least arm926ejs didn't compile any more).
Quoted 1 line
By the way, why do you need it if you do not use that macro ?
I use it in my board (support of which I'm preparing to send) configuration file and I think it is annoying to write a literal constant there which is already defined in imx-regs.h.
PPC seems to use a predefined macro from asm/immap_8xxx.h files. Where is that file included?
--
Timo
PATCH 7/9 imx: esdhc: Needed to use in imx-regs.h defined address
Quoted 10 lines · Timo Ketola
Ok, I was afraid about something like that and tried first to include it in board configuration but that broke something else (at least arm926ejs didn't compile any more).
Quoted 1 line
By the way, why do you need it if you do not use that macro ?
I use it in my board (support of which I'm preparing to send) configuration file and I think it is annoying to write a literal constant there which is already defined in
imx-regs.h.
fsl_esdhc.c includes config.h. If your board configuration file includes imx-regs.h, as most i.MX boards do, the file is automatically included, I suppose.
Quoted 3 lines
PPC seems to use a predefined macro from
asm/immap_8xxx.hfiles. Where is that file included?
It is a different way. The board configuration file includes the register description file, so for example immap_86xx.h, immap_85xx.h, or imx-regs.h, and defines CONFIG_SYS_FSL_ESDHC_ADDR using its own specific macro, if any, for example:
#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
Why is it not enough for you to set in your board configuration file:
#define CONFIG_SYS_FSL_ESDHC_ADDR IMX_MMC_SDHC1_BASE
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v2 7/9 imx: esdhc: Needed to use in imx-regs.h defined address
Quoted 9 lines · Stefano Babic
Quoted 7 lines · Timo Ketola
Ok, I was afraid about something like that and tried first to include it in board configuration but that broke something else (at least arm926ejs didn't compile any more).
Quoted 1 line
By the way, why do you need it if you do not use that macro ?
Quoted 7 lines
Quoted 3 lines
I use it in my board (support of which I'm preparing to send) configuration file and I think it is annoying to write a literal constant there which is already defined in
imx-regs.h.
fsl_esdhc.cincludesconfig.h. If your board configuration file includesimx-regs.h, as most i.MX boards do, the file is automatically included, I suppose.
I tried that but then:
.../u-boot-imx/build-exe4026/include/asm/arch/imx-regs.h:43:2: error: expected specifier-qualifier-list before ?u32?
when compiling
arch/arm/cpu/arm926ejs/cpu.o
Quoted 7 lines
Quoted 4 lines
PPC seems to use a predefined macro from
asm/immap_8xxx.hfiles. Where is that file included?It is a different way. The board configuration file includes the register description file, so for example
immap_86xx.h,immap_85xx.h,
Where? I don't see an example. But I see them included in common.h. Should there be also imx-regs? Seems to work if I do so.
Quoted 9 lines
or
imx-regs.h, and definesCONFIG_SYS_FSL_ESDHC_ADDRusing its own specific macro, if any, for example:#define
CONFIG_SYS_FSL_ESDHC_ADDRCONFIG_SYS_MPC85xx_ESDHC_ADDRWhy is it not enough for you to set in your board configuration file:
#define
CONFIG_SYS_FSL_ESDHC_ADDRIMX_MMC_SDHC1_BASE
I tried also exactly that, but then:
fsl_esdhc.c:544:20: error: ?IMX_MMC_SDHC1_BASE? undeclared (first use in this function)
fsl_esdhc.c seems not to see imx-regs.h file.
Then I tried to include imx-regs.h in fsl_esdhc.c and 'MAKEALL -a arm' was happy.
Maybe the right fix is to include imx-regs in common.h? What would be the right expression for #ifdef?
--
Timo
PATCH 7/9 imx: esdhc: Needed to use in imx-regs.h defined address
Quoted 5 lines · Timo Ketola
Quoted 4 lines
fsl_esdhc.cincludesconfig.h. If your board configuration file includesimx-regs.h, as most i.MX boards do, the file is automatically included, I suppose.
Quoted 8 lines
I tried that but then:
.../u-boot-imx/build-exe4026/include/asm/arch/imx-regs.h:43:2: error:
expected specifier-qualifier-list before ?u32?when compiling
arch/arm/cpu/arm926ejs/cpu.o
Well, I have not said that there cannot be other issues. At first glance you must include asm/types.h, in cpu.c or in imx-regs.h.
Quoted 7 lines
Quoted 5 lines
Quoted 2 lines
PPC seems to use a predefined macro from
asm/immap_8xxx.hfiles. Where is that file included?It is a different way. The board configuration file includes the register description file, so for example
immap_86xx.h,immap_85xx.h,Where? I don't see an example.
For PPC86xx I can see at least:
arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c:#include <asm/immap_86xx.h> arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c:#include <asm/immap_86xx.h> board/freescale/mpc8610hpcd/mpc8610hpcd.c:#include <asm/immap_86xx.h> board/freescale/mpc8641hpcn/mpc8641hpcn.c:#include <asm/immap_86xx.h>
Quoted 2 lines
But I see them included in
common.h.
Should there be also imx-regs? Seems to work if I do so.
No, this is wrong.
Quoted 7 lines
Quoted 7 lines
or
imx-regs.h, and definesCONFIG_SYS_FSL_ESDHC_ADDRusing its own specific macro, if any, for example:#define
CONFIG_SYS_FSL_ESDHC_ADDRCONFIG_SYS_MPC85xx_ESDHC_ADDR
Quoted 8 lines
Quoted 3 lines
Why is it not enough for you to set in your board configuration file:
#define
CONFIG_SYS_FSL_ESDHC_ADDRIMX_MMC_SDHC1_BASEI tried also exactly that, but then:
fsl_esdhc.c:544:20: error: ?IMX_MMC_SDHC1_BASE? undeclared (first use in this function)
...then imx-regs.h was not included...
Quoted 7 lines
fsl_esdhc.cseems not to seeimx-regs.hfile.Then I tried to include
imx-regs.hinfsl_esdhc.cand 'MAKEALL -a arm' was happy.Maybe the right fix is to include imx-regs in
common.h?
No. common.h, as the name suggests, is for all architectures, not only for i.MX. We cannot fix i:MX and break other boards.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v2 7/9 imx: esdhc: Needed to use in imx-regs.h defined address
Quoted 9 lines · Stefano Babic
Quoted 8 lines · Timo Ketola
Quoted 6 lines · Stefano Babic
Quoted 2 lines · Timo Ketola
PPC seems to use a predefined macro from
asm/immap_8xxx.hfiles. Where is that file included?It is a different way. The board configuration file includes the register description file, so for example
immap_86xx.h,immap_85xx.h,
Quoted 8 lines
Quoted 1 line
Where? I don't see an example.
For PPC86xx I can see at least:
arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c:#include<asm/immap_86xx.h> arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c:#include<asm/immap_86xx.h> board/freescale/mpc8610hpcd/mpc8610hpcd.c:#include<asm/immap_86xx.h> board/freescale/mpc8641hpcn/mpc8641hpcn.c:#include<asm/immap_86xx.h>
Yes, I saw those but when you said that board configuration file includes those, I thought that you meant the header files in include/configs.
Quoted 4 lines
Quoted 2 lines
But I see them included in
common.h.
Should there be also imx-regs? Seems to work if I do so.No, this is wrong.
...
Quoted 7 lines
Quoted 4 lines
Then I tried to include
imx-regs.hinfsl_esdhc.cand 'MAKEALL -a arm' was happy.Maybe the right fix is to include imx-regs in
common.h?No.
common.h, as the name suggests, is for all architectures, not only for i.MX. We cannot fix i:MX and break other boards.
But why PPC register description files are included there then? For example line 87:
#ifdef CONFIG_MPC86xx
#include <mpc86xx.h>
#include <asm/immap_86xx.h>
#endif
Is that deprecated?
And how would adding imx file with the same logic break other boards? I mean, putting there:
#if defined(CONFIG_MX25) || defined(CONFIG_MX31) || ... #include <asm/arch/imx-regs.h>
#endif
But if the board configuration file in include/configs is the correct place to include it, I shall then find the obstacle on that approach...
--
Timo
PATCH v2 7/9 imx: esdhc: Needed to use in imx-regs.h defined address
Quoted 2 lines · Timo Ketola
But if the board configuration file in
include/configsis the correct place to include it, I shall then find the obstacle on that approach...
Ok, including asm/arch/imx-regs.h in board configuration file *and* asm/types.h in asm/arch/imx-regs.h file seems to make build happy. This would be the right fix then?
--
Timo
PATCH v2 8/9 imx: Add u-boot.imx as target for ARM9 i.MX SOCs
In reply to Timo Ketola--- arch/arm/cpu/arm926ejs/config.mk | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)
arch/arm/cpu/arm926ejs/config.mk +6 -0
@@ -31,3 +31,9 @@ PLATFORM_CPPFLAGS += -march=armv5te # ========================================================================= PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT) + +ifneq ($(CONFIG_IMX_CONFIG),) + +ALL-y += $(obj)u-boot.imx + +endif
Signature · 1 line
1.7.5.4
v3 cover i.MX25: Miscellaneus fixes
In reply to Timo KetolaHi,
Please, don't get confused about the subject lines which suggest that I sent nine patches. At the last second I dropped the last patch and decided to send it separately.
Stefano, did you get the "[PATCH 0/8 v3]..." message as a CC. I don't see you in CC list in the bounce I got myself and yet I have your address in .git/config *and* I see you in my following messages. I don't understand...
--
Timo
v3 cover i.MX25: Miscellaneus fixes
In reply to Timo KetolaQuoted 2 lines · Timo Ketola
These are the fixes I needed to do to get my board going.
Hi Timo,
Quoted 5 lines
Changes in v3:
- Dropped old patch number 8 "imx: nand: Don't invent new..."
- Changed the subject of patch 4
- Changed the BBT pattern offsets (patch 4); They are now zero as in Linux
You must change the subject of the patch and introduce an enumeration. Your patchset should start with "[PATCH V3". This can easy automatically done by "git format-patch" with --subject-prefix "PATCH V3".
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
v4 cover i.MX25: Preparing new board with miscellaneus fixes
In reply to Timo KetolaI'm preparing to include Exertus board adaptation. This is the fourth version of this patchset and the history is showing my deep learning curve with git and formatting good patches. So please bear with me.
I assumed that 'git send-email' (alone) would be a handy way to send patches but it proved to produce disappointing results, at least in my hands. I switched to trying 'git format-patch; edit; git send-email'. Lets see how this goes...
The board, for which I'm trying to adapt, uses some peripherals (esdhc, gpio4) and functionalities (flash based BBT) which apparently are not yet used in other i.MX25 boards. This patchset fixes some issues in using those peripherals in i.MX25 environment and some bugs.
Changes in contents of the patchset:
V3:
- Dropped patch 8
V2:
- Dropped patches 2, 3 and 6
- Added patches 6, 7, 8 and 9
I hope and believe that all comments given to me so far are covered in these patches.
Timo Ketola (8):
i.MX25: esdhc: Add mxc_get_clock infrastructure i.MX25: This architecture has a GPIO4 too
imx: fec: Resolve speed before configuring gasket
imx: nand: Support flash based BBT
i.MX25: usb: Set PORTSCx register
imx: usb: There is no such register
i.MX2: Include asm/types.h in arch-mx25/imx-regs.h
imx: Add u-boot.imx as target for ARM9 i.MX SOCs
arch/arm/cpu/arm926ejs/config.mk | 6 ++++ arch/arm/cpu/arm926ejs/mx25/generic.c | 27 ++++++++++++++++++ arch/arm/include/asm/arch-mx25/clock.h | 23 +++++++++++++++ arch/arm/include/asm/arch-mx25/imx-regs.h | 3 ++ drivers/gpio/mxc_gpio.c | 3 +- drivers/mtd/nand/mxc_nand.c | 33 ++++++++++++++++++++++ drivers/net/fec_mxc.c | 43 ++++++++++++++++------------- drivers/usb/host/ehci-mxc.c | 4 --- 8 files changed, 118 insertions(+), 24 deletions(-)
Signature · 1 line
1.7.5.4
PATCH v4 1/8 i.MX25: esdhc: Add mxc_get_clock infrastructure
Defining CONFIG_FSL_ESDHC brings in a call to get_clocks, so let's implement get_clocks function. This is how it seems to be implemented elsewhere.
---
Changes in v4:
- Rewrapped commit message
Changes in v2:
- Rebased to u-boot-imx next
arch/arm/cpu/arm926ejs/mx25/generic.c | 27 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx25/clock.h | 23 +++++++++++++++++++++++ 2 files changed, 50 insertions(+), 0 deletions(-)
arch/arm/cpu/arm926ejs/mx25/generic.c +27 -0
@@ -28,10 +28,15 @@#include <asm/io.h> #include <asm/arch/imx-regs.h> #include <asm/arch/imx25-pinmux.h> +#include <asm/arch/clock.h> #ifdef CONFIG_MXC_MMC #include <asm/arch/mxcmmc.h> #endif +#ifdef CONFIG_FSL_ESDHC +DECLARE_GLOBAL_DATA_PTR ; +#endif +/* * get the system pll clock in Hz *
@@ -105,6 +110,20 @@ ulong imx_get_perclk(int clk)return lldiv (fref, div); } +unsigned int mxc_get_clock (enum mxc_clock clk) +{ +if (clk >=MXC_CLK_NUM ) +return -1 ; +switch (clk) { +case MXC_ARM_CLK : +return imx_get_armclk (); +case MXC_FEC_CLK : +return imx_get_ahbclk (); +default : +return imx_get_perclk (clk); + } +} +u32 get_cpu_rev (void ) {u32 srev;
@@ -182,6 +201,14 @@ int cpu_eth_init(bd_t *bis)#endif } +int get_clocks (void ) +{ +#ifdef CONFIG_FSL_ESDHC + gd->sdhc_clk =mxc_get_clock (MXC_ESDHC_CLK ); +#endif +return 0 ; +} +/* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init()
arch/arm/include/asm/arch-mx25/clock.h +23 -0
@@ -26,11 +26,34 @@#ifndef __ASM_ARCH_CLOCK_H#define __ASM_ARCH_CLOCK_H +enum mxc_clock { +MXC_CSI_CLK , +MXC_EPIT_CLK , +MXC_ESAI_CLK , +MXC_ESDHC1_CLK , +MXC_ESDHC2_CLK , +MXC_GPT_CLK , +MXC_I2C_CLK , +MXC_LCDC_CLK , +MXC_NFC_CLK , +MXC_OWIRE_CLK , +MXC_PWM_CLK , +MXC_SIM1_CLK , +MXC_SIM2_CLK , +MXC_SSI1_CLK , +MXC_SSI2_CLK , +MXC_UART_CLK , +MXC_ARM_CLK , +MXC_FEC_CLK , +MXC_CLK_NUM +}; +ulong imx_get_perclk (int clk);ulong imx_get_ahbclk (void );#define imx_get_uartclk () imx_get_perclk(15)#define imx_get_fecclk () (imx_get_ahbclk()/2) +unsigned int mxc_get_clock (enum mxc_clock clk);#endif /* __ASM_ARCH_CLOCK_H */
Signature · 1 line
1.7.5.4
PATCH v4 1/8 i.MX25: esdhc: Add mxc_get_clock infrastructure
Quoted 10 lines · Timo Ketola
Defining
CONFIG_FSL_ESDHCbrings in a call toget_clocks, so let's implementget_clocksfunction. This is how it seems to be implemented elsewhere.Signed-off-by Timo Ketola <[email protected]>---
Changes in v4:
- Rewrapped commit message
Quoted 7 lines
Changes in v2:
- Rebased to u-boot-imx nextarch/arm/cpu/arm926ejs/mx25/generic.c | 27 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx25/clock.h | 23 +++++++++++++++++++++++ 2 files changed, 50 insertions(+), 0 deletions(-)
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 1/8 i.MX25: esdhc: Add mxc_get_clock infrastructure
In reply to Timo KetolaQuoted 10 lines · Timo Ketola
Defining
CONFIG_FSL_ESDHCbrings in a call toget_clocks, so let's implementget_clocksfunction. This is how it seems to be implemented elsewhere.Signed-off-by Timo Ketola <[email protected]>---
Changes in v4:
- Rewrapped commit message
Quoted 7 lines
Changes in v2:
- Rebased to u-boot-imx nextarch/arm/cpu/arm926ejs/mx25/generic.c | 27 +++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx25/clock.h | 23 +++++++++++++++++++++++ 2 files changed, 50 insertions(+), 0 deletions(-)
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 2/8 i.MX25: This architecture has a GPIO4 too
In reply to Timo Ketola---
Changes in v2:
- Dropped patches 2 and 3 so this one changed from 4 to 2
- Rebased to u-boot-imx next
- Fixed too long line
drivers/gpio/mxc_gpio.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)
drivers/gpio/mxc_gpio.c +2 -1
@@ -40,7 +40,8 @@ static unsigned long gpio_ports[] = { [0] = GPIO1_BASE_ADDR, [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, -#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q ) +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) || \ + defined(CONFIG_MX6Q ) [3] = GPIO4_BASE_ADDR,#endif #if defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q )
Signature · 1 line
1.7.5.4
PATCH v4 2/8 i.MX25: This architecture has a GPIO4 too
Quoted 16 lines · Timo Ketola
Signed-off-by Timo Ketola <[email protected]>---
Changes in v2:
- Dropped patches 2 and 3 so this one changed from 4 to 2
- Rebased to u-boot-imx next
- Fixed too long linedrivers/gpio/mxc_gpio.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-)drivers/gpio/mxc_gpio.c +0
-0
drivers/gpio/mxc_gpio.c static unsigned long gpio_ports[] = { · line 47
Quoted 9 lines
drivers/gpio/mxc_gpio.c +2
-1@@ -40,7 +40,8 @@ static unsigned long gpio_ports[] = { [0] = GPIO1_BASE_ADDR, [1] = GPIO2_BASE_ADDR, [2] = GPIO3_BASE_ADDR, -#if defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q ) +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX51 ) || defined(CONFIG_MX53 ) || \ + defined(CONFIG_MX6Q ) [3] = GPIO4_BASE_ADDR,#endif #if defined(CONFIG_MX53 ) || defined(CONFIG_MX6Q )
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 2/8 i.MX25: This architecture has a GPIO4 too
In reply to Timo KetolaQuoted 7 lines · Timo Ketola
Signed-off-by Timo Ketola <[email protected]>---
Changes in v2:
- Dropped patches 2 and 3 so this one changed from 4 to 2
- Rebased to u-boot-imx next
- Fixed too long line
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
In reply to Timo KetolaGasket needs a different configuration for 10BaseT than for higher speeds.
---
Changes in v4:
- Rewrapped commit message
Changes in v2:
- Dropped patches 2 and 3 so this one changed from 5 to 3
- Rebased to u-boot-imx next
- Removed the remove of 'miiphy_duplex' call
- Changed 'speed == _100BASET' to 'speed != _10BASET' to not to break
_1000BASET
- Changed configuration option to put gasket into RMII mode from !CONFIG_MII to CONFIG_RMII. I'm not too sure how this should be done though. !CONFIG_MII is normally used for this but its original purpose was to enable MII *management* interface, I think...
drivers/net/fec_mxc.c | 43 ++++++++++++++++++++++++------------------- 1 files changed, 24 insertions(+), 19 deletions(-)
drivers/net/fec_mxc.c +24 -19
@@ -440,6 +440,22 @@ static int fec_open(struct eth_device *edev)*/ writel (readl (&fec->eth->ecntrl) |FEC_ECNTRL_ETHER_EN , &fec->eth->ecntrl); +#ifdef CONFIG_PHYLIB +if (!fec->phydev) +fec_eth_phy_config (edev); +if (fec->phydev) { +/* Start up the PHY */ +phy_startup (fec->phydev); + speed = fec->phydev->speed; + }else { + speed = _100BASET; + } +#else +miiphy_wait_aneg (edev); + speed =miiphy_speed (edev->name, fec->phy_id); +miiphy_duplex (edev->name, fec->phy_id); +#endif +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX53 )udelay (100 );/*
@@ -453,9 +469,14 @@ static int fec_open(struct eth_device *edev)while (readw (&fec->eth->miigsk_enr) &MIIGSK_ENR_READY )udelay (2 ); -#if !defined(CONFIG_MII ) -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII , &fec->eth->miigsk_cfgr); +#if defined(CONFIG_RMII ) +if (speed != _10BASET) +/* configure gasket for RMII, 50MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII , &fec->eth->miigsk_cfgr); +else +/* configure gasket for RMII, 5MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII |MIIGSK_CFGR_FRCONT , + &fec->eth->miigsk_cfgr);#else /* configure gasket for MII, no loopback, and no echo */ writew (MIIGSK_CFGR_IF_MODE_MII , &fec->eth->miigsk_cfgr);
@@ -474,22 +495,6 @@ static int fec_open(struct eth_device *edev) }#endif -#ifdef CONFIG_PHYLIB -if (!fec->phydev) -fec_eth_phy_config (edev); -if (fec->phydev) { -/* Start up the PHY */ -phy_startup (fec->phydev); - speed = fec->phydev->speed; - }else { - speed = _100BASET; - } -#else -miiphy_wait_aneg (edev); - speed =miiphy_speed (edev->name, fec->phy_id); -miiphy_duplex (edev->name, fec->phy_id); -#endif -#ifdef FEC_QUIRK_ENET_MAC {u32 ecr =readl (&fec->eth->ecntrl) & ~FEC_ECNTRL_SPEED ;
Signature · 1 line
1.7.5.4
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
Quoted 6 lines · Timo Ketola
Gasket needs a different configuration for 10BaseT than for higher speeds.
Signed-off-by Timo Ketola <[email protected]>---
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
In reply to Timo KetolaQuoted 51 lines · Timo Ketola
Gasket needs a different configuration for 10BaseT than for higher speeds.
Signed-off-by Timo Ketola<[email protected]>---
Changes in v4:
- Rewrapped commit messageChanges in v2:
- Dropped patches 2 and 3 so this one changed from 5 to 3
- Rebased to u-boot-imx next
- Removed the remove of 'miiphy_duplex' call
- Changed 'speed ==_100BASET' to 'speed !=_10BASET' to not to break_1000BASET- Changed configuration option to put gasket into RMII mode from !CONFIG_MII to
CONFIG_RMII. I'm not too sure how this should be done though. !CONFIG_MII is normally used for this but its original purpose was to enable MII *management* interface, I think...drivers/net/fec_mxc.c | 43 ++++++++++++++++++++++++------------------- 1 files changed, 24 insertions(+), 19 deletions(-)drivers/net/fec_mxc.c +16
-0@@ -440,6 +440,22 @@ static int fec_open(struct eth_device *edev)*/ writel (readl (&fec->eth->ecntrl) |FEC_ECNTRL_ETHER_EN , &fec->eth->ecntrl); +#ifdef CONFIG_PHYLIB +if (!fec->phydev) +fec_eth_phy_config (edev); +if (fec->phydev) { +/* Start up the PHY */ +phy_startup (fec->phydev); + speed = fec->phydev->speed; + }else { + speed = _100BASET; + } +#else +miiphy_wait_aneg (edev); + speed =miiphy_speed (edev->name, fec->phy_id); +miiphy_duplex (edev->name, fec->phy_id); +#endif +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX53 )udelay (100 );/*
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 472
Quoted 7 lines
drivers/net/fec_mxc.c +1
-3@@ -453,9 +469,14 @@ static int fec_open(struct eth_device *edev)while (readw (&fec->eth->miigsk_enr)&MIIGSK_ENR_READY )udelay (2 ); -#if !defined(CONFIG_MII ) -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII ,&fec->eth->miigsk_cfgr); +#if defined(CONFIG_RMII )
While this change seems to make sense, it could break some boards. Please split out to a separate patch,
and leave as !defined(CONFIG_MII) for this patch.
Thanks
Troy
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
Quoted 7 lines · Troy Kisky
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 472
Quoted 4 lines · Timo Ketola
drivers/net/fec_mxc.c +1
-3-#if !defined(CONFIG_MII ) -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII ,&fec->eth->miigsk_cfgr); +#if defined(CONFIG_RMII )While this change seems to make sense, it could break some boards.
Please explain how. Every board using fec_mxc define CONFIG_MII - they have to:
#ifndef CONFIG_MII
#error "CONFIG_MII has to be defined!"
#endif
Quoted 2 lines
Please split out to a separate patch, and leave as !defined(CONFIG_MII) for this patch.
Stefano?
--
Timo
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
Quoted 9 lines · Timo Ketola
Quoted 7 lines · Troy Kisky
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 472
Quoted 4 lines · Timo Ketola
drivers/net/fec_mxc.c +1
-3-#if !defined(CONFIG_MII ) -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII ,&fec->eth->miigsk_cfgr); +#if defined(CONFIG_RMII )While this change seems to make sense, it could break some boards.
Quoted 6 lines
Please explain how. Every board using
fec_mxcdefineCONFIG_MII- they have to:#ifndef
CONFIG_MII
#error "CONFIG_MIIhas to be defined!"
#endif
Does every board that has a gasket define CONFIG_RMII?
Or are you saying that every board with a gasket is already broken?
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
Quoted 13 lines · Troy Kisky
Quoted 12 lines · Timo Ketola
Quoted 7 lines · Troy Kisky
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 472
Quoted 4 lines · Timo Ketola
drivers/net/fec_mxc.c +1
-3-#if !defined(CONFIG_MII ) -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII ,&fec->eth->miigsk_cfgr); +#if defined(CONFIG_RMII )While this change seems to make sense, it could break some boards.
Please explain how. Every board using
fec_mxcdefineCONFIG_MII- they have to:
Quoted 6 lines
Quoted 3 lines
#ifndef
CONFIG_MII
#error "CONFIG_MIIhas to be defined!"
#endifDoes every board that has a gasket define
CONFIG_RMII?Or are you saying that every board with a gasket is already broken?
That should be
"Or are you saying that every board using a reduced pin code is alread
broken?"
Quoted 6 lines
_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
[undeleted Stefano from CC-list]
Quoted 11 lines · Troy Kisky
Quoted 10 lines · Troy Kisky
Quoted 9 lines · Timo Ketola
Quoted 7 lines · Troy Kisky
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 472
Quoted 4 lines · Timo Ketola
drivers/net/fec_mxc.c +1
-3-#if !defined(CONFIG_MII ) -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII ,&fec->eth->miigsk_cfgr); +#if defined(CONFIG_RMII )While this change seems to make sense, it could break some boards.
Quoted 6 lines
Quoted 6 lines
Quoted 5 lines
Please explain how. Every board using
fec_mxcdefineCONFIG_MII- they have to:#ifndef
CONFIG_MII
#error "CONFIG_MIIhas to be defined!"
#endifDoes every board that has a gasket define
CONFIG_RMII?
Our board will be first.
Quoted 3 lines
Quoted 1 line
Or are you saying that every board with a gasket is already broken?
That should be
"Or are you saying that every board using a reduced pin code is alread broken?"
Yes, if there were one. Is there?
--
Timo
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
Quoted 2 lines · Timo Ketola
[undeleted Stefano from CC-list]
Hi Timo, hi Troy,
Quoted 12 lines · Troy Kisky
Quoted 11 lines · Troy Kisky
Quoted 10 lines · Timo Ketola
Quoted 9 lines · Troy Kisky
Quoted 7 lines · Timo Ketola
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 472
Quoted 4 lines
drivers/net/fec_mxc.c +1
-3-#if !defined(CONFIG_MII ) -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII ,&fec->eth->miigsk_cfgr); +#if defined(CONFIG_RMII )While this change seems to make sense, it could break some boards.
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
Quoted 6 lines
Please explain how. Every board using
fec_mxcdefineCONFIG_MII- they have to:#ifndef
CONFIG_MII
#error "CONFIG_MIIhas to be defined!"
#endifDoes every board that has a gasket define
CONFIG_RMII?
as far as I can see, there are some inconsistencies. All boards define CONFIG_MII, but they really need CONFIG_RMII, because only with my last patch I set the gasket for MII. The driver has always set in a fixed way the gasket for RMII, independently if CONFIG_RMII or CONFIG_MII was set, and that is also wrong.
I would say that the configuration file of most boards using fec_mxc must be changed.
And then fec_mxc.c does not need at all these lines:
#ifndef CONFIG_MII
#error "CONFIG_MII has to be defined!" #endif
Boards are compiled clean without them. Correct me if I am wrong, but it seems the correct way to do is to drop the unneeded check in the above lines and sets CONFIG_RMII for all boards except the only one (ima3-mx53), that needs really MII.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
Dear Stefano, Troy, Scott,
Quoted 24 lines · Stefano Babic
Quoted 2 lines · Timo Ketola
[undeleted Stefano from CC-list]
Hi Timo, hi Troy,
Quoted 18 lines · Troy Kisky
Quoted 17 lines · Troy Kisky
Quoted 16 lines · Timo Ketola
Quoted 15 lines · Troy Kisky
Quoted 7 lines · Timo Ketola
Review
Quoted 4 lines
(quoted diff) +1
-3-#if !defined(CONFIG_MII) - /* configure gasket for RMII, 50 MHz, no loopback, and no echo */ - writew(MIIGSK_CFGR_IF_MODE_RMII,&fec->eth->miigsk_cfgr); +#if defined(CONFIG_RMII)While this change seems to make sense, it could break some boards.
Please explain how. Every board using
fec_mxcdefineCONFIG_MII- they have to:#ifndef
CONFIG_MII
#error "CONFIG_MIIhas to be defined!"
#endif
Quoted 7 lines
Quoted 1 line
Quoted 1 line
Quoted 1 line
Does every board that has a gasket define
CONFIG_RMII?as far as I can see, there are some inconsistencies. All boards define
CONFIG_MII, but they really needCONFIG_RMII, because only with my last patch I set the gasket for MII. The driver has always set in a fixed way the gasket for RMII, independently ifCONFIG_RMIIorCONFIG_MIIwas set, and that is also wrong.
Ah, so, to answer Troy, there really is RMII boards (which maybe was obvious to all others than me; I reasoned in wrong direction: because they would be already broken with this code, there could be none) and they were already broken.
Quoted 7 lines
I would say that the configuration file of most boards using
fec_mxcmust be changed.And then
fec_mxc.cdoes not need at all these lines:
#ifndefCONFIG_MII
#error "CONFIG_MIIhas to be defined!" #endif
Functionally this does nothing of course but I can imagine the reasoning behind that check: If I understand correctly, fec_mxc depends on MII management interface (for example miiphy_wait_aneg). Then, if CONFIG_MII is not defined, there is inconsistency because configuration says "don't use MII" but fec_mxc still uses it. I don't know whether this causes any confusion.
Quoted 4 lines
Boards are compiled clean without them. Correct me if I am wrong, but it seems the correct way to do is to drop the unneeded check in the above lines and sets
CONFIG_RMIIfor all boards except the only one (ima3-mx53), that needs really MII.
Agreed regarding CONFIG_RMII. With dropping the check I'm OK either way. Furthermore, I might like to propose to change the name of the configuration variable CONFIG_MII to CONFIG_MII_MGM or something like that. That might reduce confusion (at least I have been quite confused).
--
Timo
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
Quoted 5 lines · Timo Ketola
Quoted 5 lines
as far as I can see, there are some inconsistencies. All boards define
CONFIG_MII, but they really needCONFIG_RMII, because only with my last patch I set the gasket for MII. The driver has always set in a fixed way the gasket for RMII, independently ifCONFIG_RMIIorCONFIG_MIIwas set, and that is also wrong.
Quite right, you have the second board. The ima3 board I added uses also MII instead of RMII. However, I think that something went wrong, as I understand rereading the code.
Quoted 6 lines
Functionally this does nothing of course but I can imagine the reasoning behind that check: If I understand correctly,
fec_mxcdepends on MII management interface (for examplemiiphy_wait_aneg). Then, ifCONFIG_MIIis not defined, there is inconsistency because configuration says "don't use MII" butfec_mxcstill uses it. I don't know whether this causes any confusion.
It creates some confusion...
Quoted 10 lines
Quoted 5 lines
Boards are compiled clean without them. Correct me if I am wrong, but it seems the correct way to do is to drop the unneeded check in the above lines and sets
CONFIG_RMIIfor all boards except the only one (ima3-mx53), that needs really MII.Agreed regarding
CONFIG_RMII. With dropping the check I'm OK either way. Furthermore, I might like to propose to change the name of the configuration variableCONFIG_MIItoCONFIG_MII_MGMor something like that. That might reduce confusion (at least I have been quite confused).
Support for MX28 added recently CONFIG_FEC_XCV_TYPE. To augment the confusion, CONFIG_FEC_XCV_TYPE is set to MII100 as default, and this let assume that most boards are running with MII if they do not define it. Really all MX5 boards use RMII, not MII. Not only, by setting the RCR register, there is an attempt to set reserved bits on MX5 SOCs, because MX5 defines only bits 0-5. It seems that writing to reserved bits does not produce effects, but it is quite dangerous and not compliant with SOC manual.
So at the end we have multiple configuration switches (CONFIG_MII, CONFIG_RMII, and CONFIG_FEC_XCV_TYPE) to set the same thing, and this is not really good ;-((
I assume that setting CONFIG_FEC_XCV_TYPE as default to MII100 was to avoid to break building not MX28 boards, but as you can see generates other problems. I think it is really better that there is *no* default, and each board sets explicitely its own type.
Instead of using CONFIG_MII or CONFIG_RMII, we can make use of CONFIG_FEC_XCV_TYPE, as it was already introduced, but making it consistent for all boards.
Support for MII in FEC is in u-boot-imx/next in the last patch, and it is not yet merged. I think I am going to drop that patch from my tree, so that we start again from a clean situation (mainline).
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
Quoted 3 lines · Stefano Babic
Instead of using
CONFIG_MIIorCONFIG_RMII, we can make use ofCONFIG_FEC_XCV_TYPE, as it was already introduced, but making it consistent for all boards.
Second for that.
--
Timo
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
In reply to Timo KetolaQuoted 69 lines · Timo Ketola
Gasket needs a different configuration for 10BaseT than for higher speeds.
Signed-off-by Timo Ketola<[email protected]>---
Changes in v4:
- Rewrapped commit messageChanges in v2:
- Dropped patches 2 and 3 so this one changed from 5 to 3
- Rebased to u-boot-imx next
- Removed the remove of 'miiphy_duplex' call
- Changed 'speed ==_100BASET' to 'speed !=_10BASET' to not to break_1000BASET- Changed configuration option to put gasket into RMII mode from !CONFIG_MII to
CONFIG_RMII. I'm not too sure how this should be done though. !CONFIG_MII is normally used for this but its original purpose was to enable MII *management* interface, I think...drivers/net/fec_mxc.c | 43 ++++++++++++++++++++++++------------------- 1 files changed, 24 insertions(+), 19 deletions(-)drivers/net/fec_mxc.c +24
-3@@ -440,6 +440,22 @@ static int fec_open(struct eth_device *edev)*/ writel (readl (&fec->eth->ecntrl) |FEC_ECNTRL_ETHER_EN , &fec->eth->ecntrl); +#ifdef CONFIG_PHYLIB +if (!fec->phydev) +fec_eth_phy_config (edev); +if (fec->phydev) { +/* Start up the PHY */ +phy_startup (fec->phydev); + speed = fec->phydev->speed; + }else { + speed = _100BASET; + } +#else +miiphy_wait_aneg (edev); + speed =miiphy_speed (edev->name, fec->phy_id); +miiphy_duplex (edev->name, fec->phy_id); +#endif +#if defined(CONFIG_MX25 ) || defined(CONFIG_MX53 )udelay (100 );/* @@ -453,9 +469,14 @@ static int fec_open(struct eth_device *edev)while (readw (&fec->eth->miigsk_enr)&MIIGSK_ENR_READY )udelay (2 ); -#if !defined(CONFIG_MII ) -/* configure gasket for RMII, 50 MHz, no loopback, and no echo */ -writew (MIIGSK_CFGR_IF_MODE_RMII ,&fec->eth->miigsk_cfgr); +#if defined(CONFIG_RMII ) +if (speed != _10BASET) +/* configure gasket for RMII, 50MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII ,&fec->eth->miigsk_cfgr); +else +/* configure gasket for RMII, 5MHz, no loopback, and no echo */ +writew (MIIGSK_CFGR_IF_MODE_RMII |MIIGSK_CFGR_FRCONT , + &fec->eth->miigsk_cfgr);#else /* configure gasket for MII, no loopback, and no echo */ writew (MIIGSK_CFGR_IF_MODE_MII ,&fec->eth->miigsk_cfgr);
drivers/net/fec_mxc.c static int fec_open(struct eth_device *edev) · line 497
Quoted 3 lines
drivers/net/fec_mxc.c +0
-0@@ -474,22 +495,6 @@ static int fec_open(struct eth_device *edev) }#endif
Can you fix 10BASET for non-reduced pin count boards as well?
Thanks
Troy
PATCH v4 3/8 imx: fec: Resolve speed before configuring gasket
[undeleted Stefano from CC-list]
Quoted 1 line · Troy Kisky
On 4/19/2012 1:55 AM, Timo Ketola wrote:
...
Quoted 1 line
Quoted 1 line
+ if (speed !=
_10BASET)
...
Quoted 1 line
Can you fix 10BASET for non-reduced pin count boards as well?
Are they broken? How? If they are, I'm afraid I don't have a board to test.
--
Timo
PATCH v4 4/8 imx: nand: Support flash based BBT
In reply to Timo Ketola---
Changes in v4:
- Removed blank lines inside #ifdef
- Manipulate 'this->options' with '|=' instead of '='
Changes in v3:
- Changed the subject
- Changed the BBT pattern offsets (patch 4); They are now zero as in Linux
Changes in v2:
- Dropped patches 2, 3 and 6 so this one changed from 7 to 4
- Rebased to u-boot-imx next
drivers/mtd/nand/mxc_nand.c | 33 +++++++++++++++++++++++++++++++++ 1 files changed, 33 insertions(+), 0 deletions(-)
drivers/mtd/nand/mxc_nand.c +33 -0
@@ -1302,12 +1302,45 @@ static void mxc_setup_config1(void)#define mxc_setup_config1 ()#endif +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + +static u8 bbt_pattern[] = {'B' ,'b' ,'t' ,'0' }; +static u8 mirror_pattern[] = {'1' ,'t' ,'b' ,'B' }; + +static struct nand_bbt_descr bbt_main_descr = { + .options =NAND_BBT_LASTBLOCK |NAND_BBT_CREATE |NAND_BBT_WRITE | +NAND_BBT_2BIT |NAND_BBT_VERSION |NAND_BBT_PERCHIP , + .offs =0 , + .len =4 , + .veroffs =4 , + .maxblocks =4 , + .pattern = bbt_pattern, +}; + +static struct nand_bbt_descr bbt_mirror_descr = { + .options =NAND_BBT_LASTBLOCK |NAND_BBT_CREATE |NAND_BBT_WRITE | +NAND_BBT_2BIT |NAND_BBT_VERSION |NAND_BBT_PERCHIP , + .offs =0 , + .len =4 , + .veroffs =4 , + .maxblocks =4 , + .pattern = mirror_pattern, +}; + +#endif +int board_nand_init (struct nand_chip *this) {struct mtd_info *mtd;uint16_t tmp;int err =0 ; +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + this->options |=NAND_USE_FLASH_BBT ; + this->bbt_td = &bbt_main_descr; + this->bbt_md = &bbt_mirror_descr; +#endif +/* structures must be linked */ mtd = &host->mtd; mtd->priv = this;
Signature · 1 line
1.7.5.4
PATCH v4 4/8 imx: nand: Support flash based BBT
Quoted 12 lines · Timo Ketola
Signed-off-by Timo Ketola <[email protected]>---
Changes in v4:
- Removed blank lines inside #ifdef
- Manipulate 'this->options' with '|=' instead of '='Changes in v3:
- Changed the subject
- Changed the BBT pattern offsets (patch 4); They are now zero as in Linux
Quoted 6 lines
Changes in v2:
- Dropped patches 2, 3 and 6 so this one changed from 7 to 4
- Rebased to u-boot-imx nextdrivers/mtd/nand/mxc_nand.c | 33 +++++++++++++++++++++++++++++++++ 1 files changed, 33 insertions(+), 0 deletions(-)
-Scott
PATCH v4 4/8 imx: nand: Support flash based BBT
In reply to Timo KetolaQuoted 7 lines · Timo Ketola
Signed-off-by Timo Ketola <[email protected]>---
Changes in v4:
- Removed blank lines inside #ifdef
- Manipulate 'this->options' with '|=' instead of '='
Quoted 9 lines
Changes in v3:
- Changed the subject
- Changed the BBT pattern offsets (patch 4); They are now zero as in LinuxChanges in v2:
- Dropped patches 2, 3 and 6 so this one changed from 7 to 4
- Rebased to u-boot-imx next
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 5/8 i.MX25: usb: Set PORTSCx register
In reply to Timo KetolaThe USB controller in i.MX25 has a PORTSCx registers which should be set. In this regard it is similar to the controller in i.MX31. As this file is compiled only with i.MX25 and -31, #ifdef check can be removed.
---
Changes in v4:
- Reworded subject to shorten it
- Added commit message
- Changed the fix from adding i.MX25 to removing the check altogether
Changes in v2:
- Dropped patches 2, 3 and 6 so this one changed from 8 to 5
- Rebased to u-boot-imx next
drivers/usb/host/ehci-mxc.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)
drivers/usb/host/ehci-mxc.c +0 -2
@@ -125,11 +125,9 @@ int ehci_hcd_init(void) hcor = (struct ehci_hcor *)((uint32_t ) hccr +HC_LENGTH (ehci_readl (&hccr->cr_capbase)));setbits_le32 (&ehci->usbmode,CM_HOST ); -#ifdef CONFIG_MX31 setbits_le32 (&ehci->control,USB_EN );__raw_writel (CONFIG_MXC_USB_PORTSC , &ehci->portsc); -#endif mxc_set_usbcontrol (CONFIG_MXC_USB_PORT ,CONFIG_MXC_USB_FLAGS );udelay (10000 );
Signature · 1 line
1.7.5.4
PATCH v4 5/8 i.MX25: usb: Set PORTSCx register
Quoted 6 lines · Timo Ketola
The USB controller in i.MX25 has a PORTSCx registers which should be set. In this regard it is similar to the controller in i.MX31. As this file is compiled only with i.MX25 and -31, #ifdef check can be removed.
Signed-off-by Timo Ketola <[email protected]>---
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 5/8 i.MX25: usb: Set PORTSCx register
Dear Stefano Babic,
Quoted 9 lines · Timo Ketola
Quoted 6 lines
The USB controller in i.MX25 has a PORTSCx registers which should be set. In this regard it is similar to the controller in i.MX31. As this file is compiled only with i.MX25 and -31, #ifdef check can be removed.
Signed-off-by Timo Ketola <[email protected]>---
Acked-by Stefano Babic <[email protected]>
Stefano, will you apply these two USB patches please?
Quoted 3 lines
Best regards,
Stefano Babic
Best regards,
Marek Vasut
PATCH v4 5/8 i.MX25: usb: Set PORTSCx register
In reply to Timo KetolaQuoted 12 lines · Timo Ketola
The USB controller in i.MX25 has a PORTSCx registers which should be set. In this regard it is similar to the controller in i.MX31. As this file is compiled only with i.MX25 and -31, #ifdef check can be removed.
Signed-off-by Timo Ketola <[email protected]>---
Changes in v4:
- Reworded subject to shorten it
- Added commit message
- Changed the fix from adding i.MX25 to removing the check altogether
Quoted 7 lines
Changes in v2:
- Dropped patches 2, 3 and 6 so this one changed from 8 to 5
- Rebased to u-boot-imx nextdrivers/usb/host/ehci-mxc.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 6/8 imx: usb: There is no such register
In reply to Timo KetolaThe reference manual of i.MX25 (nor i.MX31) does not define such register. This seems to access read only UH2_CAPLENGTH register (if CONFIG_MXC_USB_PORT is zero).
---
Changes in v4:
- Rewrapped commit message
Changes in v2:
- New patch in this series
drivers/usb/host/ehci-mxc.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)
drivers/usb/host/ehci-mxc.c +0 -2
@@ -125,8 +125,6 @@ int ehci_hcd_init(void) hcor = (struct ehci_hcor *)((uint32_t ) hccr +HC_LENGTH (ehci_readl (&hccr->cr_capbase)));setbits_le32 (&ehci->usbmode,CM_HOST ); -setbits_le32 (&ehci->control,USB_EN ); -__raw_writel (CONFIG_MXC_USB_PORTSC , &ehci->portsc);mxc_set_usbcontrol (CONFIG_MXC_USB_PORT ,CONFIG_MXC_USB_FLAGS );
Signature · 1 line
1.7.5.4
PATCH v4 6/8 imx: usb: There is no such register
Quoted 21 lines · Timo Ketola
The reference manual of i.MX25 (nor i.MX31) does not define such register. This seems to access read only
UH2_CAPLENGTHregister (ifCONFIG_MXC_USB_PORTis zero).Signed-off-by Timo Ketola <[email protected]>---
Changes in v4:
- Rewrapped commit messageChanges in v2:
- New patch in this seriesdrivers/usb/host/ehci-mxc.c | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-)drivers/usb/host/ehci-mxc.c +0
-0
drivers/usb/host/ehci-mxc.c int ehci_hcd_init(void) · line 130
Quoted 8 lines
drivers/usb/host/ehci-mxc.c +0
-2@@ -125,8 +125,6 @@ int ehci_hcd_init(void) hcor = (struct ehci_hcor *)((uint32_t ) hccr +HC_LENGTH (ehci_readl (&hccr->cr_capbase)));setbits_le32 (&ehci->usbmode,CM_HOST ); -setbits_le32 (&ehci->control,USB_EN ); -__raw_writel (CONFIG_MXC_USB_PORTSC , &ehci->portsc);mxc_set_usbcontrol (CONFIG_MXC_USB_PORT ,CONFIG_MXC_USB_FLAGS );
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 6/8 imx: usb: There is no such register
In reply to Timo KetolaQuoted 6 lines · Timo Ketola
The reference manual of i.MX25 (nor i.MX31) does not define such register. This seems to access read only
UH2_CAPLENGTHregister (ifCONFIG_MXC_USB_PORTis zero).Signed-off-by Timo Ketola <[email protected]>---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 7/8 i.MX2: Include asm/types.h in arch-mx25/imx-regs.h
In reply to Timo Ketolatypes.h must be included in imx-regs.h if one wants to include imx-regs.h in a board configuration file. That for one's part is necessary, if one wants to use addresses defined in imx-regs.h.
For example, fsl_esdhc.c needs CONFIG_SYS_FSL_ESDHC_ADDR defined and a proper thing is to define it with IMX_MMC_SDHCx_BASE in board configuration file. This patch fixes the build in that case.
---
Changes in v4:
- Proper fix was found so this patch changes altogether - subject, message and touched file
Changes in v2:
- New patch in this series
arch/arm/include/asm/arch-mx25/imx-regs.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)
arch/arm/include/asm/arch-mx25/imx-regs.h +3 -0
@@ -34,6 +34,9 @@#define _IMX_REGS_H#ifndef __ASSEMBLY__ + +#include <asm/types.h> +#ifdef CONFIG_FEC_MXC extern void mx25_fec_init_pins (void );#endif
Signature · 1 line
1.7.5.4
PATCH v4 7/8 i.MX2: Include asm/types.h in arch-mx25/imx-regs.h
Quoted 26 lines · Timo Ketola
types.hmust be included inimx-regs.hif one wants to includeimx-regs.hin a board configuration file. That for one's part is necessary, if one wants to use addresses defined inimx-regs.h.For example,
fsl_esdhc.cneedsCONFIG_SYS_FSL_ESDHC_ADDRdefined and a proper thing is to define it withIMX_MMC_SDHCx_BASEin board configuration file. This patch fixes the build in that case.Signed-off-by Timo Ketola <[email protected]>---
Changes in v4:
- Proper fix was found so this patch changes altogether - subject, message and touched fileChanges in v2:
- New patch in this seriesarch/arm/include/asm/arch-mx25/imx-regs.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)arch/arm/include/asm/arch-mx25/imx-regs.h +0
-0
arch/arm/include/asm/arch-mx25/imx-regs.h line 42
Quoted 9 lines
arch/arm/include/asm/arch-mx25/imx-regs.h +3
-0@@ -34,6 +34,9 @@#define _IMX_REGS_H#ifndef __ASSEMBLY__ + +#include <asm/types.h> +#ifdef CONFIG_FEC_MXC extern void mx25_fec_init_pins (void );#endif
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 7/8 i.MX2: Include asm/types.h in arch-mx25/imx-regs.h
In reply to Timo KetolaQuoted 10 lines · Timo Ketola
types.hmust be included inimx-regs.hif one wants to includeimx-regs.hin a board configuration file. That for one's part is necessary, if one wants to use addresses defined inimx-regs.h.For example,
fsl_esdhc.cneedsCONFIG_SYS_FSL_ESDHC_ADDRdefined and a proper thing is to define it withIMX_MMC_SDHCx_BASEin board configuration file. This patch fixes the build in that case.Signed-off-by Timo Ketola <[email protected]>---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================
PATCH v4 8/8 imx: Add u-boot.imx as target for ARM9 i.MX SOCs
In reply to Timo Ketola---
Changes in v3:
- Dropped old patch number 8 "imx: nand: Don't invent new..." so this one changed from 9 to 8
Changes in v2:
- New patch in this series
- Add .imx target in the spirit of commit 303838
arch/arm/cpu/arm926ejs/config.mk | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)
arch/arm/cpu/arm926ejs/config.mk +6 -0
@@ -31,3 +31,9 @@ PLATFORM_CPPFLAGS += -march=armv5te # ========================================================================= PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT) + +ifneq ($(CONFIG_IMX_CONFIG),) + +ALL-y += $(obj)u-boot.imx + +endif
Signature · 1 line
1.7.5.4
PATCH v4 8/8 imx: Add u-boot.imx as target for ARM9 i.MX SOCs
Quoted 19 lines · Timo Ketola
Signed-off-by Timo Ketola <[email protected]>---
Changes in v3:
- Dropped old patch number 8 "imx: nand: Don't invent new..." so this one changed from 9 to 8Changes in v2:
- New patch in this series
- Add .imx target in the spirit of commit 303838arch/arm/cpu/arm926ejs/config.mk | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)arch/arm/cpu/arm926ejs/config.mk +0
-0
arch/arm/cpu/arm926ejs/config.mk PLATFORM_CPPFLAGS += -march=armv5te · line 39
Quoted 9 lines
arch/arm/cpu/arm926ejs/config.mk +6
-0@@ -31,3 +31,9 @@ PLATFORM_CPPFLAGS += -march=armv5te # ========================================================================= PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT) + +ifneq ($(CONFIG_IMX_CONFIG),) + +ALL-y += $(obj)u-boot.imx + +endif
Best regards,
Stefano Babic
Signature · 5 lines
===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de =====================================================================