devkit3250: add Timll DevKit3250 board initial support

This patchset adds generic NXP LPC32XX SoC support and basic support for Embest/Timll DevKit3250 board, which powered by this SoC.

The patchset is done on top of u-boot/master branch. The general difference of this resent series from the previous ones is that high speed UART driver was added into support.

Changes from v3 to v4
* rebase on recent arm-next branch
* add get_ticks() function
* update boards.cfg context

Changes from v2 to v3
* renamed register structures from *_t to *_regs
* renamed clkpwr.c file to clk.c
* fixed bi_boot_params initialization
* applied some cosmetic fixes

Changes from v1 to v2:
* setbits_le32() and similar helpers are used
* added general arch_cpu_init() routine

Vladimir Zapolskiy (3):
arm926ejs: add NXP LPC32x0 cpu series support
serial: add LPC32X0 high-speed UART devices support
devkit3250: add Timll DevKit3250 board initial support

 MAINTAINERS                                   |    4 +
 arch/arm/cpu/arm926ejs/lpc32xx/Makefile       |   45 +++++++
 arch/arm/cpu/arm926ejs/lpc32xx/clk.c          |  117 +++++++++++++++++
 arch/arm/cpu/arm926ejs/lpc32xx/cpu.c          |   70 ++++++++++
 arch/arm/cpu/arm926ejs/lpc32xx/devices.c      |   52 ++++++++
 arch/arm/cpu/arm926ejs/lpc32xx/timer.c        |   95 ++++++++++++++
 arch/arm/include/asm/arch-lpc32xx/clk.h       |  170 +++++++++++++++++++++++++
 arch/arm/include/asm/arch-lpc32xx/config.h    |   76 +++++++++++
 arch/arm/include/asm/arch-lpc32xx/cpu.h       |   64 +++++++++
 arch/arm/include/asm/arch-lpc32xx/emc.h       |   92 +++++++++++++
 arch/arm/include/asm/arch-lpc32xx/sys_proto.h |   25 ++++
 arch/arm/include/asm/arch-lpc32xx/timer.h     |   74 +++++++++++
 arch/arm/include/asm/arch-lpc32xx/uart.h      |  114 +++++++++++++++++
 arch/arm/include/asm/arch-lpc32xx/wdt.h       |   51 ++++++++
 board/timll/devkit3250/Makefile               |   44 +++++++
 board/timll/devkit3250/devkit3250.c           |   65 ++++++++++
 boards.cfg                                    |    1 +
 drivers/serial/Makefile                       |    1 +
 drivers/serial/lpc32xx_hsuart.c               |  112 ++++++++++++++++
 include/configs/devkit3250.h                  |  117 +++++++++++++++++
 20 files changed, 1389 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/clk.c
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/devices.c
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/timer.c
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/clk.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/config.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/cpu.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/emc.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/sys_proto.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/timer.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/uart.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/wdt.h
 create mode 100644 board/timll/devkit3250/Makefile
 create mode 100644 board/timll/devkit3250/devkit3250.c
 create mode 100644 drivers/serial/lpc32xx_hsuart.c
 create mode 100644 include/configs/devkit3250.h

1.7.9.1

This change adds initial support for NXP LPC32x0 SoC series.

---
Changes from v8 to v9:
* add get_ticks() function

Changes from v7 to v8:
* renamed register structures from *_t to *_regs
* renamed clkpwr.c file to clk.c
* fixed several macro definitions
* various cosmetic fixes

Changes from v6 to v7:
* get use of setbits_le32() and friends
* add arch_cpu_init() routine

Changes from v5 to v6:
* replaced some spaces with tabs in macro declarations
* more rules separating 14-clock and ns16650 UARTs in config.h

Changes from v4 to v5:
* corrected address in GPLv2+ licence header in files

Changes from v3 to v4:
* extended memory controller definitions are introduced
* added print_cpuinfo() function

Changes from v2 to v3:
* checkpatch.pl reports zero errors and warnings

Changes from v1 to v2:
* BIT(n) and SBF(s, v) macro are not used anymore
* removed NS16550 and 14-clock UART definitions from uart.h
* added devices.c file, which contains standard UART preinitialization routine
* added get_serial_clock() function, it returns actual frequency of UART clock
* __udelay() realization is simplified, no need of interrupt handling

 arch/arm/cpu/arm926ejs/lpc32xx/Makefile       |   45 +++++++
 arch/arm/cpu/arm926ejs/lpc32xx/clk.c          |  117 +++++++++++++++++
 arch/arm/cpu/arm926ejs/lpc32xx/cpu.c          |   70 ++++++++++
 arch/arm/cpu/arm926ejs/lpc32xx/devices.c      |   52 ++++++++
 arch/arm/cpu/arm926ejs/lpc32xx/timer.c        |   95 ++++++++++++++
 arch/arm/include/asm/arch-lpc32xx/clk.h       |  170 +++++++++++++++++++++++++
 arch/arm/include/asm/arch-lpc32xx/config.h    |   76 +++++++++++
 arch/arm/include/asm/arch-lpc32xx/cpu.h       |   64 +++++++++
 arch/arm/include/asm/arch-lpc32xx/emc.h       |   92 +++++++++++++
 arch/arm/include/asm/arch-lpc32xx/sys_proto.h |   25 ++++
 arch/arm/include/asm/arch-lpc32xx/timer.h     |   74 +++++++++++
 arch/arm/include/asm/arch-lpc32xx/uart.h      |   54 ++++++++
 arch/arm/include/asm/arch-lpc32xx/wdt.h       |   51 ++++++++
 13 files changed, 985 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/clk.c
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/devices.c
 create mode 100644 arch/arm/cpu/arm926ejs/lpc32xx/timer.c
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/clk.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/config.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/cpu.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/emc.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/sys_proto.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/timer.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/uart.h
 create mode 100644 arch/arm/include/asm/arch-lpc32xx/wdt.h

new file mode 100644
index 0000000..ae1f0a5
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# as published by the Free Software Foundation; either version 2
+# of the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA  02110-1301, USA.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB     = $(obj)lib$(SOC).o
+
+COBJS   = cpu.o clk.o devices.o timer.o
+
+SRCS    := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS    := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all:    $(obj).depend $(LIB)
+
+$(LIB): $(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

new file mode 100644
index 0000000..b2cbfcd
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2011 Vladimir Zapolskiy <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA  02110-1301, USA.
+ */
+
+#ifndef _LPC32XX_SYS_PROTO_H
+#define _LPC32XX_SYS_PROTO_H
+
+void lpc32xx_uart_init(unsigned int uart_id);
+
+#endif /* _LPC32XX_SYS_PROTO_H */

1.7.9.1

This change adds an implementation of high-speed UART found on NXP LPC32X0 SoCs. Such UARTs are enumerated as UART1, UART2 and UART7.

---
Changes from v2 to v3:
* renamed struct hsuart_t to hsuart_regs

Changes from v1 to v2:
* simplified lpc32xx_hsuart_init() a little
* put SoC specific changes into patch 1/3

 arch/arm/include/asm/arch-lpc32xx/uart.h |   60 ++++++++++++++++
 drivers/serial/Makefile                  |    1 +
 drivers/serial/lpc32xx_hsuart.c          |  112 ++++++++++++++++++++++++++++++
 3 files changed, 173 insertions(+), 0 deletions(-)
 create mode 100644 drivers/serial/lpc32xx_hsuart.c

index b613df8..ec12893 100644
@@ -22,6 +22,66 @@
 
 #include <asm/types.h>
 
+/* 14-clock UART Registers */
+struct hsuart_regs {
+	union {
+		u32 rx;		/* Receiver FIFO		*/
+		u32 tx;		/* Transmitter FIFO		*/
+	};
+	u32 level;		/* FIFO Level Register		*/
+	u32 iir;		/* Interrupt ID Register	*/
+	u32 ctrl;		/* Control Register		*/
+	u32 rate;		/* Rate Control Register	*/
+};
+
+/* 14-clock UART Receiver FIFO Register bits */
+#define HSUART_RX_BREAK			(1 << 10)
+#define HSUART_RX_ERROR			(1 << 9)
+#define HSUART_RX_EMPTY			(1 << 8)
+#define HSUART_RX_DATA			(0xff << 0)
+
+/* 14-clock UART Level Register bits */
+#define HSUART_LEVEL_TX			(0xff << 8)
+#define HSUART_LEVEL_RX			(0xff << 0)
+
+/* 14-clock UART Interrupt Identification Register bits */
+#define HSUART_IIR_TX_INT_SET		(1 << 6)
+#define HSUART_IIR_RX_OE		(1 << 5)
+#define HSUART_IIR_BRK			(1 << 4)
+#define HSUART_IIR_FE			(1 << 3)
+#define HSUART_IIR_RX_TIMEOUT		(1 << 2)
+#define HSUART_IIR_RX_TRIG		(1 << 1)
+#define HSUART_IIR_TX			(1 << 0)
+
+/* 14-clock UART Control Register bits */
+#define HSUART_CTRL_HRTS_INV		(1 << 21)
+#define HSUART_CTRL_HRTS_TRIG_48	(0x3 << 19)
+#define HSUART_CTRL_HRTS_TRIG_32	(0x2 << 19)
+#define HSUART_CTRL_HRTS_TRIG_16	(0x1 << 19)
+#define HSUART_CTRL_HRTS_TRIG_8		(0x0 << 19)
+#define HSUART_CTRL_HRTS_EN		(1 << 18)
+#define HSUART_CTRL_TMO_16		(0x3 << 16)
+#define HSUART_CTRL_TMO_8		(0x2 << 16)
+#define HSUART_CTRL_TMO_4		(0x1 << 16)
+#define HSUART_CTRL_TMO_DISABLED	(0x0 << 16)
+#define HSUART_CTRL_HCTS_INV		(1 << 15)
+#define HSUART_CTRL_HCTS_EN		(1 << 14)
+#define HSUART_CTRL_HSU_OFFSET(n)	((n) << 9)
+#define HSUART_CTRL_HSU_BREAK		(1 << 8)
+#define HSUART_CTRL_HSU_ERR_INT_EN	(1 << 7)
+#define HSUART_CTRL_HSU_RX_INT_EN	(1 << 6)
+#define HSUART_CTRL_HSU_TX_INT_EN	(1 << 5)
+#define HSUART_CTRL_HSU_RX_TRIG_48	(0x5 << 2)
+#define HSUART_CTRL_HSU_RX_TRIG_32	(0x4 << 2)
+#define HSUART_CTRL_HSU_RX_TRIG_16	(0x3 << 2)
+#define HSUART_CTRL_HSU_RX_TRIG_8	(0x2 << 2)
+#define HSUART_CTRL_HSU_RX_TRIG_4	(0x1 << 2)
+#define HSUART_CTRL_HSU_RX_TRIG_1	(0x0 << 2)
+#define HSUART_CTRL_HSU_TX_TRIG_16	(0x3 << 0)
+#define HSUART_CTRL_HSU_TX_TRIG_8	(0x2 << 0)
+#define HSUART_CTRL_HSU_TX_TRIG_4	(0x1 << 0)
+#define HSUART_CTRL_HSU_TX_TRIG_0	(0x0 << 0)
+
 /* UART Control Registers */
 struct uart_ctrl_regs {
 	u32 ctrl;		/* Control Register		*/

index 616b857..65d0f23 100644
@@ -29,6 +29,7 @@ COBJS-$(CONFIG_ALTERA_UART) += altera_uart.o
 COBJS-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o
 COBJS-$(CONFIG_ARM_DCC) += arm_dcc.o
 COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o
+COBJS-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
 COBJS-$(CONFIG_MCFUART) += mcfuart.o
 COBJS-$(CONFIG_NS9750_UART) += ns9750_serial.o
 COBJS-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o

1.7.9.1

This change adds a basic support for Embest/Timll DevKit3250 board, NOR and UART are the only supported peripherals for a moment. The board doesn't require low-level init, because the initial SDRAM and GPIO configuration is performed during kickstart bootloader execution.

---
Changes from v5 to v6:
* update boards.cfg context

Changes from v4 to v5:
* fixed bi_boot_params initialization
* cosmetic changes in board configuration

Changes from v3 to v4:
* removed dcache flushing from board_init()
* tabs instead of spaces in board config file

Changes from v2 to v3:
* updated a relocation address
* combined a record in maintainers file into the patch
* use high speed UART2 by default

Changes from v1 to v2:
* corrected address in GPLv2+ licence header in files
* removed clean and distclean targets from board makefile
* do not set machine id explicitly, if CONFIG_MACH_TYPE is defined
* minor indentation cleanups

 MAINTAINERS                         |    4 +
 board/timll/devkit3250/Makefile     |   44 +++++++++++++
 board/timll/devkit3250/devkit3250.c |   65 +++++++++++++++++++
 boards.cfg                          |    1 +
 include/configs/devkit3250.h        |  117 +++++++++++++++++++++++++++++++++++
 5 files changed, 231 insertions(+), 0 deletions(-)
 create mode 100644 board/timll/devkit3250/Makefile
 create mode 100644 board/timll/devkit3250/devkit3250.c
 create mode 100644 include/configs/devkit3250.h

index 708ded7..35d0a9a 100644
@@ -932,6 +932,10 @@ Sughosh Ganu <[email protected]>
 
 	hawkboard	ARM926EJS (OMAP-L138)
 
+Vladimir Zapolskiy <[email protected]>
+
+	devkit3250	lpc32xx
+
 -------------------------------------------------------------------------
 
 Unknown / orphaned boards:

index 3cf75c3..87a1f0c 100644
@@ -154,6 +154,7 @@ openrd_ultimate              arm         arm926ejs   openrd              Marvell
 rd6281a                      arm         arm926ejs   -                   Marvell        kirkwood
 sheevaplug                   arm         arm926ejs   -                   Marvell        kirkwood
 dockstar                     arm         arm926ejs   -                   Seagate        kirkwood
+devkit3250                   arm         arm926ejs   devkit3250          timll          lpc32xx
 jadecpu                      arm         arm926ejs   jadecpu             syteco         mb86r0x
 mx25pdk                      arm         arm926ejs   mx25pdk             freescale      mx25		mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg
 tx25                         arm         arm926ejs   tx25                karo           mx25

1.7.9.1

Hi Vladimir,

Le 19/04/2012 16:33, Vladimir Zapolskiy a ?crit :

Applied to u-boot-arm/next, thanks -- and apologies for delaying so much.

Amicalement,

Albert.

Hi,

no problem, thank you a lot.

With best wishes,
Vladimir